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llvm-project/llvm/test/MC/ARM/vorr-vbic-illegal-cases.s

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Fix for PR18921, "vmov" part. Added support for bytes replication feature, so it could be GAS compatible. E.g. instructions below: "vmov.i32 d0, 0xffffffff" "vmvn.i32 d0, 0xabababab" "vmov.i32 d0, 0xabababab" "vmov.i16 d0, 0xabab" are incorrect, but we could deal with such cases. For first one we should emit: "vmov.i8 d0, 0xff" For second one ("vmvn"): "vmov.i8 d0, 0x54" For last two instructions it should emit: "vmov.i8 d0, 0xab" P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code. Just for keeping method bodies in harmony with themselves. llvm-svn: 207080
2014-04-24 14:03:01 +08:00
@ RUN: not llvm-mc -triple=armv7-linux-gnueabi %s 2>&1 | FileCheck %s
.text
Add aliases for VAND imm to VBIC ~imm On ARM NEON, VAND with immediate (16/32 bits) is an alias to VBIC ~imm with the same type size. Adding that logic to the parser, and generating VBIC instructions from VAND asm files. This patch also fixes the validation routines for NEON splat immediates which were wrong. Fixes PR20702. llvm-svn: 218450
2014-09-25 19:31:24 +08:00
vorr.i32 d2, #0xffffffff
vorr.i32 q2, #0xffffffff
vorr.i32 d2, #0xabababab
vorr.i32 q2, #0xabababab
vorr.i16 q2, #0xabab
vorr.i16 q2, #0xabab
Fix for PR18921, "vmov" part. Added support for bytes replication feature, so it could be GAS compatible. E.g. instructions below: "vmov.i32 d0, 0xffffffff" "vmvn.i32 d0, 0xabababab" "vmov.i32 d0, 0xabababab" "vmov.i16 d0, 0xabab" are incorrect, but we could deal with such cases. For first one we should emit: "vmov.i8 d0, 0xff" For second one ("vmvn"): "vmov.i8 d0, 0x54" For last two instructions it should emit: "vmov.i8 d0, 0xab" P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code. Just for keeping method bodies in harmony with themselves. llvm-svn: 207080
2014-04-24 14:03:01 +08:00
@ CHECK: error: invalid operand for instruction
@ CHECK: vorr.i32 d2, #0xffffffff
@ CHECK: error: invalid operand for instruction
@ CHECK: vorr.i32 q2, #0xffffffff
@ CHECK: error: invalid operand for instruction
@ CHECK: vorr.i32 d2, #0xabababab
@ CHECK: error: invalid operand for instruction
@ CHECK: vorr.i32 q2, #0xabababab
@ CHECK: error: invalid operand for instruction
@ CHECK: vorr.i16 q2, #0xabab
@ CHECK: error: invalid operand for instruction
@ CHECK: vorr.i16 q2, #0xabab
Add aliases for VAND imm to VBIC ~imm On ARM NEON, VAND with immediate (16/32 bits) is an alias to VBIC ~imm with the same type size. Adding that logic to the parser, and generating VBIC instructions from VAND asm files. This patch also fixes the validation routines for NEON splat immediates which were wrong. Fixes PR20702. llvm-svn: 218450
2014-09-25 19:31:24 +08:00
vbic.i32 d2, #0xffffffff
vbic.i32 q2, #0xffffffff
vbic.i32 d2, #0xabababab
vbic.i32 q2, #0xabababab
vbic.i16 d2, #0xabab
vbic.i16 q2, #0xabab
Fix for PR18921, "vmov" part. Added support for bytes replication feature, so it could be GAS compatible. E.g. instructions below: "vmov.i32 d0, 0xffffffff" "vmvn.i32 d0, 0xabababab" "vmov.i32 d0, 0xabababab" "vmov.i16 d0, 0xabab" are incorrect, but we could deal with such cases. For first one we should emit: "vmov.i8 d0, 0xff" For second one ("vmvn"): "vmov.i8 d0, 0x54" For last two instructions it should emit: "vmov.i8 d0, 0xab" P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code. Just for keeping method bodies in harmony with themselves. llvm-svn: 207080
2014-04-24 14:03:01 +08:00
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i32 d2, #0xffffffff
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i32 q2, #0xffffffff
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i32 d2, #0xabababab
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i32 q2, #0xabababab
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i16 d2, #0xabab
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i16 q2, #0xabab
Add aliases for VAND imm to VBIC ~imm On ARM NEON, VAND with immediate (16/32 bits) is an alias to VBIC ~imm with the same type size. Adding that logic to the parser, and generating VBIC instructions from VAND asm files. This patch also fixes the validation routines for NEON splat immediates which were wrong. Fixes PR20702. llvm-svn: 218450
2014-09-25 19:31:24 +08:00
vbic.i32 d2, #0x03ffffff
vbic.i32 q2, #0x03ffff
vbic.i32 d2, #0x03ff
vbic.i32 d2, #0xff00ff
vbic.i16 d2, #0x03ff
vbic.i16 q2, #0xf0f0
vbic.i16 q2, #0xf0f0f0
Fix for PR18921, "vmov" part. Added support for bytes replication feature, so it could be GAS compatible. E.g. instructions below: "vmov.i32 d0, 0xffffffff" "vmvn.i32 d0, 0xabababab" "vmov.i32 d0, 0xabababab" "vmov.i16 d0, 0xabab" are incorrect, but we could deal with such cases. For first one we should emit: "vmov.i8 d0, 0xff" For second one ("vmvn"): "vmov.i8 d0, 0x54" For last two instructions it should emit: "vmov.i8 d0, 0xab" P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code. Just for keeping method bodies in harmony with themselves. llvm-svn: 207080
2014-04-24 14:03:01 +08:00
Add aliases for VAND imm to VBIC ~imm On ARM NEON, VAND with immediate (16/32 bits) is an alias to VBIC ~imm with the same type size. Adding that logic to the parser, and generating VBIC instructions from VAND asm files. This patch also fixes the validation routines for NEON splat immediates which were wrong. Fixes PR20702. llvm-svn: 218450
2014-09-25 19:31:24 +08:00
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i32 d2, #0x03ffffff
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i32 q2, #0x03ffff
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i32 d2, #0x03ff
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i32 d2, #0xff00ff
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i16 d2, #0x03ff
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i16 q2, #0xf0f0
@ CHECK: error: invalid operand for instruction
@ CHECK: vbic.i16 q2, #0xf0f0f0