2016-05-25 04:24:43 +08:00
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//===- Relocations.h -------------------------------------------*- C++ -*-===//
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//
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// The LLVM Linker
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLD_ELF_RELOCATIONS_H
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#define LLD_ELF_RELOCATIONS_H
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2017-10-03 05:00:41 +08:00
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#include "lld/Common/LLVM.h"
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#include "llvm/ADT/DenseMap.h"
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#include <map>
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#include <vector>
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namespace lld {
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namespace elf {
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class Symbol;
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class InputSection;
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class InputSectionBase;
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class OutputSection;
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class OutputSection;
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2017-10-12 06:49:24 +08:00
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// Represents a relocation type, such as R_X86_64_PC32 or R_ARM_THM_CALL.
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typedef uint32_t RelType;
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2016-10-21 12:52:11 +08:00
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// List of target-independent relocation types. Relocations read
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// from files are converted to these types so that the main code
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// doesn't have to know about architecture-specific details.
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enum RelExpr {
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R_INVALID,
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R_ABS,
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R_ADDEND,
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R_ARM_SBREL,
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R_GOT,
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R_GOTONLY_PC,
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R_GOTONLY_PC_FROM_END,
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R_GOTREL,
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R_GOTREL_FROM_END,
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R_GOT_FROM_END,
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R_GOT_OFF,
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R_GOT_PAGE_PC,
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R_GOT_PC,
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R_HINT,
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R_MIPS_GOTREL,
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R_MIPS_GOT_GP,
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R_MIPS_GOT_GP_PC,
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R_MIPS_GOT_LOCAL_PAGE,
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R_MIPS_GOT_OFF,
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R_MIPS_GOT_OFF32,
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R_MIPS_TLSGD,
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R_MIPS_TLSLD,
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R_NEG_TLS,
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R_NONE,
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R_PAGE_PC,
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R_PC,
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R_PLT,
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R_PLT_PAGE_PC,
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R_PLT_PC,
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R_PPC_OPD,
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R_PPC_PLT_OPD,
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R_PPC_TOC,
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2016-05-25 22:31:37 +08:00
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R_RELAX_GOT_PC,
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[ELF] - Implemented support for test/binop relaxations from latest ABI.
Patch implements next relaxation from latest ABI:
"Convert memory operand of test and binop into immediate operand, where binop is one of adc, add, and, cmp, or,
sbb, sub, xor instructions, when position-independent code is disabled."
It is described in System V Application Binary Interface AMD64 Architecture Processor
Supplement Draft Version 0.99.8 (https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-r249.pdf,
B.2 "B.2 Optimize GOTPCRELX Relocations").
Differential revision: http://reviews.llvm.org/D20793
llvm-svn: 271405
2016-06-02 00:45:30 +08:00
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R_RELAX_GOT_PC_NOPIC,
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R_RELAX_TLS_GD_TO_IE,
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R_RELAX_TLS_GD_TO_IE_ABS,
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R_RELAX_TLS_GD_TO_IE_END,
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R_RELAX_TLS_GD_TO_IE_PAGE_PC,
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R_RELAX_TLS_GD_TO_LE,
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R_RELAX_TLS_GD_TO_LE_NEG,
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R_RELAX_TLS_IE_TO_LE,
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R_RELAX_TLS_LD_TO_LE,
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R_SIZE,
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R_TLS,
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R_TLSDESC,
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R_TLSDESC_CALL,
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R_TLSDESC_PAGE,
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R_TLSGD,
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R_TLSGD_PC,
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R_TLSLD,
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R_TLSLD_PC,
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};
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2016-12-01 13:43:48 +08:00
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// Build a bitmask with one bit set for each RelExpr.
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//
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// Constexpr function arguments can't be used in static asserts, so we
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// use template arguments to build the mask.
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// But function template partial specializations don't exist (needed
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// for base case of the recursion), so we need a dummy struct.
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template <RelExpr... Exprs> struct RelExprMaskBuilder {
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static inline uint64_t build() { return 0; }
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};
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// Specialization for recursive case.
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template <RelExpr Head, RelExpr... Tail>
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struct RelExprMaskBuilder<Head, Tail...> {
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static inline uint64_t build() {
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static_assert(0 <= Head && Head < 64,
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"RelExpr is too large for 64-bit mask!");
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return (uint64_t(1) << Head) | RelExprMaskBuilder<Tail...>::build();
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}
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};
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// Return true if `Expr` is one of `Exprs`.
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// There are fewer than 64 RelExpr's, so we can represent any set of
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// RelExpr's as a constant bit mask and test for membership with a
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// couple cheap bitwise operations.
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template <RelExpr... Exprs> bool isRelExprOneOf(RelExpr Expr) {
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assert(0 <= Expr && (int)Expr < 64 &&
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"RelExpr is too large for 64-bit mask!");
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return (uint64_t(1) << Expr) & RelExprMaskBuilder<Exprs...>::build();
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}
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// Architecture-neutral representation of relocation.
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struct Relocation {
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RelExpr Expr;
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RelType Type;
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uint64_t Offset;
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int64_t Addend;
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Symbol *Sym;
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};
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template <class ELFT> void scanRelocations(InputSectionBase &);
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class ThunkSection;
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class Thunk;
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struct InputSectionDescription;
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class ThunkCreator {
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public:
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// Return true if Thunks have been added to OutputSections
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bool createThunks(ArrayRef<OutputSection *> OutputSections);
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// The number of completed passes of createThunks this permits us
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// to do one time initialization on Pass 0 and put a limit on the
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// number of times it can be called to prevent infinite loops.
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uint32_t Pass = 0;
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private:
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void mergeThunks(ArrayRef<OutputSection *> OutputSections);
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ThunkSection *getISDThunkSec(OutputSection *OS, InputSection *IS,
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InputSectionDescription *ISD, uint32_t Type,
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uint64_t Src);
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ThunkSection *getISThunkSec(InputSection *IS);
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void createInitialThunkSections(ArrayRef<OutputSection *> OutputSections);
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void forEachInputSectionDescription(
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ArrayRef<OutputSection *> OutputSections,
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std::function<void(OutputSection *, InputSectionDescription *)> Fn);
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std::pair<Thunk *, bool> getThunk(Symbol &Sym, RelType Type, uint64_t Src);
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ThunkSection *addThunkSection(OutputSection *OS, InputSectionDescription *,
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uint64_t Off);
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bool normalizeExistingThunk(Relocation &Rel, uint64_t Src);
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2017-07-05 17:53:33 +08:00
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// Record all the available Thunks for a Symbol
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llvm::DenseMap<Symbol *, std::vector<Thunk *>> ThunkedSymbols;
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// Find a Thunk from the Thunks symbol definition, we can use this to find
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// the Thunk from a relocation to the Thunks symbol definition.
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llvm::DenseMap<Symbol *, Thunk *> Thunks;
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2017-07-05 17:53:33 +08:00
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// Track InputSections that have an inline ThunkSection placed in front
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// an inline ThunkSection may have control fall through to the section below
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// so we need to make sure that there is only one of them.
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// The Mips LA25 Thunk is an example of an inline ThunkSection.
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llvm::DenseMap<InputSection *, ThunkSection *> ThunkedSections;
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};
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2017-02-16 08:12:34 +08:00
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// Return a int64_t to make sure we get the sign extension out of the way as
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// early as possible.
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template <class ELFT>
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static inline int64_t getAddend(const typename ELFT::Rel &Rel) {
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return 0;
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}
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template <class ELFT>
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static inline int64_t getAddend(const typename ELFT::Rela &Rel) {
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return Rel.r_addend;
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}
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} // namespace elf
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} // namespace lld
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#endif
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