2017-05-18 16:11:50 +08:00
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# RUN: llc -run-pass x86-fixup-LEAs -mtriple=x86_64-gnu-unknown -verify-machineinstrs -mcpu=corei7-avx -o - %s | FileCheck %s
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--- |
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; ModuleID = 'lea-2.ll'
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source_filename = "lea-2.ll"
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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;generated using: llc -stop-after x86-pad-short-functions lea-2.ll > leaFinxup64.mir
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;testleaadd_64_32_1: 3 operands LEA64_32r cannot be replaced with 2 add instructions
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; but can be replaced with 1 lea + 1 add
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define i32 @testleaadd_64_32_1() {
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ret i32 0
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}
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;testleaadd_rbp_64_32_1: 3 operands LEA64_32r cannot be replaced with 2 add instructions
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; where the base is rbp/r13/ebp register but it can be replaced with 1 lea + 1 add
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define i32 @testleaadd_rbp_64_32_1() {
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ret i32 0
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}
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;test1lea_rbp_64_32_1: 2 operands LEA64_32r where base register is rbp/r13/ebp and can not
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; be replaced with an add instruction but can be replaced with 1 lea instruction
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define i32 @test1lea_rbp_64_32_1() {
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ret i32 0
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}
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;test2add_64: 3 operands LEA64r that can be replaced with 2 add instructions
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define i32 @test2add_64() {
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ret i32 0
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}
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;test2add_rbp_64: 3 operands LEA64r that can be replaced with 2 add instructions
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; where the base is rbp/r13/ebp register
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define i32 @test2add_rbp_64() {
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ret i32 0
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}
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;test1add_rbp_64: 2 operands LEA64r where base register is rbp/r13/ebp and can be replaced
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; with an add instruction
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define i32 @test1add_rbp_64() {
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ret i32 0
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}
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;testleaadd_64_32: 3 operands LEA64_32r that can be replaced with 1 lea 1 add instructions
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define i32 @testleaadd_64_32() {
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ret i32 0
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}
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;testleaadd_rbp_64_32: 3 operands LEA64_32r that can be replaced with 1 lea 1 add instructions
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; where the base is rbp/r13/ebp register
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define i32 @testleaadd_rbp_64_32() {
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ret i32 0
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}
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;test1lea_rbp_64_32: 2 operands LEA64_32r where base register is rbp/r13/ebp and can be replaced
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; with a lea instruction
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define i32 @test1lea_rbp_64_32() {
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ret i32 0
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}
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;testleaadd_64: 3 operands LEA64r that can be replaced with 1 lea 1 add instructions
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define i32 @testleaadd_64() {
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ret i32 0
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}
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;testleaadd_rbp_64: 3 operands LEA64r that can be replaced with 1 lea 1 add instructions
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; where the base is rbp/r13/ebp register
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define i32 @testleaadd_rbp_64() {
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ret i32 0
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}
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;test1lea_rbp_64: 2 operands LEA64r wher base register is rbp/r13/ebp and can be replaced
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; with a lea instruction
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define i32 @test1lea_rbp_64() {
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ret i32 0
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}
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;test8: dst = base & scale!=1, can't optimize
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define i32 @test8() {
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ret i32 0
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}
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;testleaaddi32_64_32: 3 operands LEA64_32r that can be replaced with 1 lea + 1 add instructions where
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; ADD64ri32 is chosen
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define i32 @testleaaddi32_64_32() {
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ret i32 0
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}
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;test1mov1add_rbp_64_32: 2 operands LEA64_32r cannot be replaced with 1 add 1 mov instructions
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; where the base is rbp/r13/ebp register
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define i32 @test1mov1add_rbp_64_32() {
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ret i32 0
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}
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;testleaadd_rbp_index_64_32: 3 operands LEA64_32r that cannot replaced with 1 lea 1 add instructions
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; where the base and the index are ebp register and there is offset
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define i32 @testleaadd_rbp_index_64_32() {
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ret i32 0
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}
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;testleaadd_rbp_index2_64_32: 3 operands LEA64_32r that cannot replaced with 1 lea 1 add instructions
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; where the base and the index are ebp register and there is scale
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define i32 @testleaadd_rbp_index2_64_32() {
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ret i32 0
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}
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;test2addi32_64: 3 operands LEA64r that can be replaced with 2 add instructions where ADD64ri32
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; is chosen
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define i32 @test2addi32_64() {
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ret i32 0
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}
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;test1mov1add_rbp_64: 2 operands LEA64r that can be replaced with 1 add 1 mov instructions
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; where the base is rbp/r13/ebp register
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define i32 @test1mov1add_rbp_64() {
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ret i32 0
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}
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;testleaadd_rbp_index_64: 3 operands LEA64r that can be replaced with 1 lea 1 add instructions
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; where the base and the index are ebp register and there is offset
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define i32 @testleaadd_rbp_index_64() {
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ret i32 0
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}
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;testleaadd_rbp_index2_64: 3 operands LEA64r that can be replaced with 1 lea 1 add instructions
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; where the base and the index are ebp register and there is scale
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define i32 @testleaadd_rbp_index2_64() {
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ret i32 0
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}
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;test_skip_opt_64: 3 operands LEA64r that can not be replaced with 2 instructions
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define i32 @test_skip_opt_64() {
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ret i32 0
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}
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;test_skip_eflags_64: LEA64r that cannot be replaced since its not safe to clobber eflags
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define i32 @test_skip_eflags_64() {
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ret i32 0
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}
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;test_skip_opt_64_32: 3 operands LEA64_32r that can not be replaced with 2 instructions
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define i32 @test_skip_opt_64_32() {
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ret i32 0
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}
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;test_skip_eflags_64_32: LEA64_32r that cannot be replaced since its not safe to clobber eflags
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define i32 @test_skip_eflags_64_32() {
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ret i32 0
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}
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...
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---
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name: testleaadd_64_32_1
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$rax' }
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- { reg: '$rbp' }
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2017-05-18 16:11:50 +08:00
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0 (%ir-block.0):
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2018-02-01 06:04:26 +08:00
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liveins: $rax, $rbp
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; CHECK: $eax = LEA64_32r killed $rax, 1, killed $rbp, 0
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; CHECK: $eax = ADD32ri8 $eax, -5
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2017-05-18 16:11:50 +08:00
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2018-02-01 06:04:26 +08:00
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$eax = LEA64_32r killed $rax, 1, killed $rbp, -5, $noreg
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RETQ $eax
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2017-05-18 16:11:50 +08:00
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...
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---
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name: testleaadd_rbp_64_32_1
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$rax' }
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- { reg: '$rbp' }
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2017-05-18 16:11:50 +08:00
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0 (%ir-block.0):
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2018-02-01 06:04:26 +08:00
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liveins: $rax, $rbp
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; CHECK: $ebp = LEA64_32r killed $rax, 1, killed $rbp, 0
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; CHECK: $ebp = ADD32ri8 $ebp, -5
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2017-05-18 16:11:50 +08:00
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2018-02-01 06:04:26 +08:00
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$ebp = LEA64_32r killed $rbp, 1, killed $rax, -5, $noreg
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RETQ $ebp
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2017-05-18 16:11:50 +08:00
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...
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---
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name: test1lea_rbp_64_32_1
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$rax' }
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- { reg: '$rbp' }
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2017-05-18 16:11:50 +08:00
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0 (%ir-block.0):
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2018-02-01 06:04:26 +08:00
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liveins: $rax, $rbp
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; CHECK: $ebp = LEA64_32r killed $rax, 1, killed $rbp, 0
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2017-05-18 16:11:50 +08:00
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2018-02-01 06:04:26 +08:00
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$ebp = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg
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RETQ $ebp
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2017-05-18 16:11:50 +08:00
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...
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---
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name: test2add_64
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$rax' }
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- { reg: '$rbp' }
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2017-05-18 16:11:50 +08:00
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0 (%ir-block.0):
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2018-02-01 06:04:26 +08:00
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liveins: $rax, $rbp
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; CHECK: $rax = ADD64rr $rax, killed $rbp
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; CHECK: $rax = ADD64ri8 $rax, -5
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2017-05-18 16:11:50 +08:00
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2018-02-01 06:04:26 +08:00
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$rax = LEA64r killed $rax, 1, killed $rbp, -5, $noreg
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RETQ $eax
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2017-05-18 16:11:50 +08:00
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...
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---
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name: test2add_rbp_64
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$rax' }
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- { reg: '$rbp' }
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2017-05-18 16:11:50 +08:00
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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body: |
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bb.0 (%ir-block.0):
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2018-02-01 06:04:26 +08:00
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liveins: $rax, $rbp
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; CHECK: $rbp = ADD64rr $rbp, killed $rax
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; CHECK: $rbp = ADD64ri8 $rbp, -5
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2017-05-18 16:11:50 +08:00
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2018-02-01 06:04:26 +08:00
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$rbp = LEA64r killed $rbp, 1, killed $rax, -5, $noreg
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RETQ $ebp
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2017-05-18 16:11:50 +08:00
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...
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---
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name: test1add_rbp_64
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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2018-02-01 06:04:26 +08:00
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- { reg: '$rax' }
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- { reg: '$rbp' }
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2017-05-18 16:11:50 +08:00
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp
|
|
|
|
; CHECK: $rbp = ADD64rr $rbp, killed $rax
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$rbp = LEA64r killed $rbp, 1, killed $rax, 0, $noreg
|
|
|
|
RETQ $ebp
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: testleaadd_64_32
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
|
|
|
- { reg: '$rbx' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp
|
|
|
|
; CHECK: $ebx = LEA64_32r killed $rax, 1, killed $rbp, 0, $noreg
|
|
|
|
; CHECK: $ebx = ADD32ri8 $ebx, -5
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$ebx = LEA64_32r killed $rax, 1, killed $rbp, -5, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: testleaadd_rbp_64_32
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
|
|
|
- { reg: '$rbx' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp
|
|
|
|
; CHECK: $ebx = LEA64_32r killed $rax, 1, killed $rbp, 0, $noreg
|
|
|
|
; CHECK: $ebx = ADD32ri8 $ebx, -5
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$ebx = LEA64_32r killed $rbp, 1, killed $rax, -5, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test1lea_rbp_64_32
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
|
|
|
- { reg: '$rbx' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp
|
|
|
|
; CHECK: $ebx = LEA64_32r killed $rax, 1, killed $rbp, 0, $noreg
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$ebx = LEA64_32r killed $rbp, 1, killed $rax, 0, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: testleaadd_64
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
|
|
|
- { reg: '$rbx' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp
|
|
|
|
; CHECK: $rbx = LEA64r killed $rax, 1, killed $rbp, 0, $noreg
|
|
|
|
; CHECK: $rbx = ADD64ri8 $rbx, -5
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$rbx = LEA64r killed $rax, 1, killed $rbp, -5, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: testleaadd_rbp_64
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
|
|
|
- { reg: '$rbx' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp
|
|
|
|
; CHECK: $rbx = LEA64r killed $rax, 1, killed $rbp, 0, $noreg
|
|
|
|
; CHECK: $rbx = ADD64ri8 $rbx, -5
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$rbx = LEA64r killed $rbp, 1, killed $rax, -5, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test1lea_rbp_64
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
|
|
|
- { reg: '$rbx' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp
|
|
|
|
; CHECK: $rbx = LEA64r killed $rax, 1, killed $rbp, 0, $noreg
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$rbx = LEA64r killed $rbp, 1, killed $rax, 0, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test8
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rdi' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rdi, $rbp
|
|
|
|
; CHECK: $r12 = LEA64r $noreg, 2, killed $r13, 5, $noreg
|
|
|
|
; CHECK: $r12 = ADD64rr $r12, killed $rbp
|
|
|
|
$rbp = KILL $rbp, implicit-def $rbp
|
|
|
|
$r13 = KILL $rdi, implicit-def $r13
|
|
|
|
$r12 = LEA64r killed $rbp, 2, killed $r13, 5, $noreg
|
|
|
|
RETQ $r12
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: testleaaddi32_64_32
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp
|
|
|
|
; CHECK: $eax = LEA64_32r killed $rax, 1, killed $rbp, 0
|
|
|
|
; CHECK: $eax = ADD32ri $eax, 129
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$eax = LEA64_32r killed $rax, 1, killed $rbp, 129, $noreg
|
|
|
|
RETQ $eax
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test1mov1add_rbp_64_32
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
; CHECK: $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 0, $noreg
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$ebx = LEA64_32r killed $rbp, 1, killed $rbp, 0, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: testleaadd_rbp_index_64_32
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rbx' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
; CHECK: $ebx = LEA64_32r killed $rbp, 1, killed $rbp, 5, $noreg
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$ebx = LEA64_32r killed $rbp, 1, killed $rbp, 5, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: testleaadd_rbp_index2_64_32
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rbx' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $eax, $ebp, $ebx
|
|
|
|
; CHECK: $ebx = LEA64_32r killed $rbp, 4, killed $rbp, 5, $noreg
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$ebx = LEA64_32r killed $rbp, 4, killed $rbp, 5, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test2addi32_64
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp
|
|
|
|
; CHECK: $rax = ADD64rr $rax, killed $rbp
|
|
|
|
; CHECK: $rax = ADD64ri32 $rax, 129
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$rax = LEA64r killed $rax, 1, killed $rbp, 129, $noreg
|
|
|
|
RETQ $eax
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test1mov1add_rbp_64
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rax' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
; CHECK: $rbx = MOV64rr $rbp
|
|
|
|
; CHECK: $rbx = ADD64rr $rbx, $rbp
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$rbx = LEA64r killed $rbp, 1, $rbp, 0, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: testleaadd_rbp_index_64
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rbx' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
; CHECK: $rbx = LEA64r $noreg, 1, $rbp, 5, $noreg
|
|
|
|
; CHECK: $rbx = ADD64rr $rbx, $rbp
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$rbx = LEA64r $rbp, 1, $rbp, 5, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: testleaadd_rbp_index2_64
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rbx' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
; CHECK: $rbx = LEA64r $noreg, 4, $rbp, 5, $noreg
|
|
|
|
; CHECK: $rbx = ADD64rr $rbx, $rbp
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$rbx = LEA64r $rbp, 4, $rbp, 5, $noreg
|
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test_skip_opt_64
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rbx' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
; CHECK: $rbp = LEA64r killed $rbp, 4, killed $rbp, 0, $noreg
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$rbp = LEA64r killed $rbp, 4, killed $rbp, 0, $noreg
|
|
|
|
RETQ $ebp
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test_skip_eflags_64
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rbp' }
|
|
|
|
- { reg: '$rax' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
; CHECK: $rbx = LEA64r killed $rax, 4, killed $rax, 5, $noreg
|
|
|
|
; CHECK: $rbp = LEA64r killed $rbx, 4, killed $rbx, 0, $noreg
|
|
|
|
; CHECK: $rbp = ADD64ri8 $rbp, 5
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
CMP64rr $rax, killed $rbx, implicit-def $eflags
|
|
|
|
$rbx = LEA64r killed $rax, 4, killed $rax, 5, $noreg
|
[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.
Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.
Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon
Reviewed By: RKSimon
Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60228
llvm-svn: 357802
2019-04-06 03:28:09 +08:00
|
|
|
JCC_1 %bb.1, 4, implicit $eflags
|
2018-02-01 06:04:26 +08:00
|
|
|
RETQ $ebx
|
2017-05-18 16:11:50 +08:00
|
|
|
bb.1:
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
$rbp = LEA64r killed $rbx, 4, killed $rbx, 5, $noreg
|
|
|
|
RETQ $ebp
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test_skip_opt_64_32
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rbx' }
|
|
|
|
- { reg: '$rbp' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
; CHECK: $ebp = LEA64_32r killed $rbp, 4, killed $rbp, 0, $noreg
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
$ebp = LEA64_32r killed $rbp, 4, killed $rbp, 0, $noreg
|
|
|
|
RETQ $ebp
|
2017-05-18 16:11:50 +08:00
|
|
|
|
|
|
|
...
|
|
|
|
---
|
|
|
|
name: test_skip_eflags_64_32
|
|
|
|
alignment: 4
|
|
|
|
exposesReturnsTwice: false
|
|
|
|
legalized: false
|
|
|
|
regBankSelected: false
|
|
|
|
selected: false
|
|
|
|
tracksRegLiveness: true
|
|
|
|
liveins:
|
2018-02-01 06:04:26 +08:00
|
|
|
- { reg: '$rbp' }
|
|
|
|
- { reg: '$rax' }
|
2017-05-18 16:11:50 +08:00
|
|
|
frameInfo:
|
|
|
|
isFrameAddressTaken: false
|
|
|
|
isReturnAddressTaken: false
|
|
|
|
hasStackMap: false
|
|
|
|
hasPatchPoint: false
|
|
|
|
stackSize: 0
|
|
|
|
offsetAdjustment: 0
|
|
|
|
maxAlignment: 0
|
|
|
|
adjustsStack: false
|
|
|
|
hasCalls: false
|
|
|
|
maxCallFrameSize: 0
|
|
|
|
hasOpaqueSPAdjustment: false
|
|
|
|
hasVAStart: false
|
|
|
|
hasMustTailInVarArgFunc: false
|
|
|
|
body: |
|
|
|
|
bb.0 (%ir-block.0):
|
2018-02-01 06:04:26 +08:00
|
|
|
liveins: $rax, $rbp, $rbx
|
|
|
|
; CHECK: $ebx = LEA64_32r killed $rax, 4, killed $rax, 5, $noreg
|
|
|
|
; CHECK: $ebp = LEA64_32r killed $rbx, 4, killed $rbx, 0, $noreg
|
|
|
|
; CHECK: $ebp = ADD32ri8 $ebp, 5
|
2017-05-18 16:11:50 +08:00
|
|
|
|
2018-02-01 06:04:26 +08:00
|
|
|
CMP64rr $rax, killed $rbx, implicit-def $eflags
|
|
|
|
$ebx = LEA64_32r killed $rax, 4, killed $rax, 5, $noreg
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[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.
Summary:
This avoids needing an isel pattern for each condition code. And it removes translation switches for converting between Jcc instructions and condition codes.
Now the printer, encoder and disassembler take care of converting the immediate. We use InstAliases to handle the assembly matching. But we print using the asm string in the instruction definition. The instruction itself is marked IsCodeGenOnly=1 to hide it from the assembly parser.
Reviewers: spatel, lebedev.ri, courbet, gchatelet, RKSimon
Reviewed By: RKSimon
Subscribers: MatzeB, qcolombet, eraman, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60228
llvm-svn: 357802
2019-04-06 03:28:09 +08:00
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JCC_1 %bb.1, 4, implicit $eflags
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2018-02-01 06:04:26 +08:00
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RETQ $ebx
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2017-05-18 16:11:50 +08:00
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bb.1:
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2018-02-01 06:04:26 +08:00
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liveins: $rax, $rbp, $rbx
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$ebp = LEA64_32r killed $rbx, 4, killed $rbx, 5, $noreg
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RETQ $ebp
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2017-05-18 16:11:50 +08:00
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...
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