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llvm-project/llvm/test/MC/Mips/msa/test_2r.s

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[mips][msa] Remove unneeded triple directive in MSA MC tests. No functional changes. llvm-svn: 197559
2013-12-18 19:06:13 +08:00
# RUN: llvm-mc %s -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s
[PATCH 1/4] [mips][msa] Source register of FILL instructions is GPR and not an MSA register Patch by Matheus Almeida llvm-svn: 191684
2013-10-01 01:43:04 +08:00
#
[mips][msa] Remove unneeded triple directive in MSA MC tests. No functional changes. llvm-svn: 197559
2013-12-18 19:06:13 +08:00
# RUN: llvm-mc %s -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP
[PATCH 1/4] [mips][msa] Source register of FILL instructions is GPR and not an MSA register Patch by Matheus Almeida llvm-svn: 191684
2013-10-01 01:43:04 +08:00
#
# CHECK: fill.b $w30, $9 # encoding: [0x7b,0x00,0x4f,0x9e]
# CHECK: fill.h $w31, $23 # encoding: [0x7b,0x01,0xbf,0xde]
# CHECK: fill.w $w16, $24 # encoding: [0x7b,0x02,0xc4,0x1e]
[mips][msa] Direct Object Emission for 2R instructions. This patch adds Direct Object Emission support for 2R instructions: nloc.{b,h,w}, nlzc.{b,h,w}, pcnt.{b,w,d}. Patch by Matheus Almeida llvm-svn: 191685
2013-10-01 01:52:33 +08:00
# CHECK: nloc.b $w21, $w0 # encoding: [0x7b,0x08,0x05,0x5e]
# CHECK: nloc.h $w18, $w31 # encoding: [0x7b,0x09,0xfc,0x9e]
# CHECK: nloc.w $w2, $w23 # encoding: [0x7b,0x0a,0xb8,0x9e]
# CHECK: nloc.d $w4, $w10 # encoding: [0x7b,0x0b,0x51,0x1e]
# CHECK: nlzc.b $w31, $w2 # encoding: [0x7b,0x0c,0x17,0xde]
# CHECK: nlzc.h $w27, $w22 # encoding: [0x7b,0x0d,0xb6,0xde]
# CHECK: nlzc.w $w10, $w29 # encoding: [0x7b,0x0e,0xea,0x9e]
# CHECK: nlzc.d $w25, $w9 # encoding: [0x7b,0x0f,0x4e,0x5e]
# CHECK: pcnt.b $w20, $w18 # encoding: [0x7b,0x04,0x95,0x1e]
# CHECK: pcnt.h $w0, $w8 # encoding: [0x7b,0x05,0x40,0x1e]
# CHECK: pcnt.w $w23, $w9 # encoding: [0x7b,0x06,0x4d,0xde]
# CHECK: pcnt.d $w21, $w24 # encoding: [0x7b,0x07,0xc5,0x5e]
[PATCH 1/4] [mips][msa] Source register of FILL instructions is GPR and not an MSA register Patch by Matheus Almeida llvm-svn: 191684
2013-10-01 01:43:04 +08:00
# CHECKOBJDUMP: fill.b $w30, $9
# CHECKOBJDUMP: fill.h $w31, $23
# CHECKOBJDUMP: fill.w $w16, $24
[mips][msa] Direct Object Emission for 2R instructions. This patch adds Direct Object Emission support for 2R instructions: nloc.{b,h,w}, nlzc.{b,h,w}, pcnt.{b,w,d}. Patch by Matheus Almeida llvm-svn: 191685
2013-10-01 01:52:33 +08:00
# CHECKOBJDUMP: nloc.b $w21, $w0
# CHECKOBJDUMP: nloc.h $w18, $w31
# CHECKOBJDUMP: nloc.w $w2, $w23
# CHECKOBJDUMP: nloc.d $w4, $w10
# CHECKOBJDUMP: nlzc.b $w31, $w2
# CHECKOBJDUMP: nlzc.h $w27, $w22
# CHECKOBJDUMP: nlzc.w $w10, $w29
# CHECKOBJDUMP: nlzc.d $w25, $w9
# CHECKOBJDUMP: pcnt.b $w20, $w18
# CHECKOBJDUMP: pcnt.h $w0, $w8
# CHECKOBJDUMP: pcnt.w $w23, $w9
# CHECKOBJDUMP: pcnt.d $w21, $w24
[PATCH 1/4] [mips][msa] Source register of FILL instructions is GPR and not an MSA register Patch by Matheus Almeida llvm-svn: 191684
2013-10-01 01:43:04 +08:00
fill.b $w30, $9
fill.h $w31, $23
fill.w $w16, $24
[mips][msa] Direct Object Emission for 2R instructions. This patch adds Direct Object Emission support for 2R instructions: nloc.{b,h,w}, nlzc.{b,h,w}, pcnt.{b,w,d}. Patch by Matheus Almeida llvm-svn: 191685
2013-10-01 01:52:33 +08:00
nloc.b $w21, $w0
nloc.h $w18, $w31
nloc.w $w2, $w23
nloc.d $w4, $w10
nlzc.b $w31, $w2
nlzc.h $w27, $w22
nlzc.w $w10, $w29
nlzc.d $w25, $w9
pcnt.b $w20, $w18
pcnt.h $w0, $w8
pcnt.w $w23, $w9
pcnt.d $w21, $w24