forked from OSchip/llvm-project
55 lines
1.5 KiB
Plaintext
55 lines
1.5 KiB
Plaintext
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# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z15 -start-before=greedy %s -o - \
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# RUN: | FileCheck %s
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#
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# Test that two-address reg alloc hints are given so that a SELR becomes LOCR.
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--- |
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define i32 @fun(i32 %arg, i32 %arg1, i32 %arg2, i32* %arg3) { ret i32 0 }
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declare void @foo(i32)
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...
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# CHECK-LABEL: fun
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# CHECK: locr
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---
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name: fun
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr32bit }
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- { id: 1, class: gr32bit }
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- { id: 2, class: gr32bit }
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- { id: 3, class: gr32bit }
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- { id: 4, class: gr64bit }
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- { id: 5, class: grx32bit }
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- { id: 6, class: grx32bit }
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- { id: 7, class: addr64bit }
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- { id: 8, class: grx32bit }
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- { id: 9, class: grx32bit }
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- { id: 10, class: gr64bit }
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- { id: 11, class: gr32bit }
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frameInfo:
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maxAlignment: 1
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hasCalls: true
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machineFunctionInfo: {}
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body: |
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bb.0:
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%5:grx32bit = LHIMux 88
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%8:grx32bit = LHIMux 77
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%9:grx32bit = LHIMux 66
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bb.1:
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%6:grx32bit = LLCMux undef %7:addr64bit, 0, $noreg :: (load 1 from `i8* undef`)
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CHIMux %6, 1, implicit-def $cc
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%11:gr32bit = SELRMux %8, %9:grx32bit, 14, 6, implicit killed $cc
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CHIMux %6, 2, implicit-def $cc
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%0:gr32bit = SELRMux %11, %5, 14, 8, implicit killed $cc
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ADJCALLSTACKDOWN 0, 0
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%10:gr64bit = LGFR %0
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$r2d = COPY %10
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CallBRASL @foo, killed $r2d, csr_systemz, implicit-def dead $r14d, implicit-def dead $cc, implicit $fpc
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ADJCALLSTACKUP 0, 0
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J %bb.1
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...
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