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llvm-project/llvm/test/CodeGen/PowerPC/fma-mutate.ll

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[NFC] [PowerPC] Refresh fma-mutate.ll using script This is a clean-up after D78989. The old comments are out of date.
2020-05-19 13:37:25 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control Summary: Honoring no signed zeroes is also available as a user control through clang separately regardless of fastmath or UnsafeFPMath context, DAG guards should reflect this context. Reviewers: spatel, arsenm, hfinkel, wristow, craig.topper Reviewed By: spatel Subscribers: rampitec, foad, nhaehnle, wuzish, nemanjai, jvesely, wdng, javed.absar, MaskRay, jsji Differential Revision: https://reviews.llvm.org/D65170 llvm-svn: 367486
2019-08-01 05:57:28 +08:00
; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx -disable-ppc-vsx-fma-mutation=false | FileCheck %s
[PowerPC] Avoid VSX FMA mutate when killed product reg = addend reg With VSX enabled, test/CodeGen/PowerPC/recipest.ll exposes a bug in the FMA mutation pass. If we have a situation where a killed product register is the same register as the FMA target, such as: %vreg5<def,tied1> = XSNMSUBADP %vreg5<tied0>, %vreg11, %vreg5, %RM<imp-use>; VSFRC:%vreg5 F8RC:%vreg11 then the substitution makes no sense. We end up getting a crash when we try to extend the interval associated with the killed product register, as there is already a live range for %vreg5 there. This patch just disables the mutation under those circumstances. Since recipest.ll generates different code with VMX enabled, I've modified that test to use -mattr=-vsx. I've borrowed the code from that test that exposed the bug and placed it in fma-mutate.ll, where it tests several mutation opportunities including the "bad" one. llvm-svn: 220290
2014-10-21 21:02:37 +08:00
declare double @llvm.sqrt.f64(double)
[NFC] [PowerPC] Refresh fma-mutate.ll using script This is a clean-up after D78989. The old comments are out of date.
2020-05-19 13:37:25 +08:00
; Test several VSX FMA mutation opportunities.
; This is reasonable transformation since it eliminates extra register copy.
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control Summary: Honoring no signed zeroes is also available as a user control through clang separately regardless of fastmath or UnsafeFPMath context, DAG guards should reflect this context. Reviewers: spatel, arsenm, hfinkel, wristow, craig.topper Reviewed By: spatel Subscribers: rampitec, foad, nhaehnle, wuzish, nemanjai, jvesely, wdng, javed.absar, MaskRay, jsji Differential Revision: https://reviews.llvm.org/D65170 llvm-svn: 367486
2019-08-01 05:57:28 +08:00
define double @foo3_fmf(double %a) nounwind {
[NFC] [PowerPC] Refresh fma-mutate.ll using script This is a clean-up after D78989. The old comments are out of date.
2020-05-19 13:37:25 +08:00
; CHECK-LABEL: foo3_fmf:
; CHECK: # %bb.0:
[DAGCombine] Add hook to allow target specific test for sqrt input PowerPC has instruction ftsqrt/xstsqrtdp etc to do the input test for software square root. LLVM now tests it with smallest normalized value using abs + setcc. We should add hook to target that has test instructions. Reviewed By: Spatel, Chen Zheng, Qiu Chao Fang Differential Revision: https://reviews.llvm.org/D80706
2020-11-25 13:37:15 +08:00
; CHECK-NEXT: xstsqrtdp 0, 1
; CHECK-NEXT: bc 12, 2, .LBB0_2
[NFC] [PowerPC] Refresh fma-mutate.ll using script This is a clean-up after D78989. The old comments are out of date.
2020-05-19 13:37:25 +08:00
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: xsrsqrtedp 0, 1
; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-NEXT: lfs 3, .LCPI0_0@toc@l(3)
; CHECK-NEXT: addis 3, 2, .LCPI0_1@toc@ha
; CHECK-NEXT: lfs 4, .LCPI0_1@toc@l(3)
; CHECK-NEXT: xsmuldp 2, 1, 0
; CHECK-NEXT: xsmaddmdp 2, 0, 3
; CHECK-NEXT: xsmuldp 0, 0, 4
; CHECK-NEXT: xsmuldp 0, 0, 2
; CHECK-NEXT: xsmuldp 1, 1, 0
; CHECK-NEXT: xsmaddadp 3, 1, 0
; CHECK-NEXT: xsmuldp 0, 1, 4
[DAGCombine] Adding a hook to improve the precision of fsqrt if the input is denormal For now, we will hardcode the result as 0.0 if the input is denormal or 0. That will have the impact the precision. As the fsqrt added belong to the cold path of the cmp+branch, it won't impact the performance for normal inputs for PowerPC, but improve the precision if the input is denormal. Reviewed By: Spatel Differential Revision: https://reviews.llvm.org/D80974
2020-11-27 10:10:55 +08:00
; CHECK-NEXT: xsmuldp 1, 0, 3
; CHECK-NEXT: blr
[NFC] [PowerPC] Refresh fma-mutate.ll using script This is a clean-up after D78989. The old comments are out of date.
2020-05-19 13:37:25 +08:00
; CHECK-NEXT: .LBB0_2:
[DAGCombine] Adding a hook to improve the precision of fsqrt if the input is denormal For now, we will hardcode the result as 0.0 if the input is denormal or 0. That will have the impact the precision. As the fsqrt added belong to the cold path of the cmp+branch, it won't impact the performance for normal inputs for PowerPC, but improve the precision if the input is denormal. Reviewed By: Spatel Differential Revision: https://reviews.llvm.org/D80974
2020-11-27 10:10:55 +08:00
; CHECK-NEXT: xssqrtdp 1, 1
[NFC] [PowerPC] Refresh fma-mutate.ll using script This is a clean-up after D78989. The old comments are out of date.
2020-05-19 13:37:25 +08:00
; CHECK-NEXT: blr
[NFC] [PowerPC] Narrow fast-math flags in tests A lot of tests under PowerPC are using fast flag, while fast is just alias of 7 fast-math flags. This change makes test points clearer. mc-instrlat.ll and sms-iterator.ll keeps unchanged since they are not testing fast-math behavior. (one for machine combiner crash, one for machine pipeliner bug) Reviewed By: steven.zhang, spatel Differential Revision: https://reviews.llvm.org/D78989
2020-05-13 17:21:31 +08:00
%r = call reassoc afn ninf double @llvm.sqrt.f64(double %a)
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control Summary: Honoring no signed zeroes is also available as a user control through clang separately regardless of fastmath or UnsafeFPMath context, DAG guards should reflect this context. Reviewers: spatel, arsenm, hfinkel, wristow, craig.topper Reviewed By: spatel Subscribers: rampitec, foad, nhaehnle, wuzish, nemanjai, jvesely, wdng, javed.absar, MaskRay, jsji Differential Revision: https://reviews.llvm.org/D65170 llvm-svn: 367486
2019-08-01 05:57:28 +08:00
ret double %r
}
define double @foo3_safe(double %a) nounwind {
[NFC] [PowerPC] Refresh fma-mutate.ll using script This is a clean-up after D78989. The old comments are out of date.
2020-05-19 13:37:25 +08:00
; CHECK-LABEL: foo3_safe:
; CHECK: # %bb.0:
; CHECK-NEXT: xssqrtdp 1, 1
; CHECK-NEXT: blr
Migrate some more fadd and fsub cases away from UnsafeFPMath control to utilize NoSignedZerosFPMath options control Summary: Honoring no signed zeroes is also available as a user control through clang separately regardless of fastmath or UnsafeFPMath context, DAG guards should reflect this context. Reviewers: spatel, arsenm, hfinkel, wristow, craig.topper Reviewed By: spatel Subscribers: rampitec, foad, nhaehnle, wuzish, nemanjai, jvesely, wdng, javed.absar, MaskRay, jsji Differential Revision: https://reviews.llvm.org/D65170 llvm-svn: 367486
2019-08-01 05:57:28 +08:00
%r = call double @llvm.sqrt.f64(double %a)
ret double %r
[PowerPC] Avoid VSX FMA mutate when killed product reg = addend reg With VSX enabled, test/CodeGen/PowerPC/recipest.ll exposes a bug in the FMA mutation pass. If we have a situation where a killed product register is the same register as the FMA target, such as: %vreg5<def,tied1> = XSNMSUBADP %vreg5<tied0>, %vreg11, %vreg5, %RM<imp-use>; VSFRC:%vreg5 F8RC:%vreg11 then the substitution makes no sense. We end up getting a crash when we try to extend the interval associated with the killed product register, as there is already a live range for %vreg5 there. This patch just disables the mutation under those circumstances. Since recipest.ll generates different code with VMX enabled, I've modified that test to use -mattr=-vsx. I've borrowed the code from that test that exposed the bug and placed it in fma-mutate.ll, where it tests several mutation opportunities including the "bad" one. llvm-svn: 220290
2014-10-21 21:02:37 +08:00
}