forked from OSchip/llvm-project
41 lines
806 B
LLVM
41 lines
806 B
LLVM
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; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s
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; CHECK: rotrv $2, $4, $2
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define i32 @rot0(i32 %a, i32 %b) nounwind readnone {
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entry:
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%shl = shl i32 %a, %b
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%sub = sub i32 32, %b
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%shr = lshr i32 %a, %sub
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%or = or i32 %shr, %shl
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ret i32 %or
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}
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; CHECK: rotr $2, $4, 22
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define i32 @rot1(i32 %a) nounwind readnone {
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entry:
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%shl = shl i32 %a, 10
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%shr = lshr i32 %a, 22
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%or = or i32 %shl, %shr
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ret i32 %or
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}
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; CHECK: rotrv $2, $4, $5
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define i32 @rot2(i32 %a, i32 %b) nounwind readnone {
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entry:
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%shr = lshr i32 %a, %b
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%sub = sub i32 32, %b
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%shl = shl i32 %a, %sub
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%or = or i32 %shl, %shr
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ret i32 %or
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}
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; CHECK: rotr $2, $4, 10
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define i32 @rot3(i32 %a) nounwind readnone {
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entry:
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%shr = lshr i32 %a, 10
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%shl = shl i32 %a, 22
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%or = or i32 %shr, %shl
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ret i32 %or
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}
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