forked from OSchip/llvm-project
36 lines
1.1 KiB
Plaintext
36 lines
1.1 KiB
Plaintext
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=gfx906 -run-pass=si-lower-sgpr-spills,prologepilog -o - %s | FileCheck %s
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# Make sure the modified CSR VGPRs are added as live-in to the entry
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# block.
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---
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name: def_csr_sgpr
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tracksRegLiveness: true
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machineFunctionInfo:
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scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr3
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stackPtrOffsetReg: $sgpr32
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body: |
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; CHECK-LABEL: name: def_csr_sgpr
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $sgpr42, $sgpr43, $sgpr46, $sgpr47, $vgpr0
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; CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr42, 0, $vgpr0
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; CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr43, 1, $vgpr0
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; CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr46, 2, $vgpr0
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; CHECK: $vgpr0 = V_WRITELANE_B32 killed $sgpr47, 3, $vgpr0
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; CHECK: S_NOP 0
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; CHECK: bb.1:
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; CHECK: liveins: $vgpr0
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; CHECK: $sgpr42 = S_MOV_B32 0
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; CHECK: $sgpr43 = S_MOV_B32 1
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; CHECK: $sgpr46_sgpr47 = S_MOV_B64 2
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bb.0:
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S_NOP 0
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bb.1:
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$sgpr42 = S_MOV_B32 0
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$sgpr43 = S_MOV_B32 1
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$sgpr46_sgpr47 = S_MOV_B64 2
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...
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