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[XRay] Fix machine verifier issues in X86 I'm not sure if this fix is the right thing to do, but it seemed to me that PATCHABLE_RET and PATCHABLE_TAIL_CALL don't have any defs. Running the following: ``` LLVM_ENABLE_MACHINE_VERIFIER=1 ./build/bin/llvm-lit -v -a test/CodeGen/X86/xray-* ``` results in the following tests to fail (along others): ``` LLVM :: CodeGen/X86/xray-attribute-instrumentation.ll LLVM :: CodeGen/X86/xray-custom-log.ll LLVM :: CodeGen/X86/xray-log-args.ll LLVM :: CodeGen/X86/xray-loop-detection.ll LLVM :: CodeGen/X86/xray-multiplerets-in-blocks.mir LLVM :: CodeGen/X86/xray-section-group.ll LLVM :: CodeGen/X86/xray-selective-instrumentation.ll LLVM :: CodeGen/X86/xray-tail-call-sled.ll LLVM :: CodeGen/X86/xray-typed-event-log.ll ``` The errors are: ``` *** Bad machine code: Explicit definition must be a register *** - function: fn - basic block: %bb.0 (0x7fa31a84d908) - instruction: PATCHABLE_RET 2560, $eax - operand 0: 2560 ``` and ``` *** Bad machine code: Explicit definition must be a register *** - function: caller - basic block: %bb.0 (0x7fbff3044108) - instruction: PATCHABLE_TAIL_CALL 3009, @callee, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit $edi - operand 0: 3009 ``` Differential Revision: https://reviews.llvm.org/D49187 llvm-svn: 336906
2018-07-12 22:36:43 +08:00
; RUN: llc -verify-machineinstrs -mcpu=nehalem < %s | grep xray_sled_
XRay: Add entry and exit sleds Summary: In this patch we implement the following parts of XRay: - Supporting a function attribute named 'function-instrument' which currently only supports 'xray-always'. We should be able to use this attribute for other instrumentation approaches. - Supporting a function attribute named 'xray-instruction-threshold' used to determine whether a function is instrumented with a minimum number of instructions (IR instruction counts). - X86-specific nop sleds as described in the white paper. - A machine function pass that adds the different instrumentation marker instructions at a very late stage. - A way of identifying which return opcode is considered "normal" for each architecture. There are some caveats here: 1) We don't handle PATCHABLE_RET in platforms other than x86_64 yet -- this means if IR used PATCHABLE_RET directly instead of a normal ret, instruction lowering for that platform might do the wrong thing. We think this should be handled at instruction selection time to by default be unpacked for platforms where XRay is not availble yet. 2) The generated section for X86 is different from what is described from the white paper for the sole reason that LLVM allows us to do this neatly. We're taking the opportunity to deviate from the white paper from this perspective to allow us to get richer information from the runtime library. Reviewers: sanjoy, eugenis, kcc, pcc, echristo, rnk Subscribers: niravd, majnemer, atrick, rnk, emaste, bmakam, mcrosier, mehdi_amini, llvm-commits Differential Revision: http://reviews.llvm.org/D19904 llvm-svn: 275367
2016-07-14 12:06:33 +08:00
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
define i32 @foo() nounwind uwtable "xray-instruction-threshold"="1" {
entry:
ret i32 0
}