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llvm-project/llvm/test/CodeGen/X86/peep-test-4.ll

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Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test. For example tzcntl %edi, %ebx testl %edi, %edi je .label can be rewritten into tzcntl %edi, %ebx jb .label A minor complication is that tzcnt sets CF instead of ZF when the input is zero, we have to rewrite users of the flags from ZF to CF. Currently we recognize patterns using lzcnt, tzcnt and popcnt. Differential Revision: http://reviews.llvm.org/D3454 llvm-svn: 208788
2014-05-15 00:14:45 +08:00
; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+bmi,+bmi2,+popcnt,+lzcnt | FileCheck %s
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
declare void @foo(i32)
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test. For example tzcntl %edi, %ebx testl %edi, %edi je .label can be rewritten into tzcntl %edi, %ebx jb .label A minor complication is that tzcnt sets CF instead of ZF when the input is zero, we have to rewrite users of the flags from ZF to CF. Currently we recognize patterns using lzcnt, tzcnt and popcnt. Differential Revision: http://reviews.llvm.org/D3454 llvm-svn: 208788
2014-05-15 00:14:45 +08:00
declare void @foo32(i32)
X86: Remove test instructions proceeding shift by immediate instructions Allow LLVM to take advantage of shift instructions that set the ZF flag, making instructions that test the destination superfluous. llvm-svn: 182454
2013-05-22 16:13:02 +08:00
declare void @foo64(i64)
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
define void @neg(i32 %x) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; CHECK-LABEL: neg:
; CHECK: # BB#0:
; CHECK-NEXT: negl %edi
; CHECK-NEXT: je .LBB0_1
; CHECK-NEXT: # BB#2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB0_1: # %return
; CHECK-NEXT: retq
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
%sub = sub i32 0, %x
%cmp = icmp eq i32 %sub, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %sub)
br label %return
return:
ret void
}
define void @sar(i32 %x) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; CHECK-LABEL: sar:
; CHECK: # BB#0:
; CHECK-NEXT: sarl %edi
; CHECK-NEXT: je .LBB1_1
; CHECK-NEXT: # BB#2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB1_1: # %return
; CHECK-NEXT: retq
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
%ashr = ashr i32 %x, 1
%cmp = icmp eq i32 %ashr, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %ashr)
br label %return
return:
ret void
}
define void @shr(i32 %x) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
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; CHECK-LABEL: shr:
; CHECK: # BB#0:
; CHECK-NEXT: shrl %edi
; CHECK-NEXT: je .LBB2_1
; CHECK-NEXT: # BB#2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB2_1: # %return
; CHECK-NEXT: retq
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
%ashr = lshr i32 %x, 1
%cmp = icmp eq i32 %ashr, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %ashr)
br label %return
return:
ret void
}
X86: Remove test instructions proceeding shift by immediate instructions Allow LLVM to take advantage of shift instructions that set the ZF flag, making instructions that test the destination superfluous. llvm-svn: 182454
2013-05-22 16:13:02 +08:00
define void @shri(i32 %x) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
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; CHECK-LABEL: shri:
; CHECK: # BB#0:
; CHECK-NEXT: shrl $3, %edi
; CHECK-NEXT: je .LBB3_1
; CHECK-NEXT: # BB#2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB3_1: # %return
; CHECK-NEXT: retq
X86: Remove test instructions proceeding shift by immediate instructions Allow LLVM to take advantage of shift instructions that set the ZF flag, making instructions that test the destination superfluous. llvm-svn: 182454
2013-05-22 16:13:02 +08:00
%ashr = lshr i32 %x, 3
%cmp = icmp eq i32 %ashr, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %ashr)
br label %return
return:
ret void
}
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
define void @shl(i32 %x) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; CHECK-LABEL: shl:
; CHECK: # BB#0:
; CHECK-NEXT: addl %edi, %edi
; CHECK-NEXT: je .LBB4_1
; CHECK-NEXT: # BB#2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB4_1: # %return
; CHECK-NEXT: retq
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
%shl = shl i32 %x, 1
%cmp = icmp eq i32 %shl, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %shl)
br label %return
return:
ret void
}
X86: Remove test instructions proceeding shift by immediate instructions Allow LLVM to take advantage of shift instructions that set the ZF flag, making instructions that test the destination superfluous. llvm-svn: 182454
2013-05-22 16:13:02 +08:00
define void @shli(i32 %x) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
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; CHECK-LABEL: shli:
; CHECK: # BB#0:
; CHECK-NEXT: shll $4, %edi
; CHECK-NEXT: je .LBB5_1
; CHECK-NEXT: # BB#2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB5_1: # %return
; CHECK-NEXT: retq
X86: Remove test instructions proceeding shift by immediate instructions Allow LLVM to take advantage of shift instructions that set the ZF flag, making instructions that test the destination superfluous. llvm-svn: 182454
2013-05-22 16:13:02 +08:00
%shl = shl i32 %x, 4
%cmp = icmp eq i32 %shl, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %shl)
br label %return
return:
ret void
}
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
define zeroext i1 @adc(i128 %x) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
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; CHECK-LABEL: adc:
; CHECK: # BB#0:
; CHECK-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; CHECK-NEXT: addq %rdi, %rax
; CHECK-NEXT: adcq $0, %rsi
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
%add = add i128 %x, 9223372036854775808
%cmp = icmp ult i128 %add, 18446744073709551616
ret i1 %cmp
}
define zeroext i1 @sbb(i128 %x, i128 %y) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; CHECK-LABEL: sbb:
; CHECK: # BB#0:
; CHECK-NEXT: cmpq %rdx, %rdi
; CHECK-NEXT: sbbq %rcx, %rsi
; CHECK-NEXT: setns %al
; CHECK-NEXT: retq
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
%sub = sub i128 %x, %y
%cmp = icmp sge i128 %sub, 0
ret i1 %cmp
}
define void @andn(i32 %x, i32 %y) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
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; CHECK-LABEL: andn:
; CHECK: # BB#0:
; CHECK-NEXT: andnl %esi, %edi, %edi
; CHECK-NEXT: je .LBB8_1
; CHECK-NEXT: # BB#2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB8_1: # %return
; CHECK-NEXT: retq
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
%not = xor i32 %x, -1
%andn = and i32 %y, %not
%cmp = icmp eq i32 %andn, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %andn)
br label %return
return:
ret void
}
declare i32 @llvm.x86.bmi.bextr.32(i32, i32) nounwind readnone
define void @bextr(i32 %x, i32 %y) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; CHECK-LABEL: bextr:
; CHECK: # BB#0:
; CHECK-NEXT: bextrl %esi, %edi, %edi
; CHECK-NEXT: je .LBB9_1
; CHECK-NEXT: # BB#2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB9_1: # %return
; CHECK-NEXT: retq
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
%bextr = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %y)
%cmp = icmp eq i32 %bextr, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %bextr)
br label %return
return:
ret void
}
declare i32 @llvm.ctpop.i32(i32) nounwind readnone
define void @popcnt(i32 %x) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
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; CHECK-LABEL: popcnt:
; CHECK: # BB#0:
; CHECK-NEXT: popcntl %edi, %edi
; CHECK-NEXT: je .LBB10_1
; CHECK-NEXT: # BB#2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB10_1: # %return
; CHECK-NEXT: retq
X86: Remove redundant test instructions Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. llvm-svn: 181937
2013-05-16 06:03:08 +08:00
%popcnt = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp eq i32 %popcnt, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %popcnt)
br label %return
return:
ret void
}
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test. For example tzcntl %edi, %ebx testl %edi, %edi je .label can be rewritten into tzcntl %edi, %ebx jb .label A minor complication is that tzcnt sets CF instead of ZF when the input is zero, we have to rewrite users of the flags from ZF to CF. Currently we recognize patterns using lzcnt, tzcnt and popcnt. Differential Revision: http://reviews.llvm.org/D3454 llvm-svn: 208788
2014-05-15 00:14:45 +08:00
declare i64 @llvm.cttz.i64(i64, i1)
define i64 @testCTZ(i64 %v) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; CHECK-LABEL: testCTZ:
; CHECK: # BB#0:
; CHECK-NEXT: tzcntq %rdi, %rcx
; CHECK-NEXT: movl $255, %eax
; CHECK-NEXT: cmovaeq %rcx, %rax
; CHECK-NEXT: retq
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test. For example tzcntl %edi, %ebx testl %edi, %edi je .label can be rewritten into tzcntl %edi, %ebx jb .label A minor complication is that tzcnt sets CF instead of ZF when the input is zero, we have to rewrite users of the flags from ZF to CF. Currently we recognize patterns using lzcnt, tzcnt and popcnt. Differential Revision: http://reviews.llvm.org/D3454 llvm-svn: 208788
2014-05-15 00:14:45 +08:00
%cnt = tail call i64 @llvm.cttz.i64(i64 %v, i1 true)
%tobool = icmp eq i64 %v, 0
%cond = select i1 %tobool, i64 255, i64 %cnt
ret i64 %cond
}
declare i32 @llvm.cttz.i32(i32, i1)
define void @testCTZ2(i32 %v) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
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; CHECK-LABEL: testCTZ2:
; CHECK: # BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: tzcntl %edi, %ebx
; CHECK-NEXT: jb .LBB12_2
; CHECK-NEXT: # BB#1: # %bb
; CHECK-NEXT: movl %ebx, %edi
; CHECK-NEXT: callq foo
; CHECK-NEXT: .LBB12_2: # %return
; CHECK-NEXT: movl %ebx, %edi
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: jmp foo32 # TAILCALL
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test. For example tzcntl %edi, %ebx testl %edi, %edi je .label can be rewritten into tzcntl %edi, %ebx jb .label A minor complication is that tzcnt sets CF instead of ZF when the input is zero, we have to rewrite users of the flags from ZF to CF. Currently we recognize patterns using lzcnt, tzcnt and popcnt. Differential Revision: http://reviews.llvm.org/D3454 llvm-svn: 208788
2014-05-15 00:14:45 +08:00
%cnt = tail call i32 @llvm.cttz.i32(i32 %v, i1 true)
%cmp = icmp eq i32 %v, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %cnt)
br label %return
return:
tail call void @foo32(i32 %cnt)
ret void
}
define void @testCTZ3(i32 %v) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; CHECK-LABEL: testCTZ3:
; CHECK: # BB#0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: tzcntl %edi, %ebx
; CHECK-NEXT: jae .LBB13_2
; CHECK-NEXT: # BB#1: # %bb
; CHECK-NEXT: movl %ebx, %edi
; CHECK-NEXT: callq foo
; CHECK-NEXT: .LBB13_2: # %return
; CHECK-NEXT: movl %ebx, %edi
; CHECK-NEXT: popq %rbx
; CHECK-NEXT: jmp foo32 # TAILCALL
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test. For example tzcntl %edi, %ebx testl %edi, %edi je .label can be rewritten into tzcntl %edi, %ebx jb .label A minor complication is that tzcnt sets CF instead of ZF when the input is zero, we have to rewrite users of the flags from ZF to CF. Currently we recognize patterns using lzcnt, tzcnt and popcnt. Differential Revision: http://reviews.llvm.org/D3454 llvm-svn: 208788
2014-05-15 00:14:45 +08:00
%cnt = tail call i32 @llvm.cttz.i32(i32 %v, i1 true)
%cmp = icmp ne i32 %v, 0
br i1 %cmp, label %return, label %bb
bb:
tail call void @foo(i32 %cnt)
br label %return
return:
tail call void @foo32(i32 %cnt)
ret void
}
declare i64 @llvm.ctlz.i64(i64, i1)
define i64 @testCLZ(i64 %v) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; CHECK-LABEL: testCLZ:
; CHECK: # BB#0:
; CHECK-NEXT: lzcntq %rdi, %rcx
; CHECK-NEXT: movl $255, %eax
; CHECK-NEXT: cmovaeq %rcx, %rax
; CHECK-NEXT: retq
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test. For example tzcntl %edi, %ebx testl %edi, %edi je .label can be rewritten into tzcntl %edi, %ebx jb .label A minor complication is that tzcnt sets CF instead of ZF when the input is zero, we have to rewrite users of the flags from ZF to CF. Currently we recognize patterns using lzcnt, tzcnt and popcnt. Differential Revision: http://reviews.llvm.org/D3454 llvm-svn: 208788
2014-05-15 00:14:45 +08:00
%cnt = tail call i64 @llvm.ctlz.i64(i64 %v, i1 true)
%tobool = icmp ne i64 %v, 0
%cond = select i1 %tobool, i64 %cnt, i64 255
ret i64 %cond
}
declare i64 @llvm.ctpop.i64(i64)
define i64 @testPOPCNT(i64 %v) nounwind {
Autogenerate results for test/CodeGen/X86/peep-test-4.ll . NFC llvm-svn: 294765
2017-02-11 01:57:48 +08:00
; CHECK-LABEL: testPOPCNT:
; CHECK: # BB#0:
; CHECK-NEXT: popcntq %rdi, %rcx
; CHECK-NEXT: movl $255, %eax
; CHECK-NEXT: cmovneq %rcx, %rax
; CHECK-NEXT: retq
X86: If we have an instruction that sets a flag and a zero test on the input of that instruction try to eliminate the test. For example tzcntl %edi, %ebx testl %edi, %edi je .label can be rewritten into tzcntl %edi, %ebx jb .label A minor complication is that tzcnt sets CF instead of ZF when the input is zero, we have to rewrite users of the flags from ZF to CF. Currently we recognize patterns using lzcnt, tzcnt and popcnt. Differential Revision: http://reviews.llvm.org/D3454 llvm-svn: 208788
2014-05-15 00:14:45 +08:00
%cnt = tail call i64 @llvm.ctpop.i64(i64 %v)
%tobool = icmp ne i64 %v, 0
%cond = select i1 %tobool, i64 %cnt, i64 255
ret i64 %cond
}