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llvm-project/llvm/test/CodeGen/X86/avx512-any_extend_load.ll

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[X86][AVX512] Regenerate test - missing shuffle comments llvm-svn: 290770
2016-12-31 06:31:33 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
[AVX512] Implement missing patterns for any_extend load lowering. Differential Revision: http://reviews.llvm.org/D20513 llvm-svn: 270357
2016-05-22 18:21:04 +08:00
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gn -mcpu=knl | FileCheck %s --check-prefix=ALL --check-prefix=KNL
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gn -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=SKX
define void @any_extend_load_v8i64(<8 x i8> * %ptr) {
[X86] Generate VZEROUPPER for Skylake-avx512. VZEROUPPER should not be issued on Knights Landing (KNL), but on Skylake-avx512 it should be. Differential Revision: https://reviews.llvm.org/D29874 llvm-svn: 296859
2017-03-03 17:03:24 +08:00
; KNL-LABEL: any_extend_load_v8i64:
; KNL: # BB#0:
; KNL-NEXT: vpmovzxbq {{.*#+}} zmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero,mem[4],zero,zero,zero,zero,zero,zero,zero,mem[5],zero,zero,zero,zero,zero,zero,zero,mem[6],zero,zero,zero,zero,zero,zero,zero,mem[7],zero,zero,zero,zero,zero,zero,zero
; KNL-NEXT: vpaddq {{.*}}(%rip){1to8}, %zmm0, %zmm0
; KNL-NEXT: vpmovqb %zmm0, (%rdi)
; KNL-NEXT: retq
;
; SKX-LABEL: any_extend_load_v8i64:
; SKX: # BB#0:
; SKX-NEXT: vpmovzxbq {{.*#+}} zmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero,mem[4],zero,zero,zero,zero,zero,zero,zero,mem[5],zero,zero,zero,zero,zero,zero,zero,mem[6],zero,zero,zero,zero,zero,zero,zero,mem[7],zero,zero,zero,zero,zero,zero,zero
; SKX-NEXT: vpaddq {{.*}}(%rip){1to8}, %zmm0, %zmm0
; SKX-NEXT: vpmovqb %zmm0, (%rdi)
; SKX-NEXT: vzeroupper
; SKX-NEXT: retq
[AVX512] Implement missing patterns for any_extend load lowering. Differential Revision: http://reviews.llvm.org/D20513 llvm-svn: 270357
2016-05-22 18:21:04 +08:00
%wide.load = load <8 x i8>, <8 x i8>* %ptr, align 1
%1 = zext <8 x i8> %wide.load to <8 x i64>
%2 = add nuw nsw <8 x i64> %1, <i64 4, i64 4, i64 4, i64 4, i64 4, i64 4, i64 4, i64 4>
%3 = xor <8 x i64> %2, zeroinitializer
%4 = trunc <8 x i64> %3 to <8 x i8>
store <8 x i8> %4, <8 x i8>* %ptr, align 1
ret void
}
define void @any_extend_load_v8i32(<8 x i8> * %ptr) {
; KNL-LABEL: any_extend_load_v8i32:
; KNL: # BB#0:
[X86] Attempt to pre-truncate arithmetic operations if useful In some cases its more efficient to combine TRUNC( BINOP( X, Y ) ) --> BINOP( TRUNC( X ), TRUNC( Y ) ) if the binop is legal for the truncated types. This is true for vector integer multiplication (especially vXi64), as well as ADD/AND/XOR/OR in cases where we only need to truncate one of the inputs at runtime (e.g. a duplicated input or an one use constant we can fold). Further work could be done here - scalar cases (especially i64) could often benefit (if we avoid partial registers etc.), other opcodes, and better analysis of when truncating the inputs reduces costs. I have considered implementing this for all targets within the DAGCombiner but wasn't sure we could devise a suitable cost model system that would give us the range we need. Differential Revision: https://reviews.llvm.org/D28219 llvm-svn: 290947
2017-01-04 16:05:42 +08:00
; KNL-NEXT: vpmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
; KNL-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0
[AVX512] Implement missing patterns for any_extend load lowering. Differential Revision: http://reviews.llvm.org/D20513 llvm-svn: 270357
2016-05-22 18:21:04 +08:00
; KNL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; KNL-NEXT: vmovq %xmm0, (%rdi)
; KNL-NEXT: retq
;
; SKX-LABEL: any_extend_load_v8i32:
; SKX: # BB#0:
[X86][AVX512] Regenerate test - missing shuffle comments llvm-svn: 290770
2016-12-31 06:31:33 +08:00
; SKX-NEXT: vpmovzxbd {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
[AVX512] Implement missing patterns for any_extend load lowering. Differential Revision: http://reviews.llvm.org/D20513 llvm-svn: 270357
2016-05-22 18:21:04 +08:00
; SKX-NEXT: vpaddd {{.*}}(%rip){1to8}, %ymm0, %ymm0
; SKX-NEXT: vpmovdb %ymm0, (%rdi)
[X86] Generate VZEROUPPER for Skylake-avx512. VZEROUPPER should not be issued on Knights Landing (KNL), but on Skylake-avx512 it should be. Differential Revision: https://reviews.llvm.org/D29874 llvm-svn: 296859
2017-03-03 17:03:24 +08:00
; SKX-NEXT: vzeroupper
[AVX512] Implement missing patterns for any_extend load lowering. Differential Revision: http://reviews.llvm.org/D20513 llvm-svn: 270357
2016-05-22 18:21:04 +08:00
; SKX-NEXT: retq
%wide.load = load <8 x i8>, <8 x i8>* %ptr, align 1
%1 = zext <8 x i8> %wide.load to <8 x i32>
%2 = add nuw nsw <8 x i32> %1, <i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4, i32 4>
%3 = xor <8 x i32> %2, zeroinitializer
%4 = trunc <8 x i32> %3 to <8 x i8>
store <8 x i8> %4, <8 x i8>* %ptr, align 1
ret void
}
define void @any_extend_load_v8i16(<8 x i8> * %ptr) {
; KNL-LABEL: any_extend_load_v8i16:
; KNL: # BB#0:
; KNL-NEXT: vpmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
; KNL-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0
; KNL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
; KNL-NEXT: vmovq %xmm0, (%rdi)
; KNL-NEXT: retq
;
; SKX-LABEL: any_extend_load_v8i16:
; SKX: # BB#0:
[X86][AVX512] Regenerate test - missing shuffle comments llvm-svn: 290770
2016-12-31 06:31:33 +08:00
; SKX-NEXT: vpmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
[AVX512] Implement missing patterns for any_extend load lowering. Differential Revision: http://reviews.llvm.org/D20513 llvm-svn: 270357
2016-05-22 18:21:04 +08:00
; SKX-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0
; SKX-NEXT: vpmovwb %xmm0, (%rdi)
; SKX-NEXT: retq
%wide.load = load <8 x i8>, <8 x i8>* %ptr, align 1
%1 = zext <8 x i8> %wide.load to <8 x i16>
%2 = add nuw nsw <8 x i16> %1, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
%3 = xor <8 x i16> %2, zeroinitializer
%4 = trunc <8 x i16> %3 to <8 x i8>
store <8 x i8> %4, <8 x i8>* %ptr, align 1
ret void
}