2007-05-16 10:00:57 +08:00
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//===-- IfConversion.cpp - Machine code if conversion pass. ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the Evan Cheng and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the machine instruction level if-conversion pass.
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//
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//===----------------------------------------------------------------------===//
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2007-06-01 08:12:12 +08:00
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#define DEBUG_TYPE "ifcvt"
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#include "llvm/Function.h"
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2007-05-16 10:00:57 +08:00
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/Target/TargetInstrInfo.h"
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2007-05-18 08:20:58 +08:00
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#include "llvm/Target/TargetLowering.h"
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2007-05-16 10:00:57 +08:00
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#include "llvm/Target/TargetMachine.h"
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2007-06-09 03:10:51 +08:00
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#include "llvm/Support/CommandLine.h"
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2007-05-16 10:00:57 +08:00
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#include "llvm/Support/Debug.h"
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2007-05-19 03:26:33 +08:00
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#include "llvm/ADT/DepthFirstIterator.h"
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2007-05-16 10:00:57 +08:00
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#include "llvm/ADT/Statistic.h"
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using namespace llvm;
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2007-06-09 03:10:51 +08:00
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namespace {
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// Hidden options for help debugging.
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cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
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cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
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cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
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cl::opt<bool> DisableSimple("disable-ifcvt-simple",
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cl::init(false), cl::Hidden);
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2007-06-09 09:03:43 +08:00
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cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
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cl::init(false), cl::Hidden);
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2007-06-09 03:10:51 +08:00
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cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
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cl::init(false), cl::Hidden);
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2007-06-13 07:54:05 +08:00
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cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
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cl::init(false), cl::Hidden);
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2007-06-09 09:03:43 +08:00
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cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
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cl::init(false), cl::Hidden);
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cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
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cl::init(false), cl::Hidden);
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2007-06-09 03:10:51 +08:00
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cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
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cl::init(false), cl::Hidden);
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}
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2007-06-09 09:03:43 +08:00
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STATISTIC(NumSimple, "Number of simple if-conversions performed");
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STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed");
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STATISTIC(NumTriangle, "Number of triangle if-conversions performed");
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2007-06-13 07:54:05 +08:00
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STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed");
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2007-06-09 09:03:43 +08:00
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STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
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STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
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STATISTIC(NumDiamonds, "Number of diamond if-conversions performed");
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STATISTIC(NumIfConvBBs, "Number of if-converted blocks");
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2007-05-16 10:00:57 +08:00
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namespace {
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class IfConverter : public MachineFunctionPass {
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enum BBICKind {
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ICNotClassfied, // BB data valid, but not classified.
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2007-06-04 14:47:22 +08:00
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ICSimple, // BB is entry of an one split, no rejoin sub-CFG.
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ICSimpleFalse, // Same as ICSimple, but on the false path.
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2007-05-22 06:22:58 +08:00
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ICTriangle, // BB is entry of a triangle sub-CFG.
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2007-06-13 07:54:05 +08:00
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ICTriangleRev, // Same as ICTriangle, but true path rev condition.
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2007-06-09 09:03:43 +08:00
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ICTriangleFalse, // Same as ICTriangle, but on the false path.
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ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition.
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2007-06-12 06:26:22 +08:00
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ICDiamond // BB is entry of a diamond sub-CFG.
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2007-05-16 10:00:57 +08:00
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};
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/// BBInfo - One per MachineBasicBlock, this is used to cache the result
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/// if-conversion feasibility analysis. This includes results from
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/// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
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2007-05-18 08:20:58 +08:00
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/// classification, and common tail block of its successors (if it's a
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2007-05-19 02:14:37 +08:00
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/// diamond shape), its size, whether it's predicable, and whether any
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/// instruction can clobber the 'would-be' predicate.
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2007-05-23 15:23:16 +08:00
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///
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/// Kind - Type of block. See BBICKind.
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2007-06-12 06:26:22 +08:00
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/// IsDone - True if BB is not to be considered for ifcvt.
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/// IsBeingAnalyzed - True if BB is currently being analyzed.
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/// IsAnalyzed - True if BB has been analyzed (info is still valid).
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/// IsEnqueued - True if BB has been enqueued to be ifcvt'ed.
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/// IsBrAnalyzable - True if AnalyzeBranch() returns false.
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/// HasFallThrough - True if BB may fallthrough to the following BB.
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/// IsUnpredicable - True if BB is known to be unpredicable.
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/// ClobbersPredicate- True if BB would modify the predicate (e.g. has
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2007-06-06 18:16:17 +08:00
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/// cmp, call, etc.)
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2007-06-12 06:26:22 +08:00
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/// NonPredSize - Number of non-predicated instructions.
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2007-05-23 15:23:16 +08:00
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/// BB - Corresponding MachineBasicBlock.
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/// TrueBB / FalseBB- See AnalyzeBranch().
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/// BrCond - Conditions for end of block conditional branches.
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/// Predicate - Predicate used in the BB.
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2007-05-16 10:00:57 +08:00
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struct BBInfo {
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BBICKind Kind;
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2007-06-12 06:26:22 +08:00
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bool IsDone : 1;
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bool IsBeingAnalyzed : 1;
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bool IsAnalyzed : 1;
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bool IsEnqueued : 1;
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bool IsBrAnalyzable : 1;
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bool HasFallThrough : 1;
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bool IsUnpredicable : 1;
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bool ClobbersPred : 1;
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2007-05-23 15:23:16 +08:00
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unsigned NonPredSize;
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2007-05-18 08:20:58 +08:00
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MachineBasicBlock *BB;
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MachineBasicBlock *TrueBB;
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MachineBasicBlock *FalseBB;
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MachineBasicBlock *TailBB;
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2007-05-23 15:23:16 +08:00
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std::vector<MachineOperand> BrCond;
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std::vector<MachineOperand> Predicate;
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2007-06-12 06:26:22 +08:00
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BBInfo() : Kind(ICNotClassfied), IsDone(false), IsBeingAnalyzed(false),
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IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
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HasFallThrough(false), IsUnpredicable(false),
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ClobbersPred(false), NonPredSize(0),
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2007-05-22 06:22:58 +08:00
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BB(0), TrueBB(0), FalseBB(0), TailBB(0) {}
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2007-05-16 10:00:57 +08:00
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};
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2007-05-31 03:49:19 +08:00
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/// Roots - Basic blocks that do not have successors. These are the starting
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/// points of Graph traversal.
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std::vector<MachineBasicBlock*> Roots;
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2007-05-16 10:00:57 +08:00
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/// BBAnalysis - Results of if-conversion feasibility analysis indexed by
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/// basic block number.
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std::vector<BBInfo> BBAnalysis;
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2007-05-18 08:20:58 +08:00
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const TargetLowering *TLI;
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2007-05-16 10:00:57 +08:00
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const TargetInstrInfo *TII;
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bool MadeChange;
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public:
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static char ID;
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IfConverter() : MachineFunctionPass((intptr_t)&ID) {}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual const char *getPassName() const { return "If converter"; }
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private:
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2007-06-04 14:47:22 +08:00
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bool ReverseBranchCondition(BBInfo &BBI);
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2007-06-08 17:36:04 +08:00
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bool ValidSimple(BBInfo &TrueBBI) const;
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bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
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bool FalseBranch = false) const;
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2007-06-07 10:12:15 +08:00
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bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI) const;
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2007-06-08 17:36:04 +08:00
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void ScanInstructions(BBInfo &BBI);
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2007-06-12 06:26:22 +08:00
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BBInfo &AnalyzeBlock(MachineBasicBlock *BB);
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2007-06-08 17:36:04 +08:00
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bool FeasibilityAnalysis(BBInfo &BBI, std::vector<MachineOperand> &Cond,
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bool isTriangle = false, bool RevBranch = false);
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2007-05-31 03:49:19 +08:00
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bool AttemptRestructuring(BBInfo &BBI);
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bool AnalyzeBlocks(MachineFunction &MF,
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2007-05-23 15:23:16 +08:00
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std::vector<BBInfo*> &Candidates);
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2007-05-31 03:49:19 +08:00
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void ReTryPreds(MachineBasicBlock *BB);
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2007-06-09 06:01:07 +08:00
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void RemoveExtraEdges(BBInfo &BBI);
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2007-06-04 14:47:22 +08:00
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bool IfConvertSimple(BBInfo &BBI);
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2007-05-16 10:00:57 +08:00
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bool IfConvertTriangle(BBInfo &BBI);
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2007-05-19 02:14:37 +08:00
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bool IfConvertDiamond(BBInfo &BBI);
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2007-05-23 15:23:16 +08:00
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void PredicateBlock(BBInfo &BBI,
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2007-05-16 10:00:57 +08:00
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std::vector<MachineOperand> &Cond,
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bool IgnoreTerm = false);
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2007-05-18 08:20:58 +08:00
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void MergeBlocks(BBInfo &TrueBBI, BBInfo &FalseBBI);
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2007-06-01 08:12:12 +08:00
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2007-06-07 10:12:15 +08:00
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// blockAlwaysFallThrough - Block ends without a terminator.
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bool blockAlwaysFallThrough(BBInfo &BBI) const {
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2007-06-12 06:26:22 +08:00
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return BBI.IsBrAnalyzable && BBI.TrueBB == NULL;
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2007-06-06 18:16:17 +08:00
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}
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2007-06-01 08:12:12 +08:00
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// IfcvtCandidateCmp - Used to sort if-conversion candidates.
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static bool IfcvtCandidateCmp(BBInfo* C1, BBInfo* C2){
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// Favor diamond over triangle, etc.
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return (unsigned)C1->Kind < (unsigned)C2->Kind;
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}
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2007-05-16 10:00:57 +08:00
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};
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char IfConverter::ID = 0;
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}
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FunctionPass *llvm::createIfConverterPass() { return new IfConverter(); }
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bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
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2007-05-18 08:20:58 +08:00
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TLI = MF.getTarget().getTargetLowering();
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2007-05-16 10:00:57 +08:00
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TII = MF.getTarget().getInstrInfo();
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if (!TII) return false;
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2007-06-09 03:10:51 +08:00
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static int FnNum = -1;
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DOUT << "\nIfcvt: function (" << ++FnNum << ") \'"
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<< MF.getFunction()->getName() << "\'";
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if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
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DOUT << " skipped\n";
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return false;
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}
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DOUT << "\n";
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2007-06-01 08:12:12 +08:00
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2007-05-16 10:00:57 +08:00
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MF.RenumberBlocks();
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2007-06-01 08:12:12 +08:00
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BBAnalysis.resize(MF.getNumBlockIDs());
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2007-05-16 10:00:57 +08:00
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2007-05-31 03:49:19 +08:00
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// Look for root nodes, i.e. blocks without successors.
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
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if (I->succ_size() == 0)
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Roots.push_back(I);
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2007-05-19 03:32:08 +08:00
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std::vector<BBInfo*> Candidates;
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2007-05-18 09:55:58 +08:00
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MadeChange = false;
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2007-06-09 03:10:51 +08:00
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while (IfCvtLimit == -1 || (int)NumIfConvBBs < IfCvtLimit) {
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2007-05-23 15:23:16 +08:00
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// Do an intial analysis for each basic block and finding all the potential
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// candidates to perform if-convesion.
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2007-06-04 14:47:22 +08:00
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bool Change = AnalyzeBlocks(MF, Candidates);
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2007-05-23 15:23:16 +08:00
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while (!Candidates.empty()) {
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BBInfo &BBI = *Candidates.back();
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Candidates.pop_back();
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2007-06-04 14:47:22 +08:00
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2007-06-12 06:26:22 +08:00
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// If the block has been evicted out of the queue or it has already been
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// marked dead (due to it being predicated), then skip it.
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if (!BBI.IsEnqueued || BBI.IsDone)
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continue;
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2007-06-15 04:28:52 +08:00
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BBI.IsEnqueued = false;
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2007-06-12 06:26:22 +08:00
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2007-06-04 14:47:22 +08:00
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bool RetVal = false;
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2007-05-23 15:23:16 +08:00
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switch (BBI.Kind) {
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default: assert(false && "Unexpected!");
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break;
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2007-06-04 14:47:22 +08:00
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case ICSimple:
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2007-06-06 09:12:44 +08:00
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case ICSimpleFalse: {
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2007-06-09 09:03:43 +08:00
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bool isFalse = BBI.Kind == ICSimpleFalse;
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if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
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2007-06-04 14:47:22 +08:00
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DOUT << "Ifcvt (Simple" << (BBI.Kind == ICSimpleFalse ? " false" : "")
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2007-06-06 18:16:17 +08:00
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<< "): BB#" << BBI.BB->getNumber() << " ("
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<< ((BBI.Kind == ICSimpleFalse)
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? BBI.FalseBB->getNumber() : BBI.TrueBB->getNumber()) << ") ";
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2007-06-04 14:47:22 +08:00
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RetVal = IfConvertSimple(BBI);
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DOUT << (RetVal ? "succeeded!" : "failed!") << "\n";
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if (RetVal)
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2007-06-09 09:03:43 +08:00
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if (isFalse) NumSimpleFalse++;
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else NumSimple++;
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2007-06-04 14:47:22 +08:00
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break;
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2007-06-06 09:12:44 +08:00
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}
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2007-05-23 15:23:16 +08:00
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case ICTriangle:
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2007-06-13 07:54:05 +08:00
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case ICTriangleRev:
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2007-06-09 09:03:43 +08:00
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case ICTriangleFalse:
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2007-06-10 08:19:17 +08:00
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case ICTriangleFRev: {
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2007-06-13 07:54:05 +08:00
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bool isFalse = BBI.Kind == ICTriangleFalse;
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bool isRev = (BBI.Kind == ICTriangleRev || BBI.Kind == ICTriangleFRev);
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if (DisableTriangle && !isFalse && !isRev) break;
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if (DisableTriangleR && !isFalse && isRev) break;
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if (DisableTriangleF && isFalse && !isRev) break;
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if (DisableTriangleFR && isFalse && isRev) break;
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2007-06-09 09:03:43 +08:00
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DOUT << "Ifcvt (Triangle";
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if (isFalse)
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DOUT << " false";
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2007-06-13 07:54:05 +08:00
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if (isRev)
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DOUT << " rev";
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2007-06-09 09:03:43 +08:00
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DOUT << "): BB#" << BBI.BB->getNumber() << " (T:"
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2007-06-06 18:16:17 +08:00
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<< BBI.TrueBB->getNumber() << ",F:" << BBI.FalseBB->getNumber()
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<< ") ";
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2007-06-04 14:47:22 +08:00
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RetVal = IfConvertTriangle(BBI);
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DOUT << (RetVal ? "succeeded!" : "failed!") << "\n";
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2007-06-09 09:03:43 +08:00
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if (RetVal) {
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2007-06-13 07:54:05 +08:00
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if (isFalse) {
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if (isRev) NumTriangleFRev++;
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else NumTriangleFalse++;
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} else {
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if (isRev) NumTriangleRev++;
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else NumTriangle++;
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}
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2007-06-09 09:03:43 +08:00
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}
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2007-05-23 15:23:16 +08:00
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break;
|
2007-06-10 08:19:17 +08:00
|
|
|
}
|
2007-05-23 15:23:16 +08:00
|
|
|
case ICDiamond:
|
2007-06-09 03:10:51 +08:00
|
|
|
if (DisableDiamond) break;
|
2007-06-06 18:16:17 +08:00
|
|
|
DOUT << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
|
|
|
|
<< BBI.TrueBB->getNumber() << ",F:" << BBI.FalseBB->getNumber();
|
|
|
|
if (BBI.TailBB)
|
|
|
|
DOUT << "," << BBI.TailBB->getNumber() ;
|
|
|
|
DOUT << ") ";
|
2007-06-04 14:47:22 +08:00
|
|
|
RetVal = IfConvertDiamond(BBI);
|
|
|
|
DOUT << (RetVal ? "succeeded!" : "failed!") << "\n";
|
|
|
|
if (RetVal) NumDiamonds++;
|
2007-05-23 15:23:16 +08:00
|
|
|
break;
|
|
|
|
}
|
2007-06-04 14:47:22 +08:00
|
|
|
Change |= RetVal;
|
2007-06-09 03:10:51 +08:00
|
|
|
|
2007-06-09 09:03:43 +08:00
|
|
|
if (IfCvtLimit != -1 && (int)NumIfConvBBs >= IfCvtLimit)
|
2007-06-09 03:10:51 +08:00
|
|
|
break;
|
2007-05-16 10:00:57 +08:00
|
|
|
}
|
2007-05-23 15:23:16 +08:00
|
|
|
|
|
|
|
if (!Change)
|
|
|
|
break;
|
2007-06-04 14:47:22 +08:00
|
|
|
MadeChange |= Change;
|
2007-05-16 10:00:57 +08:00
|
|
|
}
|
2007-05-18 09:55:58 +08:00
|
|
|
|
2007-05-31 03:49:19 +08:00
|
|
|
Roots.clear();
|
2007-05-18 09:55:58 +08:00
|
|
|
BBAnalysis.clear();
|
|
|
|
|
2007-05-16 10:00:57 +08:00
|
|
|
return MadeChange;
|
|
|
|
}
|
|
|
|
|
|
|
|
static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
|
2007-05-18 08:20:58 +08:00
|
|
|
MachineBasicBlock *TrueBB) {
|
2007-05-16 10:00:57 +08:00
|
|
|
for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
|
|
|
|
E = BB->succ_end(); SI != E; ++SI) {
|
|
|
|
MachineBasicBlock *SuccBB = *SI;
|
2007-05-18 08:20:58 +08:00
|
|
|
if (SuccBB != TrueBB)
|
2007-05-16 10:00:57 +08:00
|
|
|
return SuccBB;
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2007-06-04 14:47:22 +08:00
|
|
|
bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
|
|
|
|
if (!TII->ReverseBranchCondition(BBI.BrCond)) {
|
|
|
|
TII->RemoveBranch(*BBI.BB);
|
|
|
|
TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond);
|
|
|
|
std::swap(BBI.TrueBB, BBI.FalseBB);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2007-06-09 09:03:43 +08:00
|
|
|
/// getNextBlock - Returns the next block in the function blocks ordering. If
|
|
|
|
/// it is the end, returns NULL.
|
|
|
|
static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
|
|
|
|
MachineFunction::iterator I = BB;
|
|
|
|
MachineFunction::iterator E = BB->getParent()->end();
|
|
|
|
if (++I == E)
|
|
|
|
return NULL;
|
|
|
|
return I;
|
|
|
|
}
|
|
|
|
|
2007-06-08 17:36:04 +08:00
|
|
|
/// ValidSimple - Returns true if the 'true' block (along with its
|
|
|
|
/// predecessor) forms a valid simple shape for ifcvt.
|
|
|
|
bool IfConverter::ValidSimple(BBInfo &TrueBBI) const {
|
2007-06-12 06:26:22 +08:00
|
|
|
if (TrueBBI.IsBeingAnalyzed)
|
|
|
|
return false;
|
|
|
|
|
2007-06-08 17:36:04 +08:00
|
|
|
return !blockAlwaysFallThrough(TrueBBI) &&
|
|
|
|
TrueBBI.BrCond.size() == 0 && TrueBBI.BB->pred_size() == 1;
|
2007-06-06 18:16:17 +08:00
|
|
|
}
|
|
|
|
|
2007-06-08 17:36:04 +08:00
|
|
|
/// ValidTriangle - Returns true if the 'true' and 'false' blocks (along
|
2007-06-07 10:12:15 +08:00
|
|
|
/// with their common predecessor) forms a valid triangle shape for ifcvt.
|
2007-06-08 17:36:04 +08:00
|
|
|
bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
|
|
|
|
bool FalseBranch) const {
|
2007-06-12 06:26:22 +08:00
|
|
|
if (TrueBBI.IsBeingAnalyzed)
|
|
|
|
return false;
|
|
|
|
|
2007-06-07 10:12:15 +08:00
|
|
|
if (TrueBBI.BB->pred_size() != 1)
|
|
|
|
return false;
|
|
|
|
|
2007-06-08 17:36:04 +08:00
|
|
|
MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
|
|
|
|
if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
|
2007-06-07 10:12:15 +08:00
|
|
|
MachineFunction::iterator I = TrueBBI.BB;
|
|
|
|
if (++I == TrueBBI.BB->getParent()->end())
|
|
|
|
return false;
|
2007-06-08 17:36:04 +08:00
|
|
|
TExit = I;
|
2007-06-07 10:12:15 +08:00
|
|
|
}
|
2007-06-08 17:36:04 +08:00
|
|
|
return TExit && TExit == FalseBBI.BB;
|
2007-06-07 10:12:15 +08:00
|
|
|
}
|
|
|
|
|
2007-06-08 17:36:04 +08:00
|
|
|
/// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
|
2007-06-07 10:12:15 +08:00
|
|
|
/// with their common predecessor) forms a valid diamond shape for ifcvt.
|
|
|
|
bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI) const {
|
2007-06-12 06:26:22 +08:00
|
|
|
if (TrueBBI.IsBeingAnalyzed || FalseBBI.IsBeingAnalyzed)
|
|
|
|
return false;
|
|
|
|
|
2007-06-09 09:03:43 +08:00
|
|
|
MachineBasicBlock *TT = TrueBBI.TrueBB;
|
|
|
|
MachineBasicBlock *FT = FalseBBI.TrueBB;
|
|
|
|
|
|
|
|
if (!TT && blockAlwaysFallThrough(TrueBBI))
|
|
|
|
TT = getNextBlock(TrueBBI.BB);
|
|
|
|
if (!FT && blockAlwaysFallThrough(FalseBBI))
|
|
|
|
FT = getNextBlock(FalseBBI.BB);
|
|
|
|
if (TT != FT)
|
|
|
|
return false;
|
2007-06-12 06:26:22 +08:00
|
|
|
if (TT == NULL && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
|
2007-06-09 09:03:43 +08:00
|
|
|
return false;
|
|
|
|
// FIXME: Allow false block to have an early exit?
|
|
|
|
return (TrueBBI.BB->pred_size() == 1 &&
|
2007-06-07 10:12:15 +08:00
|
|
|
FalseBBI.BB->pred_size() == 1 &&
|
|
|
|
!TrueBBI.FalseBB && !FalseBBI.FalseBB);
|
|
|
|
}
|
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
/// ScanInstructions - Scan all the instructions in the block to determine if
|
|
|
|
/// the block is predicable. In most cases, that means all the instructions
|
|
|
|
/// in the block has M_PREDICABLE flag. Also checks if the block contains any
|
|
|
|
/// instruction which can clobber a predicate (e.g. condition code register).
|
|
|
|
/// If so, the block is not predicable unless it's the last instruction.
|
|
|
|
void IfConverter::ScanInstructions(BBInfo &BBI) {
|
|
|
|
if (BBI.IsDone)
|
|
|
|
return;
|
|
|
|
|
|
|
|
// First analyze the end of BB branches.
|
2007-06-15 05:26:08 +08:00
|
|
|
BBI.TrueBB = BBI.FalseBB = NULL;
|
2007-06-12 06:26:22 +08:00
|
|
|
BBI.BrCond.clear();
|
|
|
|
BBI.IsBrAnalyzable =
|
|
|
|
!TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
|
|
|
|
BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == NULL;
|
|
|
|
|
|
|
|
if (BBI.BrCond.size()) {
|
|
|
|
// No false branch. This BB must end with a conditional branch and a
|
|
|
|
// fallthrough.
|
|
|
|
if (!BBI.FalseBB)
|
|
|
|
BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
|
|
|
|
assert(BBI.FalseBB && "Expected to find the fallthrough block!");
|
|
|
|
}
|
|
|
|
|
|
|
|
// Then scan all the instructions.
|
|
|
|
BBI.NonPredSize = 0;
|
|
|
|
BBI.ClobbersPred = false;
|
|
|
|
bool SeenCondBr = false;
|
|
|
|
for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
|
|
|
|
I != E; ++I) {
|
|
|
|
const TargetInstrDescriptor *TID = I->getInstrDescriptor();
|
|
|
|
bool isPredicated = TII->isPredicated(I);
|
|
|
|
bool isCondBr = BBI.IsBrAnalyzable &&
|
|
|
|
(TID->Flags & M_BRANCH_FLAG) != 0 && (TID->Flags & M_BARRIER_FLAG) == 0;
|
|
|
|
|
|
|
|
if (!isPredicated && !isCondBr)
|
|
|
|
BBI.NonPredSize++;
|
|
|
|
|
|
|
|
if (BBI.ClobbersPred && !isPredicated) {
|
|
|
|
// Predicate modification instruction should end the block (except for
|
|
|
|
// already predicated instructions and end of block branches).
|
|
|
|
if (isCondBr) {
|
|
|
|
SeenCondBr = true;
|
|
|
|
|
|
|
|
// Conditional branches is not predicable. But it may be eliminated.
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Predicate may have been modified, the subsequent (currently)
|
|
|
|
// unpredocated instructions cannot be correctly predicated.
|
|
|
|
BBI.IsUnpredicable = true;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (TID->Flags & M_CLOBBERS_PRED)
|
|
|
|
BBI.ClobbersPred = true;
|
|
|
|
|
|
|
|
if (!I->isPredicable()) {
|
|
|
|
BBI.IsUnpredicable = true;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/// FeasibilityAnalysis - Determine if the block is a suitable candidate to be
|
|
|
|
/// predicated by the specified predicate.
|
|
|
|
bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
|
|
|
|
std::vector<MachineOperand> &Pred,
|
|
|
|
bool isTriangle, bool RevBranch) {
|
|
|
|
// Forget about it if it's unpredicable.
|
|
|
|
if (BBI.IsUnpredicable)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// If the block is dead, or it is going to be the entry block of a sub-CFG
|
|
|
|
// that will be if-converted, then it cannot be predicated.
|
|
|
|
if (BBI.IsDone || BBI.IsEnqueued)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// Check predication threshold.
|
|
|
|
if (BBI.NonPredSize == 0 || BBI.NonPredSize > TLI->getIfCvtBlockSizeLimit())
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// If it is already predicated, check if its predicate subsumes the new
|
|
|
|
// predicate.
|
|
|
|
if (BBI.Predicate.size() && !TII->SubsumesPredicate(BBI.Predicate, Pred))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
if (BBI.BrCond.size()) {
|
|
|
|
if (!isTriangle)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// Test predicate subsumsion.
|
|
|
|
std::vector<MachineOperand> RevPred(Pred);
|
|
|
|
std::vector<MachineOperand> Cond(BBI.BrCond);
|
|
|
|
if (RevBranch) {
|
|
|
|
if (TII->ReverseBranchCondition(Cond))
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
if (TII->ReverseBranchCondition(RevPred) ||
|
|
|
|
!TII->SubsumesPredicate(Cond, RevPred))
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2007-06-08 17:36:04 +08:00
|
|
|
/// AnalyzeBlock - Analyze the structure of the sub-CFG starting from
|
2007-05-19 02:14:37 +08:00
|
|
|
/// the specified block. Record its successors and whether it looks like an
|
|
|
|
/// if-conversion candidate.
|
2007-06-12 06:26:22 +08:00
|
|
|
IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB) {
|
2007-05-16 10:00:57 +08:00
|
|
|
BBInfo &BBI = BBAnalysis[BB->getNumber()];
|
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed)
|
|
|
|
return BBI;
|
2007-05-18 08:20:58 +08:00
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
BBI.BB = BB;
|
|
|
|
BBI.IsBeingAnalyzed = true;
|
2007-05-25 08:59:01 +08:00
|
|
|
BBI.Kind = ICNotClassfied;
|
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
ScanInstructions(BBI);
|
|
|
|
|
|
|
|
// Unanalyable or ends with fallthrough or unconditional branch.
|
|
|
|
if (!BBI.IsBrAnalyzable || BBI.BrCond.size() == 0) {
|
|
|
|
BBI.IsBeingAnalyzed = false;
|
|
|
|
BBI.IsAnalyzed = true;
|
|
|
|
return BBI;
|
|
|
|
}
|
2007-05-17 05:54:37 +08:00
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
// Do not ifcvt if either path is a back edge to the entry block.
|
|
|
|
if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
|
|
|
|
BBI.IsBeingAnalyzed = false;
|
|
|
|
BBI.IsAnalyzed = true;
|
|
|
|
return BBI;
|
|
|
|
}
|
2007-05-18 08:20:58 +08:00
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
BBInfo &TrueBBI = AnalyzeBlock(BBI.TrueBB);
|
|
|
|
BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB);
|
2007-06-06 18:16:17 +08:00
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
if (TrueBBI.IsDone && FalseBBI.IsDone) {
|
|
|
|
BBI.IsBeingAnalyzed = false;
|
|
|
|
BBI.IsAnalyzed = true;
|
|
|
|
return BBI;
|
2007-06-06 18:16:17 +08:00
|
|
|
}
|
|
|
|
|
2007-06-04 14:47:22 +08:00
|
|
|
std::vector<MachineOperand> RevCond(BBI.BrCond);
|
|
|
|
bool CanRevCond = !TII->ReverseBranchCondition(RevCond);
|
2007-06-08 17:36:04 +08:00
|
|
|
|
|
|
|
if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI) &&
|
2007-06-12 06:26:22 +08:00
|
|
|
!(TrueBBI.ClobbersPred && FalseBBI.ClobbersPred) &&
|
2007-06-08 17:36:04 +08:00
|
|
|
FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
|
|
|
|
FeasibilityAnalysis(FalseBBI, RevCond)) {
|
2007-05-16 10:00:57 +08:00
|
|
|
// Diamond:
|
|
|
|
// EBB
|
|
|
|
// / \_
|
|
|
|
// | |
|
|
|
|
// TBB FBB
|
|
|
|
// \ /
|
2007-05-18 08:20:58 +08:00
|
|
|
// TailBB
|
2007-06-06 07:46:14 +08:00
|
|
|
// Note TailBB can be empty.
|
2007-05-22 06:22:58 +08:00
|
|
|
BBI.Kind = ICDiamond;
|
2007-05-18 08:20:58 +08:00
|
|
|
BBI.TailBB = TrueBBI.TrueBB;
|
2007-06-04 14:47:22 +08:00
|
|
|
} else {
|
|
|
|
// FIXME: Consider duplicating if BB is small.
|
2007-06-08 17:36:04 +08:00
|
|
|
if (ValidTriangle(TrueBBI, FalseBBI) &&
|
|
|
|
FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
|
|
|
|
// Triangle:
|
|
|
|
// EBB
|
|
|
|
// | \_
|
|
|
|
// | |
|
|
|
|
// | TBB
|
|
|
|
// | /
|
|
|
|
// FBB
|
|
|
|
BBI.Kind = ICTriangle;
|
2007-06-13 07:54:05 +08:00
|
|
|
} else if (ValidTriangle(TrueBBI, FalseBBI, true) &&
|
|
|
|
FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
|
|
|
|
BBI.Kind = ICTriangleRev;
|
2007-06-08 17:36:04 +08:00
|
|
|
} else if (ValidSimple(TrueBBI) &&
|
|
|
|
FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
|
|
|
|
// Simple (split, no rejoin):
|
|
|
|
// EBB
|
|
|
|
// | \_
|
|
|
|
// | |
|
|
|
|
// | TBB---> exit
|
|
|
|
// |
|
|
|
|
// FBB
|
|
|
|
BBI.Kind = ICSimple;
|
|
|
|
} else if (CanRevCond) {
|
2007-06-06 08:57:55 +08:00
|
|
|
// Try the other path...
|
2007-06-08 17:36:04 +08:00
|
|
|
if (ValidTriangle(FalseBBI, TrueBBI) &&
|
|
|
|
FeasibilityAnalysis(FalseBBI, RevCond, true)) {
|
2007-06-09 09:03:43 +08:00
|
|
|
BBI.Kind = ICTriangleFalse;
|
2007-06-08 17:36:04 +08:00
|
|
|
} else if (ValidTriangle(FalseBBI, TrueBBI, true) &&
|
|
|
|
FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
|
2007-06-09 09:03:43 +08:00
|
|
|
BBI.Kind = ICTriangleFRev;
|
2007-06-08 17:36:04 +08:00
|
|
|
} else if (ValidSimple(FalseBBI) &&
|
|
|
|
FeasibilityAnalysis(FalseBBI, RevCond)) {
|
|
|
|
BBI.Kind = ICSimpleFalse;
|
2007-06-04 14:47:22 +08:00
|
|
|
}
|
|
|
|
}
|
2007-05-16 10:00:57 +08:00
|
|
|
}
|
2007-06-04 14:47:22 +08:00
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
BBI.IsBeingAnalyzed = false;
|
|
|
|
BBI.IsAnalyzed = true;
|
|
|
|
return BBI;
|
2007-05-19 02:14:37 +08:00
|
|
|
}
|
|
|
|
|
2007-05-31 03:49:19 +08:00
|
|
|
/// AttemptRestructuring - Restructure the sub-CFG rooted in the given block to
|
|
|
|
/// expose more if-conversion opportunities. e.g.
|
|
|
|
///
|
|
|
|
/// cmp
|
|
|
|
/// b le BB1
|
|
|
|
/// / \____
|
|
|
|
/// / |
|
|
|
|
/// cmp |
|
|
|
|
/// b eq BB1 |
|
|
|
|
/// / \____ |
|
|
|
|
/// / \ |
|
|
|
|
/// BB1
|
|
|
|
/// ==>
|
|
|
|
///
|
|
|
|
/// cmp
|
|
|
|
/// b eq BB1
|
|
|
|
/// / \____
|
|
|
|
/// / |
|
|
|
|
/// cmp |
|
|
|
|
/// b le BB1 |
|
|
|
|
/// / \____ |
|
|
|
|
/// / \ |
|
|
|
|
/// BB1
|
|
|
|
bool IfConverter::AttemptRestructuring(BBInfo &BBI) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion
|
|
|
|
/// candidates. It returns true if any CFG restructuring is done to expose more
|
|
|
|
/// if-conversion opportunities.
|
|
|
|
bool IfConverter::AnalyzeBlocks(MachineFunction &MF,
|
2007-05-23 15:23:16 +08:00
|
|
|
std::vector<BBInfo*> &Candidates) {
|
2007-05-31 03:49:19 +08:00
|
|
|
bool Change = false;
|
2007-05-19 03:26:33 +08:00
|
|
|
std::set<MachineBasicBlock*> Visited;
|
2007-05-31 03:49:19 +08:00
|
|
|
for (unsigned i = 0, e = Roots.size(); i != e; ++i) {
|
|
|
|
for (idf_ext_iterator<MachineBasicBlock*> I=idf_ext_begin(Roots[i],Visited),
|
|
|
|
E = idf_ext_end(Roots[i], Visited); I != E; ++I) {
|
|
|
|
MachineBasicBlock *BB = *I;
|
2007-06-12 06:26:22 +08:00
|
|
|
BBInfo &BBI = AnalyzeBlock(BB);
|
2007-05-31 03:49:19 +08:00
|
|
|
switch (BBI.Kind) {
|
2007-06-04 14:47:22 +08:00
|
|
|
case ICSimple:
|
|
|
|
case ICSimpleFalse:
|
2007-05-31 03:49:19 +08:00
|
|
|
case ICTriangle:
|
2007-06-13 07:54:05 +08:00
|
|
|
case ICTriangleRev:
|
|
|
|
case ICTriangleFalse:
|
|
|
|
case ICTriangleFRev:
|
2007-05-31 03:49:19 +08:00
|
|
|
case ICDiamond:
|
2007-06-15 04:28:52 +08:00
|
|
|
BBI.IsEnqueued = true;
|
2007-05-31 03:49:19 +08:00
|
|
|
Candidates.push_back(&BBI);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
Change |= AttemptRestructuring(BBI);
|
|
|
|
break;
|
|
|
|
}
|
2007-05-22 06:22:58 +08:00
|
|
|
}
|
2007-05-16 10:00:57 +08:00
|
|
|
}
|
2007-05-31 03:49:19 +08:00
|
|
|
|
2007-06-01 08:12:12 +08:00
|
|
|
// Sort to favor more complex ifcvt scheme.
|
|
|
|
std::stable_sort(Candidates.begin(), Candidates.end(), IfcvtCandidateCmp);
|
|
|
|
|
2007-05-31 03:49:19 +08:00
|
|
|
return Change;
|
2007-05-16 10:00:57 +08:00
|
|
|
}
|
|
|
|
|
2007-06-09 06:01:07 +08:00
|
|
|
/// canFallThroughTo - Returns true either if ToBB is the next block after BB or
|
|
|
|
/// that all the intervening blocks are empty (given BB can fall through to its
|
|
|
|
/// next block).
|
|
|
|
static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
|
2007-06-04 14:47:22 +08:00
|
|
|
MachineFunction::iterator I = BB;
|
2007-06-05 15:05:25 +08:00
|
|
|
MachineFunction::iterator TI = ToBB;
|
|
|
|
MachineFunction::iterator E = BB->getParent()->end();
|
|
|
|
while (++I != TI)
|
|
|
|
if (I == E || !I->empty())
|
2007-06-04 14:47:22 +08:00
|
|
|
return false;
|
|
|
|
return true;
|
2007-05-22 06:22:58 +08:00
|
|
|
}
|
|
|
|
|
2007-05-31 03:49:19 +08:00
|
|
|
/// ReTryPreds - Invalidate predecessor BB info so it would be re-analyzed
|
2007-06-15 07:13:19 +08:00
|
|
|
/// to determine if it can be if-converted. If predecessor is already
|
|
|
|
/// enqueud, dequeue it!
|
2007-05-31 03:49:19 +08:00
|
|
|
void IfConverter::ReTryPreds(MachineBasicBlock *BB) {
|
2007-05-23 15:23:16 +08:00
|
|
|
for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
|
|
|
|
E = BB->pred_end(); PI != E; ++PI) {
|
|
|
|
BBInfo &PBBI = BBAnalysis[(*PI)->getNumber()];
|
2007-06-15 07:13:19 +08:00
|
|
|
if (PBBI.IsDone)
|
|
|
|
continue;
|
|
|
|
if (PBBI.Kind == ICNotClassfied) {
|
2007-06-15 04:28:52 +08:00
|
|
|
assert(!PBBI.IsEnqueued && "Unexpected");
|
2007-06-12 06:26:22 +08:00
|
|
|
PBBI.IsAnalyzed = false;
|
2007-06-15 07:13:19 +08:00
|
|
|
} else if (PBBI.IsEnqueued && PBBI.BB != BB)
|
|
|
|
PBBI.IsEnqueued = false;
|
2007-05-23 15:23:16 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-05-30 06:31:16 +08:00
|
|
|
/// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB.
|
|
|
|
///
|
|
|
|
static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
|
|
|
|
const TargetInstrInfo *TII) {
|
|
|
|
std::vector<MachineOperand> NoCond;
|
|
|
|
TII->InsertBranch(*BB, ToBB, NULL, NoCond);
|
|
|
|
}
|
|
|
|
|
2007-06-09 06:01:07 +08:00
|
|
|
/// RemoveExtraEdges - Remove true / false edges if either / both are no longer
|
|
|
|
/// successors.
|
|
|
|
void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
|
|
|
|
MachineBasicBlock *TBB = NULL, *FBB = NULL;
|
|
|
|
std::vector<MachineOperand> Cond;
|
|
|
|
bool isAnalyzable = !TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond);
|
|
|
|
bool CanFallthrough = isAnalyzable && (TBB == NULL || FBB == NULL);
|
|
|
|
if (BBI.TrueBB && BBI.BB->isSuccessor(BBI.TrueBB))
|
|
|
|
if (!(BBI.TrueBB == TBB || BBI.TrueBB == FBB ||
|
|
|
|
(CanFallthrough && getNextBlock(BBI.BB) == BBI.TrueBB)))
|
|
|
|
BBI.BB->removeSuccessor(BBI.TrueBB);
|
|
|
|
if (BBI.FalseBB && BBI.BB->isSuccessor(BBI.FalseBB))
|
|
|
|
if (!(BBI.FalseBB == TBB || BBI.FalseBB == FBB ||
|
|
|
|
(CanFallthrough && getNextBlock(BBI.BB) == BBI.FalseBB)))
|
|
|
|
BBI.BB->removeSuccessor(BBI.FalseBB);
|
|
|
|
}
|
|
|
|
|
2007-06-04 14:47:22 +08:00
|
|
|
/// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG.
|
2007-05-22 06:22:58 +08:00
|
|
|
///
|
2007-06-04 14:47:22 +08:00
|
|
|
bool IfConverter::IfConvertSimple(BBInfo &BBI) {
|
2007-05-22 06:22:58 +08:00
|
|
|
BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
|
|
|
|
BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
|
|
|
|
BBInfo *CvtBBI = &TrueBBI;
|
|
|
|
BBInfo *NextBBI = &FalseBBI;
|
2007-05-23 15:23:16 +08:00
|
|
|
|
2007-06-04 14:47:22 +08:00
|
|
|
std::vector<MachineOperand> Cond(BBI.BrCond);
|
2007-06-06 18:16:17 +08:00
|
|
|
if (BBI.Kind == ICSimpleFalse) {
|
2007-06-02 04:29:21 +08:00
|
|
|
std::swap(CvtBBI, NextBBI);
|
2007-06-04 14:47:22 +08:00
|
|
|
TII->ReverseBranchCondition(Cond);
|
2007-06-02 04:29:21 +08:00
|
|
|
}
|
2007-05-23 15:23:16 +08:00
|
|
|
|
2007-06-04 14:47:22 +08:00
|
|
|
PredicateBlock(*CvtBBI, Cond);
|
2007-05-22 06:22:58 +08:00
|
|
|
|
2007-06-09 06:01:07 +08:00
|
|
|
// Merge converted block into entry block.
|
2007-05-23 15:23:16 +08:00
|
|
|
BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
|
2007-05-22 06:22:58 +08:00
|
|
|
MergeBlocks(BBI, *CvtBBI);
|
2007-06-07 10:12:15 +08:00
|
|
|
|
2007-06-06 10:08:52 +08:00
|
|
|
bool IterIfcvt = true;
|
2007-06-09 06:01:07 +08:00
|
|
|
if (!canFallThroughTo(BBI.BB, NextBBI->BB)) {
|
2007-05-30 06:31:16 +08:00
|
|
|
InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
|
2007-06-09 09:03:43 +08:00
|
|
|
BBI.HasFallThrough = false;
|
2007-06-08 17:36:04 +08:00
|
|
|
// Now ifcvt'd block will look like this:
|
|
|
|
// BB:
|
|
|
|
// ...
|
|
|
|
// t, f = cmp
|
|
|
|
// if t op
|
|
|
|
// b BBf
|
|
|
|
//
|
|
|
|
// We cannot further ifcvt this block because the unconditional branch
|
|
|
|
// will have to be predicated on the new condition, that will not be
|
|
|
|
// available if cmp executes.
|
|
|
|
IterIfcvt = false;
|
2007-06-06 10:08:52 +08:00
|
|
|
}
|
2007-05-23 15:23:16 +08:00
|
|
|
|
2007-06-09 06:01:07 +08:00
|
|
|
RemoveExtraEdges(BBI);
|
|
|
|
|
2007-05-23 15:23:16 +08:00
|
|
|
// Update block info. BB can be iteratively if-converted.
|
2007-06-12 06:26:22 +08:00
|
|
|
if (!IterIfcvt)
|
|
|
|
BBI.IsDone = true;
|
2007-05-31 03:49:19 +08:00
|
|
|
ReTryPreds(BBI.BB);
|
2007-06-12 06:26:22 +08:00
|
|
|
CvtBBI->IsDone = true;
|
2007-05-22 06:22:58 +08:00
|
|
|
|
|
|
|
// FIXME: Must maintain LiveIns.
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2007-05-17 05:54:37 +08:00
|
|
|
/// IfConvertTriangle - If convert a triangle sub-CFG.
|
|
|
|
///
|
2007-05-16 10:00:57 +08:00
|
|
|
bool IfConverter::IfConvertTriangle(BBInfo &BBI) {
|
2007-05-23 15:23:16 +08:00
|
|
|
BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
|
2007-06-09 09:03:43 +08:00
|
|
|
BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
|
|
|
|
BBInfo *CvtBBI = &TrueBBI;
|
|
|
|
BBInfo *NextBBI = &FalseBBI;
|
|
|
|
|
|
|
|
std::vector<MachineOperand> Cond(BBI.BrCond);
|
|
|
|
if (BBI.Kind == ICTriangleFalse || BBI.Kind == ICTriangleFRev) {
|
|
|
|
std::swap(CvtBBI, NextBBI);
|
|
|
|
TII->ReverseBranchCondition(Cond);
|
|
|
|
}
|
2007-06-13 07:54:05 +08:00
|
|
|
if (BBI.Kind == ICTriangleRev || BBI.Kind == ICTriangleFRev) {
|
|
|
|
ReverseBranchCondition(*CvtBBI);
|
|
|
|
// BB has been changed, modify its predecessors (except for this
|
|
|
|
// one) so they don't get ifcvt'ed based on bad intel.
|
|
|
|
for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(),
|
|
|
|
E = CvtBBI->BB->pred_end(); PI != E; ++PI) {
|
|
|
|
MachineBasicBlock *PBB = *PI;
|
|
|
|
if (PBB == BBI.BB)
|
|
|
|
continue;
|
|
|
|
BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
|
|
|
|
if (PBBI.IsEnqueued)
|
|
|
|
PBBI.IsEnqueued = false;
|
|
|
|
}
|
|
|
|
}
|
2007-06-01 15:41:07 +08:00
|
|
|
|
2007-05-22 06:22:58 +08:00
|
|
|
// Predicate the 'true' block after removing its branch.
|
2007-06-13 08:04:00 +08:00
|
|
|
CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
|
2007-06-09 09:03:43 +08:00
|
|
|
PredicateBlock(*CvtBBI, Cond);
|
2007-05-16 10:00:57 +08:00
|
|
|
|
2007-06-04 14:47:22 +08:00
|
|
|
// If 'true' block has a 'false' successor, add an exit branch to it.
|
2007-06-09 09:03:43 +08:00
|
|
|
bool HasEarlyExit = CvtBBI->FalseBB != NULL;
|
2007-06-05 09:31:40 +08:00
|
|
|
if (HasEarlyExit) {
|
2007-06-09 09:03:43 +08:00
|
|
|
std::vector<MachineOperand> RevCond(CvtBBI->BrCond);
|
2007-06-01 15:41:07 +08:00
|
|
|
if (TII->ReverseBranchCondition(RevCond))
|
|
|
|
assert(false && "Unable to reverse branch condition!");
|
2007-06-09 09:03:43 +08:00
|
|
|
TII->InsertBranch(*CvtBBI->BB, CvtBBI->FalseBB, NULL, RevCond);
|
2007-06-01 15:41:07 +08:00
|
|
|
}
|
|
|
|
|
2007-06-08 17:36:04 +08:00
|
|
|
// Now merge the entry of the triangle with the true block.
|
|
|
|
BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
|
2007-06-09 09:03:43 +08:00
|
|
|
MergeBlocks(BBI, *CvtBBI);
|
2007-06-08 17:36:04 +08:00
|
|
|
|
|
|
|
// Merge in the 'false' block if the 'false' block has no other
|
|
|
|
// predecessors. Otherwise, add a unconditional branch from to 'false'.
|
2007-06-05 08:07:37 +08:00
|
|
|
bool FalseBBDead = false;
|
2007-06-06 10:08:52 +08:00
|
|
|
bool IterIfcvt = true;
|
2007-06-09 09:03:43 +08:00
|
|
|
bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB);
|
2007-06-07 16:13:00 +08:00
|
|
|
if (!isFallThrough) {
|
|
|
|
// Only merge them if the true block does not fallthrough to the false
|
|
|
|
// block. By not merging them, we make it possible to iteratively
|
|
|
|
// ifcvt the blocks.
|
2007-06-09 09:03:43 +08:00
|
|
|
if (!HasEarlyExit && NextBBI->BB->pred_size() == 1) {
|
|
|
|
MergeBlocks(BBI, *NextBBI);
|
2007-06-07 16:13:00 +08:00
|
|
|
FalseBBDead = true;
|
|
|
|
} else {
|
2007-06-09 09:03:43 +08:00
|
|
|
InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
|
|
|
|
BBI.HasFallThrough = false;
|
2007-06-07 16:13:00 +08:00
|
|
|
}
|
2007-06-08 17:36:04 +08:00
|
|
|
// Mixed predicated and unpredicated code. This cannot be iteratively
|
|
|
|
// predicated.
|
|
|
|
IterIfcvt = false;
|
2007-06-06 10:08:52 +08:00
|
|
|
}
|
2007-05-16 10:00:57 +08:00
|
|
|
|
2007-06-09 06:01:07 +08:00
|
|
|
RemoveExtraEdges(BBI);
|
2007-05-18 08:20:58 +08:00
|
|
|
|
2007-05-23 15:23:16 +08:00
|
|
|
// Update block info. BB can be iteratively if-converted.
|
2007-06-12 06:26:22 +08:00
|
|
|
if (!IterIfcvt)
|
|
|
|
BBI.IsDone = true;
|
2007-05-31 03:49:19 +08:00
|
|
|
ReTryPreds(BBI.BB);
|
2007-06-12 06:26:22 +08:00
|
|
|
CvtBBI->IsDone = true;
|
2007-06-05 08:07:37 +08:00
|
|
|
if (FalseBBDead)
|
2007-06-12 06:26:22 +08:00
|
|
|
NextBBI->IsDone = true;
|
2007-05-16 10:00:57 +08:00
|
|
|
|
2007-05-22 06:22:58 +08:00
|
|
|
// FIXME: Must maintain LiveIns.
|
|
|
|
return true;
|
2007-05-16 10:00:57 +08:00
|
|
|
}
|
|
|
|
|
2007-05-17 05:54:37 +08:00
|
|
|
/// IfConvertDiamond - If convert a diamond sub-CFG.
|
|
|
|
///
|
2007-05-16 10:00:57 +08:00
|
|
|
bool IfConverter::IfConvertDiamond(BBInfo &BBI) {
|
2007-06-04 14:47:22 +08:00
|
|
|
BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
|
2007-05-19 02:14:37 +08:00
|
|
|
BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
|
|
|
|
|
2007-05-22 06:22:58 +08:00
|
|
|
SmallVector<MachineInstr*, 2> Dups;
|
2007-06-04 14:47:22 +08:00
|
|
|
if (!BBI.TailBB) {
|
|
|
|
// No common merge block. Check if the terminators (e.g. return) are
|
|
|
|
// the same or predicable.
|
|
|
|
MachineBasicBlock::iterator TT = BBI.TrueBB->getFirstTerminator();
|
|
|
|
MachineBasicBlock::iterator FT = BBI.FalseBB->getFirstTerminator();
|
|
|
|
while (TT != BBI.TrueBB->end() && FT != BBI.FalseBB->end()) {
|
|
|
|
if (TT->isIdenticalTo(FT))
|
|
|
|
Dups.push_back(TT); // Will erase these later.
|
|
|
|
else if (!TT->isPredicable() && !FT->isPredicable())
|
|
|
|
return false; // Can't if-convert. Abort!
|
|
|
|
++TT;
|
|
|
|
++FT;
|
2007-05-19 02:14:37 +08:00
|
|
|
}
|
2007-05-16 10:00:57 +08:00
|
|
|
|
2007-06-04 14:47:22 +08:00
|
|
|
// One of the two pathes have more terminators, make sure they are
|
|
|
|
// all predicable.
|
|
|
|
while (TT != BBI.TrueBB->end()) {
|
|
|
|
if (!TT->isPredicable()) {
|
|
|
|
return false; // Can't if-convert. Abort!
|
2007-05-22 06:22:58 +08:00
|
|
|
}
|
2007-06-04 14:47:22 +08:00
|
|
|
++TT;
|
|
|
|
}
|
|
|
|
while (FT != BBI.FalseBB->end()) {
|
|
|
|
if (!FT->isPredicable()) {
|
|
|
|
return false; // Can't if-convert. Abort!
|
|
|
|
}
|
|
|
|
++FT;
|
2007-05-18 08:20:58 +08:00
|
|
|
}
|
2007-05-22 06:22:58 +08:00
|
|
|
}
|
2007-05-16 10:00:57 +08:00
|
|
|
|
2007-05-22 06:22:58 +08:00
|
|
|
// Remove the duplicated instructions from the 'true' block.
|
|
|
|
for (unsigned i = 0, e = Dups.size(); i != e; ++i) {
|
|
|
|
Dups[i]->eraseFromParent();
|
2007-05-23 15:23:16 +08:00
|
|
|
--TrueBBI.NonPredSize;
|
2007-05-22 06:22:58 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// Merge the 'true' and 'false' blocks by copying the instructions
|
|
|
|
// from the 'false' block to the 'true' block. That is, unless the true
|
|
|
|
// block would clobber the predicate, in that case, do the opposite.
|
2007-06-06 07:46:14 +08:00
|
|
|
BBInfo *BBI1 = &TrueBBI;
|
|
|
|
BBInfo *BBI2 = &FalseBBI;
|
2007-06-04 14:47:22 +08:00
|
|
|
std::vector<MachineOperand> RevCond(BBI.BrCond);
|
|
|
|
TII->ReverseBranchCondition(RevCond);
|
2007-06-06 07:46:14 +08:00
|
|
|
std::vector<MachineOperand> *Cond1 = &BBI.BrCond;
|
|
|
|
std::vector<MachineOperand> *Cond2 = &RevCond;
|
|
|
|
// Check the 'true' and 'false' blocks if either isn't ended with a branch.
|
|
|
|
// Either the block fallthrough to another block or it ends with a
|
|
|
|
// return. If it's the former, add a branch to its successor.
|
|
|
|
bool NeedBr1 = !BBI1->TrueBB && BBI1->BB->succ_size();
|
2007-06-06 08:57:55 +08:00
|
|
|
bool NeedBr2 = !BBI2->TrueBB && BBI2->BB->succ_size();
|
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
if ((TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred) ||
|
|
|
|
(!TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred &&
|
2007-06-06 08:57:55 +08:00
|
|
|
NeedBr1 && !NeedBr2)) {
|
|
|
|
std::swap(BBI1, BBI2);
|
|
|
|
std::swap(Cond1, Cond2);
|
|
|
|
std::swap(NeedBr1, NeedBr2);
|
|
|
|
}
|
2007-06-06 07:46:14 +08:00
|
|
|
|
|
|
|
// Predicate the 'true' block after removing its branch.
|
|
|
|
BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB);
|
|
|
|
PredicateBlock(*BBI1, *Cond1);
|
|
|
|
|
|
|
|
// Add an early exit branch if needed.
|
|
|
|
if (NeedBr1)
|
|
|
|
TII->InsertBranch(*BBI1->BB, *BBI1->BB->succ_begin(), NULL, *Cond1);
|
|
|
|
|
|
|
|
// Predicate the 'false' block.
|
|
|
|
PredicateBlock(*BBI2, *Cond2, true);
|
|
|
|
|
|
|
|
// Add an unconditional branch from 'false' to to 'false' successor if it
|
|
|
|
// will not be the fallthrough block.
|
2007-06-07 10:12:15 +08:00
|
|
|
if (NeedBr2 && !NeedBr1) {
|
|
|
|
// If BBI2 isn't going to be merged in, then the existing fallthrough
|
|
|
|
// or branch is fine.
|
2007-06-09 06:01:07 +08:00
|
|
|
if (!canFallThroughTo(BBI.BB, *BBI2->BB->succ_begin())) {
|
2007-06-07 10:12:15 +08:00
|
|
|
InsertUncondBranch(BBI2->BB, *BBI2->BB->succ_begin(), TII);
|
2007-06-09 09:03:43 +08:00
|
|
|
BBI2->HasFallThrough = false;
|
2007-06-07 10:12:15 +08:00
|
|
|
}
|
|
|
|
}
|
2007-06-06 07:46:14 +08:00
|
|
|
|
|
|
|
// Keep them as two separate blocks if there is an early exit.
|
|
|
|
if (!NeedBr1)
|
|
|
|
MergeBlocks(*BBI1, *BBI2);
|
|
|
|
|
2007-05-22 06:22:58 +08:00
|
|
|
// Remove the conditional branch from entry to the blocks.
|
2007-05-23 15:23:16 +08:00
|
|
|
BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
|
2007-05-22 06:22:58 +08:00
|
|
|
|
2007-06-06 07:46:14 +08:00
|
|
|
// Merge the combined block into the entry of the diamond.
|
|
|
|
MergeBlocks(BBI, *BBI1);
|
2007-05-18 08:20:58 +08:00
|
|
|
|
2007-06-06 08:57:55 +08:00
|
|
|
// 'True' and 'false' aren't combined, see if we need to add a unconditional
|
|
|
|
// branch to the 'false' block.
|
2007-06-09 06:01:07 +08:00
|
|
|
if (NeedBr1 && !canFallThroughTo(BBI.BB, BBI2->BB)) {
|
2007-06-07 10:12:15 +08:00
|
|
|
InsertUncondBranch(BBI.BB, BBI2->BB, TII);
|
2007-06-09 09:03:43 +08:00
|
|
|
BBI1->HasFallThrough = false;
|
2007-06-07 10:12:15 +08:00
|
|
|
}
|
2007-06-06 08:57:55 +08:00
|
|
|
|
2007-05-30 07:37:20 +08:00
|
|
|
// If the if-converted block fallthrough or unconditionally branch into the
|
|
|
|
// tail block, and the tail block does not have other predecessors, then
|
2007-05-22 06:22:58 +08:00
|
|
|
// fold the tail block in as well.
|
2007-06-06 07:46:14 +08:00
|
|
|
BBInfo *CvtBBI = NeedBr1 ? BBI2 : &BBI;
|
2007-05-30 07:37:20 +08:00
|
|
|
if (BBI.TailBB &&
|
2007-06-01 04:53:33 +08:00
|
|
|
BBI.TailBB->pred_size() == 1 && CvtBBI->BB->succ_size() == 1) {
|
2007-05-23 15:23:16 +08:00
|
|
|
CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
|
2007-05-22 06:22:58 +08:00
|
|
|
BBInfo TailBBI = BBAnalysis[BBI.TailBB->getNumber()];
|
|
|
|
MergeBlocks(*CvtBBI, TailBBI);
|
2007-06-12 06:26:22 +08:00
|
|
|
TailBBI.IsDone = true;
|
2007-05-22 06:22:58 +08:00
|
|
|
}
|
2007-05-18 08:20:58 +08:00
|
|
|
|
2007-06-09 06:01:07 +08:00
|
|
|
RemoveExtraEdges(BBI);
|
|
|
|
|
2007-06-06 07:46:14 +08:00
|
|
|
// Update block info.
|
2007-06-12 06:26:22 +08:00
|
|
|
BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
|
2007-05-16 10:00:57 +08:00
|
|
|
|
2007-05-22 06:22:58 +08:00
|
|
|
// FIXME: Must maintain LiveIns.
|
|
|
|
return true;
|
2007-05-16 10:00:57 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
/// PredicateBlock - Predicate every instruction in the block with the specified
|
|
|
|
/// condition. If IgnoreTerm is true, skip over all terminator instructions.
|
2007-05-23 15:23:16 +08:00
|
|
|
void IfConverter::PredicateBlock(BBInfo &BBI,
|
2007-05-16 10:00:57 +08:00
|
|
|
std::vector<MachineOperand> &Cond,
|
|
|
|
bool IgnoreTerm) {
|
2007-05-23 15:23:16 +08:00
|
|
|
for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
|
2007-05-16 10:00:57 +08:00
|
|
|
I != E; ++I) {
|
2007-06-04 14:47:22 +08:00
|
|
|
if (IgnoreTerm && TII->isTerminatorInstr(I->getOpcode()))
|
2007-05-23 15:23:16 +08:00
|
|
|
continue;
|
2007-06-04 14:47:22 +08:00
|
|
|
if (TII->isPredicated(I))
|
2007-05-16 10:00:57 +08:00
|
|
|
continue;
|
2007-06-04 14:47:22 +08:00
|
|
|
if (!TII->PredicateInstruction(I, Cond)) {
|
2007-06-01 08:55:26 +08:00
|
|
|
cerr << "Unable to predicate " << *I << "!\n";
|
2007-05-17 05:54:37 +08:00
|
|
|
abort();
|
|
|
|
}
|
2007-05-16 10:00:57 +08:00
|
|
|
}
|
2007-05-23 15:23:16 +08:00
|
|
|
|
2007-06-15 04:28:52 +08:00
|
|
|
BBI.IsAnalyzed = false;
|
2007-05-23 15:23:16 +08:00
|
|
|
BBI.NonPredSize = 0;
|
2007-06-09 03:17:12 +08:00
|
|
|
std::copy(Cond.begin(), Cond.end(), std::back_inserter(BBI.Predicate));
|
|
|
|
|
2007-06-04 14:47:22 +08:00
|
|
|
NumIfConvBBs++;
|
|
|
|
}
|
|
|
|
|
2007-05-18 08:20:58 +08:00
|
|
|
/// MergeBlocks - Move all instructions from FromBB to the end of ToBB.
|
2007-05-16 10:00:57 +08:00
|
|
|
///
|
2007-05-18 08:20:58 +08:00
|
|
|
void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI) {
|
|
|
|
ToBBI.BB->splice(ToBBI.BB->end(),
|
|
|
|
FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end());
|
2007-05-23 15:23:16 +08:00
|
|
|
|
2007-06-04 14:47:22 +08:00
|
|
|
// Redirect all branches to FromBB to ToBB.
|
2007-06-06 06:03:53 +08:00
|
|
|
std::vector<MachineBasicBlock *> Preds(FromBBI.BB->pred_begin(),
|
|
|
|
FromBBI.BB->pred_end());
|
2007-06-07 10:12:15 +08:00
|
|
|
for (unsigned i = 0, e = Preds.size(); i != e; ++i) {
|
|
|
|
MachineBasicBlock *Pred = Preds[i];
|
|
|
|
if (Pred == ToBBI.BB)
|
|
|
|
continue;
|
|
|
|
Pred->ReplaceUsesOfBlockWith(FromBBI.BB, ToBBI.BB);
|
|
|
|
}
|
|
|
|
|
|
|
|
std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
|
|
|
|
FromBBI.BB->succ_end());
|
2007-06-09 06:01:07 +08:00
|
|
|
MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
|
2007-06-09 09:03:43 +08:00
|
|
|
MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
|
2007-06-07 10:12:15 +08:00
|
|
|
|
|
|
|
for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
|
|
|
|
MachineBasicBlock *Succ = Succs[i];
|
2007-06-09 06:01:07 +08:00
|
|
|
// Fallthrough edge can't be transferred.
|
2007-06-07 10:12:15 +08:00
|
|
|
if (Succ == FallThrough)
|
|
|
|
continue;
|
|
|
|
FromBBI.BB->removeSuccessor(Succ);
|
|
|
|
if (!ToBBI.BB->isSuccessor(Succ))
|
|
|
|
ToBBI.BB->addSuccessor(Succ);
|
|
|
|
}
|
2007-06-04 14:47:22 +08:00
|
|
|
|
2007-06-09 06:01:07 +08:00
|
|
|
// Now FromBBI always fall through to the next block!
|
|
|
|
if (NBB)
|
|
|
|
FromBBI.BB->addSuccessor(NBB);
|
|
|
|
|
2007-05-23 15:23:16 +08:00
|
|
|
ToBBI.NonPredSize += FromBBI.NonPredSize;
|
|
|
|
FromBBI.NonPredSize = 0;
|
2007-06-06 18:16:17 +08:00
|
|
|
|
2007-06-12 06:26:22 +08:00
|
|
|
ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
|
2007-06-09 09:03:43 +08:00
|
|
|
ToBBI.HasFallThrough = FromBBI.HasFallThrough;
|
2007-06-09 03:17:12 +08:00
|
|
|
|
|
|
|
std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
|
|
|
|
std::back_inserter(ToBBI.Predicate));
|
|
|
|
FromBBI.Predicate.clear();
|
2007-06-15 04:28:52 +08:00
|
|
|
|
|
|
|
ToBBI.IsAnalyzed = false;
|
|
|
|
FromBBI.IsAnalyzed = false;
|
2007-05-16 10:00:57 +08:00
|
|
|
}
|