forked from OSchip/llvm-project
64 lines
2.7 KiB
LLVM
64 lines
2.7 KiB
LLVM
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; RUN: opt -S -loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -enable-interleaved-mem-accesses=true < %s | FileCheck %s
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; When merging two stores with interleaved access vectorization, make sure we
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; propagate the alias information from all scalar stores to form the most
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; generic alias info.
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios5.0.0"
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%struct.Vec4r = type { double, double, double, double }
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%struct.Vec2r = type { double, double }
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define void @foobar(%struct.Vec4r* nocapture readonly %p, i32 %i)
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{
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entry:
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%cp = alloca [20 x %struct.Vec2r], align 8
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%0 = bitcast [20 x %struct.Vec2r]* %cp to i8*
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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%arraydecay = getelementptr inbounds [20 x %struct.Vec2r], [20 x %struct.Vec2r]* %cp, i64 0, i64 0
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call void @g(%struct.Vec2r* nonnull %arraydecay) #4
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ret void
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for.body: ; preds = %for.body, %entry
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%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
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%x = getelementptr inbounds %struct.Vec4r, %struct.Vec4r* %p, i64 %indvars.iv, i32 0
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%1 = load double, double* %x, align 8, !tbaa !3
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%mul = fmul double %1, 2.000000e+00
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%x4 = getelementptr inbounds [20 x %struct.Vec2r], [20 x %struct.Vec2r]* %cp, i64 0, i64 %indvars.iv, i32 0
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; The new store should alias any double rather than one of the fields of Vec2r.
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; CHECK: store <4 x double> {{.*}} !tbaa ![[STORE_TBAA:[0-9]+]]
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; CHECK-DAG: ![[DOUBLE_TBAA:[0-9]+]] = !{!"double", !{{[0-9+]}}, i64 0}
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; CHECK-DAG: ![[STORE_TBAA]] = !{![[DOUBLE_TBAA]], ![[DOUBLE_TBAA]], i64 0}
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store double %mul, double* %x4, align 8, !tbaa !8
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%y = getelementptr inbounds %struct.Vec4r, %struct.Vec4r* %p, i64 %indvars.iv, i32 1
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%2 = load double, double* %y, align 8, !tbaa !10
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%mul7 = fmul double %2, 3.000000e+00
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%y10 = getelementptr inbounds [20 x %struct.Vec2r], [20 x %struct.Vec2r]* %cp, i64 0, i64 %indvars.iv, i32 1
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store double %mul7, double* %y10, align 8, !tbaa !11
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond = icmp eq i64 %indvars.iv.next, 4
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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}
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declare void @g(%struct.Vec2r*)
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!llvm.module.flags = !{!0, !1}
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!llvm.ident = !{!2}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 7, !"PIC Level", i32 2}
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!2 = !{!"clang version 6.0.0 (trunk 319007) (llvm/trunk 319324)"}
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!3 = !{!4, !5, i64 0}
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!4 = !{!"Vec4r", !5, i64 0, !5, i64 8, !5, i64 16, !5, i64 24}
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!5 = !{!"double", !6, i64 0}
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!6 = !{!"omnipotent char", !7, i64 0}
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!7 = !{!"Simple C/C++ TBAA"}
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!8 = !{!9, !5, i64 0}
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!9 = !{!"Vec2r", !5, i64 0, !5, i64 8}
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!10 = !{!4, !5, i64 8}
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!11 = !{!9, !5, i64 8}
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