2019-09-10 01:13:44 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -verify-machineinstrs < %s | FileCheck %s
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; TODO: Replace with existing DAG tests
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@lds_512_4 = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4
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@lds_4_8 = addrspace(3) global i32 undef, align 8
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define amdgpu_kernel void @use_lds_globals(i32 addrspace(1)* %out, i32 addrspace(3)* %in) #0 {
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; CHECK-LABEL: use_lds_globals:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; CHECK-NEXT: s_add_u32 s2, 4, 4
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[AMDGPU] Remove dubious logic in bidirectional list scheduler
Summary:
pickNodeBidirectional tried to compare the best top candidate and the
best bottom candidate by examining TopCand.Reason and BotCand.Reason.
This is unsound because, after calling pickNodeFromQueue, Cand.Reason
does not reflect the most important reason why Cand was chosen. Rather
it reflects the most recent reason why it beat some other potential
candidate, which could have been for some low priority tie breaker
reason.
I have seen this cause problems where TopCand is a good candidate, but
because TopCand.Reason is ORDER (which is very low priority) it is
repeatedly ignored in favour of a mediocre BotCand. This is not how
bidirectional scheduling is supposed to work.
To fix this I changed the code to always compare TopCand and BotCand
directly, like the generic implementation of pickNodeBidirectional does.
This removes some uncommented AMDGPU-specific logic; if this logic turns
out to be important then perhaps it could be moved into an override of
tryCandidate instead.
Graphics shader benchmarking on gfx10 shows a lot more positive than
negative effects from this change.
Reviewers: arsenm, tstellar, rampitec, kzhuravl, vpykhtin, dstuttard, tpr, atrick, MatzeB
Subscribers: jvesely, wdng, nhaehnle, yaxunl, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68338
2019-10-07 22:33:59 +08:00
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; CHECK-NEXT: v_mov_b32_e32 v0, s2
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2019-09-10 01:13:44 +08:00
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; CHECK-NEXT: s_mov_b32 m0, -1
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[AMDGPU] Remove dubious logic in bidirectional list scheduler
Summary:
pickNodeBidirectional tried to compare the best top candidate and the
best bottom candidate by examining TopCand.Reason and BotCand.Reason.
This is unsound because, after calling pickNodeFromQueue, Cand.Reason
does not reflect the most important reason why Cand was chosen. Rather
it reflects the most recent reason why it beat some other potential
candidate, which could have been for some low priority tie breaker
reason.
I have seen this cause problems where TopCand is a good candidate, but
because TopCand.Reason is ORDER (which is very low priority) it is
repeatedly ignored in favour of a mediocre BotCand. This is not how
bidirectional scheduling is supposed to work.
To fix this I changed the code to always compare TopCand and BotCand
directly, like the generic implementation of pickNodeBidirectional does.
This removes some uncommented AMDGPU-specific logic; if this logic turns
out to be important then perhaps it could be moved into an override of
tryCandidate instead.
Graphics shader benchmarking on gfx10 shows a lot more positive than
negative effects from this change.
Reviewers: arsenm, tstellar, rampitec, kzhuravl, vpykhtin, dstuttard, tpr, atrick, MatzeB
Subscribers: jvesely, wdng, nhaehnle, yaxunl, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68338
2019-10-07 22:33:59 +08:00
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; CHECK-NEXT: ds_read_b32 v2, v0
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2019-09-10 01:13:44 +08:00
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: s_add_u32 s0, s0, 4
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; CHECK-NEXT: s_addc_u32 s1, s1, 0
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; CHECK-NEXT: v_mov_b32_e32 v0, s0
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; CHECK-NEXT: v_mov_b32_e32 v1, s1
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; CHECK-NEXT: flat_store_dword v[0:1], v2
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; CHECK-NEXT: v_mov_b32_e32 v0, 9
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; CHECK-NEXT: v_mov_b32_e32 v1, 0
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; CHECK-NEXT: ds_write_b32 v1, v0
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; CHECK-NEXT: s_endpgm
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entry:
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%tmp0 = getelementptr [128 x i32], [128 x i32] addrspace(3)* @lds_512_4, i32 0, i32 1
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%tmp1 = load i32, i32 addrspace(3)* %tmp0
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%tmp2 = getelementptr i32, i32 addrspace(1)* %out, i32 1
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store i32 %tmp1, i32 addrspace(1)* %tmp2
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store i32 9, i32 addrspace(3)* @lds_4_8
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ret void
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}
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attributes #0 = { nounwind }
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