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llvm-project/llvm/test/MC/AVR/inst-sbiw.s

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[AVR] Add all of the machine code test suite Summary: This adds all of the AVR machine code tests. Reviewers: arsenm, kparzysz Subscribers: wdng, japaric Differential Revision: https://reviews.llvm.org/D26387 llvm-svn: 286417
2016-11-10 07:46:25 +08:00
; RUN: llvm-mc -triple avr -mattr=addsubiw -show-encoding < %s | FileCheck %s
[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option A subsequent change will reject -long-option.
2020-03-16 07:17:52 +08:00
; RUNx: llvm-mc -filetype=obj -triple avr -mattr=addsubiw < %s | llvm-objdump -d --mattr=addsubiw - | FileCheck --check-prefix=CHECK-INST %s
[AVR] Add all of the machine code test suite Summary: This adds all of the AVR machine code tests. Reviewers: arsenm, kparzysz Subscribers: wdng, japaric Differential Revision: https://reviews.llvm.org/D26387 llvm-svn: 286417
2016-11-10 07:46:25 +08:00
foo:
sbiw r26, 54
sbiw X, 63
sbiw 28, 52
sbiw r28, 0
sbiw r30, 63
sbiw Z, 47
sbiw r24, 1
sbiw r24, 2
sbiw r24, SYMBOL-1
; CHECK: sbiw r26, 54 ; encoding: [0xd6,0x97]
; CHECK: sbiw r26, 63 ; encoding: [0xdf,0x97]
; CHECK: sbiw r28, 52 ; encoding: [0xe4,0x97]
; CHECK: sbiw r28, 0 ; encoding: [0x20,0x97]
; CHECK: sbiw r30, 63 ; encoding: [0xff,0x97]
; CHECK: sbiw r30, 47 ; encoding: [0xbf,0x97]
; CHECK: sbiw r24, 1 ; encoding: [0x01,0x97]
; CHECK: sbiw r24, 2 ; encoding: [0x02,0x97]
; CHECK: sbiw r24, SYMBOL-1 ; encoding: [0b00AAAAAA,0x97]
; fixup A - offset: 0, value: SYMBOL-1, kind: fixup_6_adiw
[AVR] Disassemble register operands Simply by implementing a few functions I was able to correctly disassemble a much larger amount of instructions. Differential Revision: https://reviews.llvm.org/D74045
2020-02-05 19:53:06 +08:00
; CHECK-INST: sbiw r26, 54
; CHECK-INST: sbiw X, 63
; CHECK-INST: sbiw 28, 52
; CHECK-INST: sbiw r28, 0
; CHECK-INST: sbiw r30, 63
; CHECK-INST: sbiw Z, 47
; CHECK-INST: sbiw r24, 1
; CHECK-INST: sbiw r24, 2
; CHECK-INST: sbiw r24, SYMBOL-1