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llvm-project/llvm/test/CodeGen/X86/avx512-i1test.ll

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autogenerate checks llvm-svn: 278624
2016-08-14 17:34:39 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; RUN: llc < %s -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
; RUN: llc < %s -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
AVX-512: Fixed a bug in lowering setcc for MVT::i1 type llvm-svn: 224008
2014-12-11 18:21:12 +08:00
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @func() {
autogenerate checks llvm-svn: 278624
2016-08-14 17:34:39 +08:00
; CHECK-LABEL: func:
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred. Summary: Two utils methods have essentially the same functionality. This is an attempt to merge them into one. 1. lib/Transforms/Utils/Local.cpp : MergeBasicBlockIntoOnlyPred 2. lib/Transforms/Utils/BasicBlockUtils.cpp : MergeBlockIntoPredecessor Prior to the patch: 1. MergeBasicBlockIntoOnlyPred Updates either DomTree or DeferredDominance Moves all instructions from Pred to BB, deletes Pred Asserts BB has single predecessor If address was taken, replace the block address with constant 1 (?) 2. MergeBlockIntoPredecessor Updates DomTree, LoopInfo and MemoryDependenceResults Moves all instruction from BB to Pred, deletes BB Returns if doesn't have a single predecessor Returns if BB's address was taken After the patch: Method 2. MergeBlockIntoPredecessor is attempting to become the new default: Updates DomTree or DeferredDominance, and LoopInfo and MemoryDependenceResults Moves all instruction from BB to Pred, deletes BB Returns if doesn't have a single predecessor Returns if BB's address was taken Uses of MergeBasicBlockIntoOnlyPred that need to be replaced: 1. lib/Transforms/Scalar/LoopSimplifyCFG.cpp Updated in this patch. No challenges. 2. lib/CodeGen/CodeGenPrepare.cpp Updated in this patch. i. eliminateFallThrough is straightforward, but I added using a temporary array to avoid the iterator invalidation. ii. eliminateMostlyEmptyBlock(s) methods also now use a temporary array for blocks Some interesting aspects: - Since Pred is not deleted (BB is), the entry block does not need updating. - The entry block was being updated with the deleted block in eliminateMostlyEmptyBlock. Added assert to make obvious that BB=SinglePred. - isMergingEmptyBlockProfitable assumes BB is the one to be deleted. - eliminateMostlyEmptyBlock(BB) does not delete BB on one path, it deletes its unique predecessor instead. - adding some test owner as subscribers for the interesting tests modified: test/CodeGen/X86/avx-cmp.ll test/CodeGen/AMDGPU/nested-loop-conditions.ll test/CodeGen/AMDGPU/si-annotate-cf.ll test/CodeGen/X86/hoist-spill.ll test/CodeGen/X86/2006-11-17-IllegalMove.ll 3. lib/Transforms/Scalar/JumpThreading.cpp Not covered in this patch. It is the only use case using the DeferredDominance. I would defer to Brian Rzycki to make this replacement. Reviewers: chandlerc, spatel, davide, brzycki, bkramer, javed.absar Subscribers: qcolombet, sanjoy, nemanjai, nhaehnle, jlebar, tpr, kbarton, RKSimon, wmi, arsenm, llvm-commits Differential Revision: https://reviews.llvm.org/D48202 llvm-svn: 335183
2018-06-21 06:01:04 +08:00
; CHECK: # %bb.0: # %bb1
revert r279960. https://llvm.org/bugs/show_bug.cgi?id=30249 llvm-svn: 280625
2016-09-04 22:03:52 +08:00
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; CHECK-NEXT: je .LBB0_1
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK-NEXT: # %bb.4: # %L_30
autogenerate checks llvm-svn: 278624
2016-08-14 17:34:39 +08:00
; CHECK-NEXT: retq
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; CHECK-NEXT: .LBB0_1: # %bb56
revert r279960. https://llvm.org/bugs/show_bug.cgi?id=30249 llvm-svn: 280625
2016-09-04 22:03:52 +08:00
; CHECK-NEXT: xorl %eax, %eax
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; CHECK-NEXT: jmp .LBB0_2
autogenerate checks llvm-svn: 278624
2016-08-14 17:34:39 +08:00
; CHECK-NEXT: .p2align 4, 0x90
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; CHECK-NEXT: .LBB0_3: # %bb35
; CHECK-NEXT: # in Loop: Header=BB0_2 Depth=1
revert r279960. https://llvm.org/bugs/show_bug.cgi?id=30249 llvm-svn: 280625
2016-09-04 22:03:52 +08:00
; CHECK-NEXT: testb %al, %al
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; CHECK-NEXT: .LBB0_2: # %bb33
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
revert r279960. https://llvm.org/bugs/show_bug.cgi?id=30249 llvm-svn: 280625
2016-09-04 22:03:52 +08:00
; CHECK-NEXT: testb %al, %al
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; CHECK-NEXT: jne .LBB0_2
; CHECK-NEXT: jmp .LBB0_3
AVX-512: Fixed a bug in lowering setcc for MVT::i1 type llvm-svn: 224008
2014-12-11 18:21:12 +08:00
bb1:
br i1 undef, label %L_10, label %L_10
L_10: ; preds = %bb1, %bb1
br i1 undef, label %L_30, label %bb56
bb56: ; preds = %L_10
br label %bb33
bb33: ; preds = %bb51, %bb56
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%r111 = load i64, i64* undef, align 8
AVX-512: Fixed a bug in lowering setcc for MVT::i1 type llvm-svn: 224008
2014-12-11 18:21:12 +08:00
br i1 undef, label %bb51, label %bb35
bb35: ; preds = %bb33
br i1 undef, label %L_19, label %bb37
bb37: ; preds = %bb35
%r128 = and i64 %r111, 576460752303423488
%phitmp = icmp eq i64 %r128, 0
br label %L_19
L_19: ; preds = %bb37, %bb35
%"$V_S25.0" = phi i1 [ %phitmp, %bb37 ], [ true, %bb35 ]
br i1 undef, label %bb51, label %bb42
bb42: ; preds = %L_19
%r136 = select i1 %"$V_S25.0", i32* undef, i32* undef
br label %bb51
bb51: ; preds = %bb42, %L_19, %bb33
br i1 false, label %L_30, label %bb33
L_30: ; preds = %bb51, %L_10
ret void
}
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; The following test generates suboptimal code on AVX-512
; PR 28175
define i64 @func2(i1 zeroext %i, i32 %j) {
; CHECK-LABEL: func2:
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK: # %bb.0: # %entry
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; CHECK-NEXT: testl %esi, %esi
; CHECK-NEXT: je .LBB1_1
[CodeGen] Unify MBB reference format in both MIR and debug output As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
2017-12-05 01:18:51 +08:00
; CHECK-NEXT: # %bb.2: # %if.then
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; CHECK-NEXT: jmp bar # TAILCALL
Generalize MergeBlockIntoPredecessor. Replace uses of MergeBasicBlockIntoOnlyPred. Summary: Two utils methods have essentially the same functionality. This is an attempt to merge them into one. 1. lib/Transforms/Utils/Local.cpp : MergeBasicBlockIntoOnlyPred 2. lib/Transforms/Utils/BasicBlockUtils.cpp : MergeBlockIntoPredecessor Prior to the patch: 1. MergeBasicBlockIntoOnlyPred Updates either DomTree or DeferredDominance Moves all instructions from Pred to BB, deletes Pred Asserts BB has single predecessor If address was taken, replace the block address with constant 1 (?) 2. MergeBlockIntoPredecessor Updates DomTree, LoopInfo and MemoryDependenceResults Moves all instruction from BB to Pred, deletes BB Returns if doesn't have a single predecessor Returns if BB's address was taken After the patch: Method 2. MergeBlockIntoPredecessor is attempting to become the new default: Updates DomTree or DeferredDominance, and LoopInfo and MemoryDependenceResults Moves all instruction from BB to Pred, deletes BB Returns if doesn't have a single predecessor Returns if BB's address was taken Uses of MergeBasicBlockIntoOnlyPred that need to be replaced: 1. lib/Transforms/Scalar/LoopSimplifyCFG.cpp Updated in this patch. No challenges. 2. lib/CodeGen/CodeGenPrepare.cpp Updated in this patch. i. eliminateFallThrough is straightforward, but I added using a temporary array to avoid the iterator invalidation. ii. eliminateMostlyEmptyBlock(s) methods also now use a temporary array for blocks Some interesting aspects: - Since Pred is not deleted (BB is), the entry block does not need updating. - The entry block was being updated with the deleted block in eliminateMostlyEmptyBlock. Added assert to make obvious that BB=SinglePred. - isMergingEmptyBlockProfitable assumes BB is the one to be deleted. - eliminateMostlyEmptyBlock(BB) does not delete BB on one path, it deletes its unique predecessor instead. - adding some test owner as subscribers for the interesting tests modified: test/CodeGen/X86/avx-cmp.ll test/CodeGen/AMDGPU/nested-loop-conditions.ll test/CodeGen/AMDGPU/si-annotate-cf.ll test/CodeGen/X86/hoist-spill.ll test/CodeGen/X86/2006-11-17-IllegalMove.ll 3. lib/Transforms/Scalar/JumpThreading.cpp Not covered in this patch. It is the only use case using the DeferredDominance. I would defer to Brian Rzycki to make this replacement. Reviewers: chandlerc, spatel, davide, brzycki, bkramer, javed.absar Subscribers: qcolombet, sanjoy, nemanjai, nhaehnle, jlebar, tpr, kbarton, RKSimon, wmi, arsenm, llvm-commits Differential Revision: https://reviews.llvm.org/D48202 llvm-svn: 335183
2018-06-21 06:01:04 +08:00
; CHECK-NEXT: .LBB1_1: # %if.end
[X86][AVX512] Make i1 illegal in the CodeGen This patch defines the i1 type as illegal in the X86 backend for AVX512. For DAG operations on <N x i1> types (build vector, extract vector element, ...) i8 is used, and should be truncated/extended. This should produce better scalar code for i1 types since GPRs will be used instead of mask registers. Differential Revision: https://reviews.llvm.org/D32273 llvm-svn: 303421
2017-05-19 20:35:15 +08:00
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orq $-2, %rax
AVX-512: Added a test case that should be optimized in the future. NFC. llvm-svn: 281196
2016-09-12 14:26:03 +08:00
; CHECK-NEXT: retq
entry:
%tobool = icmp eq i32 %j, 0
br i1 %tobool, label %if.end, label %if.then
if.then: ; preds = %entry
%call = tail call i64 @bar()
br label %return
if.end: ; preds = %entry
%conv = zext i1 %i to i64
%or = or i64 %conv, -2
br label %return
return: ; preds = %if.end, %if.then
%or.sink = phi i64 [ %or, %if.end ], [ %call, %if.then ]
ret i64 %or.sink
}
declare i64 @bar()