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llvm-project/llvm/test/CodeGen/Mips/micromips-gp-rc.ll

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[mips][microMIPS] Change register class for GP register Differential Revision: http://reviews.llvm.org/D7934 llvm-svn: 230760
2015-02-27 23:03:50 +08:00
; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
; RUN: -relocation-model=pic -O3 < %s | FileCheck %s
@g = external global i32
; Function Attrs: noreturn nounwind
define void @foo() #0 {
entry:
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%0 = load i32, i32* @g, align 4
[mips][microMIPS] Change register class for GP register Differential Revision: http://reviews.llvm.org/D7934 llvm-svn: 230760
2015-02-27 23:03:50 +08:00
tail call void @exit(i32 signext %0)
unreachable
}
; Function Attrs: noreturn
declare void @exit(i32 signext)
evert "[mips] Fix test mips64fpldst.ll with machine verifier enabled" This reverts commit r301394. It broke some internal buildbots, reverting while the issue is being investigated. llvm-svn: 304896
2017-06-07 19:21:37 +08:00
; CHECK: move $gp, ${{[0-9]+}}
[mips][microMIPS] Change register class for GP register Differential Revision: http://reviews.llvm.org/D7934 llvm-svn: 230760
2015-02-27 23:03:50 +08:00