2010-01-05 14:05:07 +08:00
|
|
|
//===- InstCombineSelect.cpp ----------------------------------------------===//
|
2010-01-05 14:03:12 +08:00
|
|
|
//
|
2019-01-19 16:50:56 +08:00
|
|
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
|
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
2010-01-05 14:03:12 +08:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
//
|
2010-01-05 14:05:07 +08:00
|
|
|
// This file implements the visitSelect function.
|
2010-01-05 14:03:12 +08:00
|
|
|
//
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
|
2015-01-22 13:25:13 +08:00
|
|
|
#include "InstCombineInternal.h"
|
2017-10-25 05:24:53 +08:00
|
|
|
#include "llvm/ADT/APInt.h"
|
|
|
|
#include "llvm/ADT/Optional.h"
|
|
|
|
#include "llvm/ADT/STLExtras.h"
|
|
|
|
#include "llvm/ADT/SmallVector.h"
|
|
|
|
#include "llvm/Analysis/AssumptionCache.h"
|
2017-08-17 05:52:07 +08:00
|
|
|
#include "llvm/Analysis/CmpInstAnalysis.h"
|
2010-04-20 13:32:14 +08:00
|
|
|
#include "llvm/Analysis/InstructionSimplify.h"
|
2015-05-11 22:42:20 +08:00
|
|
|
#include "llvm/Analysis/ValueTracking.h"
|
2017-10-25 05:24:53 +08:00
|
|
|
#include "llvm/IR/BasicBlock.h"
|
|
|
|
#include "llvm/IR/Constant.h"
|
|
|
|
#include "llvm/IR/Constants.h"
|
|
|
|
#include "llvm/IR/DerivedTypes.h"
|
|
|
|
#include "llvm/IR/IRBuilder.h"
|
|
|
|
#include "llvm/IR/InstrTypes.h"
|
|
|
|
#include "llvm/IR/Instruction.h"
|
|
|
|
#include "llvm/IR/Instructions.h"
|
|
|
|
#include "llvm/IR/IntrinsicInst.h"
|
|
|
|
#include "llvm/IR/Intrinsics.h"
|
|
|
|
#include "llvm/IR/Operator.h"
|
2014-03-04 19:08:18 +08:00
|
|
|
#include "llvm/IR/PatternMatch.h"
|
2017-10-25 05:24:53 +08:00
|
|
|
#include "llvm/IR/Type.h"
|
|
|
|
#include "llvm/IR/User.h"
|
|
|
|
#include "llvm/IR/Value.h"
|
|
|
|
#include "llvm/Support/Casting.h"
|
|
|
|
#include "llvm/Support/ErrorHandling.h"
|
2017-04-27 00:39:58 +08:00
|
|
|
#include "llvm/Support/KnownBits.h"
|
2017-10-25 05:24:53 +08:00
|
|
|
#include "llvm/Transforms/InstCombine/InstCombineWorklist.h"
|
2020-06-03 21:56:40 +08:00
|
|
|
#include "llvm/Transforms/InstCombine/InstCombiner.h"
|
2017-10-25 05:24:53 +08:00
|
|
|
#include <cassert>
|
|
|
|
#include <utility>
|
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
using namespace llvm;
|
|
|
|
using namespace PatternMatch;
|
|
|
|
|
2014-04-22 10:55:47 +08:00
|
|
|
#define DEBUG_TYPE "instcombine"
|
|
|
|
|
2018-03-07 00:57:55 +08:00
|
|
|
static Value *createMinMax(InstCombiner::BuilderTy &Builder,
|
|
|
|
SelectPatternFlavor SPF, Value *A, Value *B) {
|
|
|
|
CmpInst::Predicate Pred = getMinMaxPred(SPF);
|
|
|
|
assert(CmpInst::isIntPredicate(Pred) && "Expected integer predicate");
|
2017-07-08 07:16:26 +08:00
|
|
|
return Builder.CreateSelect(Builder.CreateICmp(Pred, A, B), A, B);
|
2015-04-30 12:56:04 +08:00
|
|
|
}
|
|
|
|
|
2018-08-11 04:30:35 +08:00
|
|
|
/// Replace a select operand based on an equality comparison with the identity
|
|
|
|
/// constant of a binop.
|
2018-08-28 07:01:10 +08:00
|
|
|
static Instruction *foldSelectBinOpIdentity(SelectInst &Sel,
|
2020-02-04 04:17:36 +08:00
|
|
|
const TargetLibraryInfo &TLI,
|
2020-06-03 21:56:40 +08:00
|
|
|
InstCombinerImpl &IC) {
|
2018-08-11 04:30:35 +08:00
|
|
|
// The select condition must be an equality compare with a constant operand.
|
|
|
|
Value *X;
|
2018-07-31 04:38:53 +08:00
|
|
|
Constant *C;
|
|
|
|
CmpInst::Predicate Pred;
|
[InstCombine] Fold Select with binary op - FP opcodes
Summary:
Follow up for https://reviews.llvm.org/rL339520 and https://reviews.llvm.org/rL338300
Alive:
```
%A = fcmp oeq float %x, 0.0
%B = fadd nsz float %x, %z
%C = select i1 %A, float %B, float %y
=>
%C = select i1 %A, float %z, float %y
----------
%A = fcmp oeq float %x, 0.0
%B = fadd nsz float %x, %z
%C = select %A, float %B, float %y
=>
%C = select %A, float %z, float %y
Done: 1
Optimization is correct
%A = fcmp une float %x, -0.0
%B = fadd nsz float %x, %z
%C = select i1 %A, float %y, float %B
=>
%C = select i1 %A, float %y, float %z
----------
%A = fcmp une float %x, -0.0
%B = fadd nsz float %x, %z
%C = select %A, float %y, float %B
=>
%C = select %A, float %y, float %z
Done: 1
Optimization is correct
```
Reviewers: spatel, lebedev.ri
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D50714
llvm-svn: 340538
2018-08-23 23:22:15 +08:00
|
|
|
if (!match(Sel.getCondition(), m_Cmp(Pred, m_Value(X), m_Constant(C))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
bool IsEq;
|
|
|
|
if (ICmpInst::isEquality(Pred))
|
|
|
|
IsEq = Pred == ICmpInst::ICMP_EQ;
|
|
|
|
else if (Pred == FCmpInst::FCMP_OEQ)
|
|
|
|
IsEq = true;
|
|
|
|
else if (Pred == FCmpInst::FCMP_UNE)
|
|
|
|
IsEq = false;
|
|
|
|
else
|
2018-07-31 04:38:53 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2018-11-06 00:50:44 +08:00
|
|
|
// A select operand must be a binop.
|
2018-08-11 04:30:35 +08:00
|
|
|
BinaryOperator *BO;
|
2018-11-06 00:50:44 +08:00
|
|
|
if (!match(Sel.getOperand(IsEq ? 1 : 2), m_BinOp(BO)))
|
2018-08-11 04:30:35 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2018-11-06 00:50:44 +08:00
|
|
|
// The compare constant must be the identity constant for that binop.
|
|
|
|
// If this a floating-point compare with 0.0, any zero constant will do.
|
|
|
|
Type *Ty = BO->getType();
|
|
|
|
Constant *IdC = ConstantExpr::getBinOpIdentity(BO->getOpcode(), Ty, true);
|
|
|
|
if (IdC != C) {
|
|
|
|
if (!IdC || !CmpInst::isFPPredicate(Pred))
|
|
|
|
return nullptr;
|
|
|
|
if (!match(IdC, m_AnyZeroFP()) || !match(C, m_AnyZeroFP()))
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2018-08-11 04:30:35 +08:00
|
|
|
// Last, match the compare variable operand with a binop operand.
|
|
|
|
Value *Y;
|
2018-08-13 01:30:07 +08:00
|
|
|
if (!BO->isCommutative() && !match(BO, m_BinOp(m_Value(Y), m_Specific(X))))
|
|
|
|
return nullptr;
|
2018-08-11 04:30:35 +08:00
|
|
|
if (!match(BO, m_c_BinOp(m_Value(Y), m_Specific(X))))
|
|
|
|
return nullptr;
|
|
|
|
|
[InstCombine] Fold Select with binary op - FP opcodes
Summary:
Follow up for https://reviews.llvm.org/rL339520 and https://reviews.llvm.org/rL338300
Alive:
```
%A = fcmp oeq float %x, 0.0
%B = fadd nsz float %x, %z
%C = select i1 %A, float %B, float %y
=>
%C = select i1 %A, float %z, float %y
----------
%A = fcmp oeq float %x, 0.0
%B = fadd nsz float %x, %z
%C = select %A, float %B, float %y
=>
%C = select %A, float %z, float %y
Done: 1
Optimization is correct
%A = fcmp une float %x, -0.0
%B = fadd nsz float %x, %z
%C = select i1 %A, float %y, float %B
=>
%C = select i1 %A, float %y, float %z
----------
%A = fcmp une float %x, -0.0
%B = fadd nsz float %x, %z
%C = select %A, float %y, float %B
=>
%C = select %A, float %y, float %z
Done: 1
Optimization is correct
```
Reviewers: spatel, lebedev.ri
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D50714
llvm-svn: 340538
2018-08-23 23:22:15 +08:00
|
|
|
// +0.0 compares equal to -0.0, and so it does not behave as required for this
|
|
|
|
// transform. Bail out if we can not exclude that possibility.
|
|
|
|
if (isa<FPMathOperator>(BO))
|
|
|
|
if (!BO->hasNoSignedZeros() && !CannotBeNegativeZero(Y, &TLI))
|
|
|
|
return nullptr;
|
|
|
|
|
2018-08-11 04:30:35 +08:00
|
|
|
// BO = binop Y, X
|
|
|
|
// S = { select (cmp eq X, C), BO, ? } or { select (cmp ne X, C), ?, BO }
|
|
|
|
// =>
|
|
|
|
// S = { select (cmp eq X, C), Y, ? } or { select (cmp ne X, C), ?, Y }
|
2020-02-04 04:17:36 +08:00
|
|
|
return IC.replaceOperand(Sel, IsEq ? 1 : 2, Y);
|
2018-07-31 04:38:53 +08:00
|
|
|
}
|
|
|
|
|
2017-09-05 13:26:37 +08:00
|
|
|
/// This folds:
|
2018-04-26 00:34:01 +08:00
|
|
|
/// select (icmp eq (and X, C1)), TC, FC
|
|
|
|
/// iff C1 is a power 2 and the difference between TC and FC is a power-of-2.
|
2017-09-05 13:26:37 +08:00
|
|
|
/// To something like:
|
2018-04-26 00:34:01 +08:00
|
|
|
/// (shr (and (X, C1)), (log2(C1) - log2(TC-FC))) + FC
|
2017-09-05 13:26:37 +08:00
|
|
|
/// Or:
|
2018-04-26 00:34:01 +08:00
|
|
|
/// (shl (and (X, C1)), (log2(TC-FC) - log2(C1))) + FC
|
|
|
|
/// With some variations depending if FC is larger than TC, or the shift
|
2017-09-05 13:26:37 +08:00
|
|
|
/// isn't needed, or the bit widths don't match.
|
2018-04-26 00:34:01 +08:00
|
|
|
static Value *foldSelectICmpAnd(SelectInst &Sel, ICmpInst *Cmp,
|
2017-09-05 13:26:37 +08:00
|
|
|
InstCombiner::BuilderTy &Builder) {
|
2018-04-26 00:34:01 +08:00
|
|
|
const APInt *SelTC, *SelFC;
|
|
|
|
if (!match(Sel.getTrueValue(), m_APInt(SelTC)) ||
|
|
|
|
!match(Sel.getFalseValue(), m_APInt(SelFC)))
|
|
|
|
return nullptr;
|
2017-09-05 13:26:37 +08:00
|
|
|
|
|
|
|
// If this is a vector select, we need a vector compare.
|
2018-04-26 00:34:01 +08:00
|
|
|
Type *SelType = Sel.getType();
|
|
|
|
if (SelType->isVectorTy() != Cmp->getType()->isVectorTy())
|
2017-09-05 13:26:37 +08:00
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Value *V;
|
|
|
|
APInt AndMask;
|
|
|
|
bool CreateAnd = false;
|
2018-04-26 00:34:01 +08:00
|
|
|
ICmpInst::Predicate Pred = Cmp->getPredicate();
|
2017-09-05 13:26:37 +08:00
|
|
|
if (ICmpInst::isEquality(Pred)) {
|
2018-04-26 00:34:01 +08:00
|
|
|
if (!match(Cmp->getOperand(1), m_Zero()))
|
2017-09-05 13:26:37 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2018-04-26 00:34:01 +08:00
|
|
|
V = Cmp->getOperand(0);
|
2017-09-05 13:26:37 +08:00
|
|
|
const APInt *AndRHS;
|
|
|
|
if (!match(V, m_And(m_Value(), m_Power2(AndRHS))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
AndMask = *AndRHS;
|
2018-04-26 00:34:01 +08:00
|
|
|
} else if (decomposeBitTestICmp(Cmp->getOperand(0), Cmp->getOperand(1),
|
2017-09-05 13:26:37 +08:00
|
|
|
Pred, V, AndMask)) {
|
|
|
|
assert(ICmpInst::isEquality(Pred) && "Not equality test?");
|
|
|
|
if (!AndMask.isPowerOf2())
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
CreateAnd = true;
|
|
|
|
} else {
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
[InstCombine] refine select-of-constants to bitwise ops
Add logic for the special case when a cmp+select can clearly be
reduced to just a bitwise logic instruction, and remove an
over-reaching chunk of general purpose bit magic. The primary goal
is to remove cases where we are not improving the IR instruction
count when doing these select transforms, and in all cases here that
is true.
In the motivating 3-way compare tests, there are further improvements
because we can combine/propagate select values (not sure if that
belongs in instcombine, but it's there for now).
DAGCombiner has folds to turn some of these selects into bit magic,
so there should be no difference in the end result in those cases.
Not all constant combinations are handled there yet, however, so it
is possible that some targets will see more cmov/csel codegen with
this change in IR canonicalization.
Ideally, we'll go further to *not* turn selects into multiple
logic/math ops in instcombine, and we'll canonicalize to selects.
But we should make sure that this step does not result in regressions
first (and if it does, we should fix those in the backend).
The general direction for this change was discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2016-September/105373.html
http://lists.llvm.org/pipermail/llvm-dev/2017-July/114885.html
Alive proofs for the new bit magic:
https://rise4fun.com/Alive/XG7
Differential Revision: https://reviews.llvm.org/D46086
llvm-svn: 331486
2018-05-04 05:58:44 +08:00
|
|
|
// In general, when both constants are non-zero, we would need an offset to
|
|
|
|
// replace the select. This would require more instructions than we started
|
|
|
|
// with. But there's one special-case that we handle here because it can
|
|
|
|
// simplify/reduce the instructions.
|
2018-04-26 00:34:01 +08:00
|
|
|
APInt TC = *SelTC;
|
|
|
|
APInt FC = *SelFC;
|
|
|
|
if (!TC.isNullValue() && !FC.isNullValue()) {
|
[InstCombine] refine select-of-constants to bitwise ops
Add logic for the special case when a cmp+select can clearly be
reduced to just a bitwise logic instruction, and remove an
over-reaching chunk of general purpose bit magic. The primary goal
is to remove cases where we are not improving the IR instruction
count when doing these select transforms, and in all cases here that
is true.
In the motivating 3-way compare tests, there are further improvements
because we can combine/propagate select values (not sure if that
belongs in instcombine, but it's there for now).
DAGCombiner has folds to turn some of these selects into bit magic,
so there should be no difference in the end result in those cases.
Not all constant combinations are handled there yet, however, so it
is possible that some targets will see more cmov/csel codegen with
this change in IR canonicalization.
Ideally, we'll go further to *not* turn selects into multiple
logic/math ops in instcombine, and we'll canonicalize to selects.
But we should make sure that this step does not result in regressions
first (and if it does, we should fix those in the backend).
The general direction for this change was discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2016-September/105373.html
http://lists.llvm.org/pipermail/llvm-dev/2017-July/114885.html
Alive proofs for the new bit magic:
https://rise4fun.com/Alive/XG7
Differential Revision: https://reviews.llvm.org/D46086
llvm-svn: 331486
2018-05-04 05:58:44 +08:00
|
|
|
// If the select constants differ by exactly one bit and that's the same
|
|
|
|
// bit that is masked and checked by the select condition, the select can
|
|
|
|
// be replaced by bitwise logic to set/clear one bit of the constant result.
|
|
|
|
if (TC.getBitWidth() != AndMask.getBitWidth() || (TC ^ FC) != AndMask)
|
2017-09-05 13:26:37 +08:00
|
|
|
return nullptr;
|
[InstCombine] refine select-of-constants to bitwise ops
Add logic for the special case when a cmp+select can clearly be
reduced to just a bitwise logic instruction, and remove an
over-reaching chunk of general purpose bit magic. The primary goal
is to remove cases where we are not improving the IR instruction
count when doing these select transforms, and in all cases here that
is true.
In the motivating 3-way compare tests, there are further improvements
because we can combine/propagate select values (not sure if that
belongs in instcombine, but it's there for now).
DAGCombiner has folds to turn some of these selects into bit magic,
so there should be no difference in the end result in those cases.
Not all constant combinations are handled there yet, however, so it
is possible that some targets will see more cmov/csel codegen with
this change in IR canonicalization.
Ideally, we'll go further to *not* turn selects into multiple
logic/math ops in instcombine, and we'll canonicalize to selects.
But we should make sure that this step does not result in regressions
first (and if it does, we should fix those in the backend).
The general direction for this change was discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2016-September/105373.html
http://lists.llvm.org/pipermail/llvm-dev/2017-July/114885.html
Alive proofs for the new bit magic:
https://rise4fun.com/Alive/XG7
Differential Revision: https://reviews.llvm.org/D46086
llvm-svn: 331486
2018-05-04 05:58:44 +08:00
|
|
|
if (CreateAnd) {
|
|
|
|
// If we have to create an 'and', then we must kill the cmp to not
|
|
|
|
// increase the instruction count.
|
|
|
|
if (!Cmp->hasOneUse())
|
|
|
|
return nullptr;
|
|
|
|
V = Builder.CreateAnd(V, ConstantInt::get(SelType, AndMask));
|
|
|
|
}
|
|
|
|
bool ExtraBitInTC = TC.ugt(FC);
|
|
|
|
if (Pred == ICmpInst::ICMP_EQ) {
|
|
|
|
// If the masked bit in V is clear, clear or set the bit in the result:
|
|
|
|
// (V & AndMaskC) == 0 ? TC : FC --> (V & AndMaskC) ^ TC
|
|
|
|
// (V & AndMaskC) == 0 ? TC : FC --> (V & AndMaskC) | TC
|
|
|
|
Constant *C = ConstantInt::get(SelType, TC);
|
|
|
|
return ExtraBitInTC ? Builder.CreateXor(V, C) : Builder.CreateOr(V, C);
|
|
|
|
}
|
|
|
|
if (Pred == ICmpInst::ICMP_NE) {
|
|
|
|
// If the masked bit in V is set, set or clear the bit in the result:
|
|
|
|
// (V & AndMaskC) != 0 ? TC : FC --> (V & AndMaskC) | FC
|
|
|
|
// (V & AndMaskC) != 0 ? TC : FC --> (V & AndMaskC) ^ FC
|
|
|
|
Constant *C = ConstantInt::get(SelType, FC);
|
|
|
|
return ExtraBitInTC ? Builder.CreateOr(V, C) : Builder.CreateXor(V, C);
|
|
|
|
}
|
|
|
|
llvm_unreachable("Only expecting equality predicates");
|
2017-09-05 13:26:37 +08:00
|
|
|
}
|
|
|
|
|
2018-04-26 00:34:01 +08:00
|
|
|
// Make sure one of the select arms is a power-of-2.
|
|
|
|
if (!TC.isPowerOf2() && !FC.isPowerOf2())
|
2017-09-05 13:26:37 +08:00
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Determine which shift is needed to transform result of the 'and' into the
|
|
|
|
// desired result.
|
2018-04-26 00:34:01 +08:00
|
|
|
const APInt &ValC = !TC.isNullValue() ? TC : FC;
|
2017-09-05 13:26:37 +08:00
|
|
|
unsigned ValZeros = ValC.logBase2();
|
|
|
|
unsigned AndZeros = AndMask.logBase2();
|
|
|
|
|
2018-04-26 00:34:01 +08:00
|
|
|
// Insert the 'and' instruction on the input to the truncate.
|
|
|
|
if (CreateAnd)
|
2017-09-05 13:26:37 +08:00
|
|
|
V = Builder.CreateAnd(V, ConstantInt::get(V->getType(), AndMask));
|
|
|
|
|
2018-04-26 00:34:01 +08:00
|
|
|
// If types don't match, we can still convert the select by introducing a zext
|
2017-09-05 13:26:37 +08:00
|
|
|
// or a trunc of the 'and'.
|
|
|
|
if (ValZeros > AndZeros) {
|
|
|
|
V = Builder.CreateZExtOrTrunc(V, SelType);
|
|
|
|
V = Builder.CreateShl(V, ValZeros - AndZeros);
|
|
|
|
} else if (ValZeros < AndZeros) {
|
|
|
|
V = Builder.CreateLShr(V, AndZeros - ValZeros);
|
|
|
|
V = Builder.CreateZExtOrTrunc(V, SelType);
|
2018-04-26 00:34:01 +08:00
|
|
|
} else {
|
2017-09-05 13:26:37 +08:00
|
|
|
V = Builder.CreateZExtOrTrunc(V, SelType);
|
2018-04-26 00:34:01 +08:00
|
|
|
}
|
2017-09-05 13:26:37 +08:00
|
|
|
|
|
|
|
// Okay, now we know that everything is set up, we just don't know whether we
|
|
|
|
// have a icmp_ne or icmp_eq and whether the true or false val is the zero.
|
2018-04-26 00:34:01 +08:00
|
|
|
bool ShouldNotVal = !TC.isNullValue();
|
2017-09-05 13:26:37 +08:00
|
|
|
ShouldNotVal ^= Pred == ICmpInst::ICMP_NE;
|
|
|
|
if (ShouldNotVal)
|
|
|
|
V = Builder.CreateXor(V, ValC);
|
|
|
|
|
|
|
|
return V;
|
|
|
|
}
|
|
|
|
|
2015-09-09 23:24:36 +08:00
|
|
|
/// We want to turn code that looks like this:
|
2010-01-05 14:03:12 +08:00
|
|
|
/// %C = or %A, %B
|
|
|
|
/// %D = select %cond, %C, %A
|
|
|
|
/// into:
|
|
|
|
/// %C = select %cond, %B, 0
|
|
|
|
/// %D = or %A, %C
|
|
|
|
///
|
|
|
|
/// Assuming that the specified instruction is an operand to the select, return
|
|
|
|
/// a bitmask indicating which operands of this instruction are foldable if they
|
|
|
|
/// equal the other incoming value of the select.
|
2017-08-08 14:19:24 +08:00
|
|
|
static unsigned getSelectFoldableOperands(BinaryOperator *I) {
|
2010-01-05 14:03:12 +08:00
|
|
|
switch (I->getOpcode()) {
|
|
|
|
case Instruction::Add:
|
|
|
|
case Instruction::Mul:
|
|
|
|
case Instruction::And:
|
|
|
|
case Instruction::Or:
|
|
|
|
case Instruction::Xor:
|
|
|
|
return 3; // Can fold through either operand.
|
|
|
|
case Instruction::Sub: // Can only fold on the amount subtracted.
|
|
|
|
case Instruction::Shl: // Can only fold on the shift amount.
|
|
|
|
case Instruction::LShr:
|
|
|
|
case Instruction::AShr:
|
|
|
|
return 1;
|
|
|
|
default:
|
|
|
|
return 0; // Cannot fold
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-09-09 23:24:36 +08:00
|
|
|
/// For the same transformation as the previous function, return the identity
|
|
|
|
/// constant that goes into the select.
|
2017-09-05 13:26:36 +08:00
|
|
|
static APInt getSelectFoldableConstant(BinaryOperator *I) {
|
2010-01-05 14:03:12 +08:00
|
|
|
switch (I->getOpcode()) {
|
|
|
|
default: llvm_unreachable("This cannot happen!");
|
|
|
|
case Instruction::Add:
|
|
|
|
case Instruction::Sub:
|
|
|
|
case Instruction::Or:
|
|
|
|
case Instruction::Xor:
|
|
|
|
case Instruction::Shl:
|
|
|
|
case Instruction::LShr:
|
|
|
|
case Instruction::AShr:
|
2017-09-05 13:26:36 +08:00
|
|
|
return APInt::getNullValue(I->getType()->getScalarSizeInBits());
|
2010-01-05 14:03:12 +08:00
|
|
|
case Instruction::And:
|
2017-09-05 13:26:36 +08:00
|
|
|
return APInt::getAllOnesValue(I->getType()->getScalarSizeInBits());
|
2010-01-05 14:03:12 +08:00
|
|
|
case Instruction::Mul:
|
2017-09-05 13:26:36 +08:00
|
|
|
return APInt(I->getType()->getScalarSizeInBits(), 1);
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
[InstCombine] allow more than one use for vector bitcast folding with selects
The motivating example for this transform is similar to D20774 where bitcasts interfere
with a single cmp/select sequence, but in this case we have 2 uses of each bitcast to
produce min and max ops:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%bc1 = bitcast <4 x float> %a to <4 x i32>
%bc2 = bitcast <4 x float> %b to <4 x i32>
%sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2
%sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1
%bc3 = bitcast <4 x float>* %ptr1 to <4 x i32>*
store <4 x i32> %sel1, <4 x i32>* %bc3
%bc4 = bitcast <4 x float>* %ptr2 to <4 x i32>*
store <4 x i32> %sel2, <4 x i32>* %bc4
ret void
}
With this patch, we move the selects up to use the input args which allows getting rid of
all of the bitcasts:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%sel1.v = select <4 x i1> %cmp, <4 x float> %a, <4 x float> %b
%sel2.v = select <4 x i1> %cmp, <4 x float> %b, <4 x float> %a
store <4 x float> %sel1.v, <4 x float>* %ptr1, align 16
store <4 x float> %sel2.v, <4 x float>* %ptr2, align 16
ret void
}
The asm for x86 SSE then improves from:
movaps %xmm0, %xmm2
cmpltps %xmm1, %xmm2
movaps %xmm2, %xmm3
andnps %xmm1, %xmm3
movaps %xmm2, %xmm4
andnps %xmm0, %xmm4
andps %xmm2, %xmm0
orps %xmm3, %xmm0
andps %xmm1, %xmm2
orps %xmm4, %xmm2
movaps %xmm0, (%rdi)
movaps %xmm2, (%rsi)
To:
movaps %xmm0, %xmm2
minps %xmm1, %xmm2
maxps %xmm0, %xmm1
movaps %xmm2, (%rdi)
movaps %xmm1, (%rsi)
The TODO comments show that we're limiting this transform only to vectors and only to bitcasts
because we need to improve other transforms or risk creating worse codegen.
Differential Revision: http://reviews.llvm.org/D21190
llvm-svn: 273011
2016-06-18 00:46:50 +08:00
|
|
|
/// We have (select c, TI, FI), and we know that TI and FI have the same opcode.
|
2020-06-03 21:56:40 +08:00
|
|
|
Instruction *InstCombinerImpl::foldSelectOpOp(SelectInst &SI, Instruction *TI,
|
|
|
|
Instruction *FI) {
|
2017-03-17 04:42:45 +08:00
|
|
|
// Don't break up min/max patterns. The hasOneUse checks below prevent that
|
|
|
|
// for most cases, but vector min/max with bitcasts can be transformed. If the
|
|
|
|
// one-use restrictions are eased for other patterns, we still don't want to
|
|
|
|
// obfuscate min/max.
|
|
|
|
if ((match(&SI, m_SMin(m_Value(), m_Value())) ||
|
|
|
|
match(&SI, m_SMax(m_Value(), m_Value())) ||
|
|
|
|
match(&SI, m_UMin(m_Value(), m_Value())) ||
|
|
|
|
match(&SI, m_UMax(m_Value(), m_Value()))))
|
|
|
|
return nullptr;
|
|
|
|
|
2016-06-09 04:31:52 +08:00
|
|
|
// If this is a cast from the same type, merge.
|
2019-05-07 01:39:18 +08:00
|
|
|
Value *Cond = SI.getCondition();
|
|
|
|
Type *CondTy = Cond->getType();
|
2016-06-09 04:31:52 +08:00
|
|
|
if (TI->getNumOperands() == 1 && TI->isCast()) {
|
|
|
|
Type *FIOpndTy = FI->getOperand(0)->getType();
|
|
|
|
if (TI->getOperand(0)->getType() != FIOpndTy)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// The select condition may be a vector. We may only change the operand
|
|
|
|
// type if the vector width remains the same (and matches the condition).
|
2020-04-09 01:42:22 +08:00
|
|
|
if (auto *CondVTy = dyn_cast<VectorType>(CondTy)) {
|
[InstCombine] allow more than one use for vector bitcast folding with selects
The motivating example for this transform is similar to D20774 where bitcasts interfere
with a single cmp/select sequence, but in this case we have 2 uses of each bitcast to
produce min and max ops:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%bc1 = bitcast <4 x float> %a to <4 x i32>
%bc2 = bitcast <4 x float> %b to <4 x i32>
%sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2
%sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1
%bc3 = bitcast <4 x float>* %ptr1 to <4 x i32>*
store <4 x i32> %sel1, <4 x i32>* %bc3
%bc4 = bitcast <4 x float>* %ptr2 to <4 x i32>*
store <4 x i32> %sel2, <4 x i32>* %bc4
ret void
}
With this patch, we move the selects up to use the input args which allows getting rid of
all of the bitcasts:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%sel1.v = select <4 x i1> %cmp, <4 x float> %a, <4 x float> %b
%sel2.v = select <4 x i1> %cmp, <4 x float> %b, <4 x float> %a
store <4 x float> %sel1.v, <4 x float>* %ptr1, align 16
store <4 x float> %sel2.v, <4 x float>* %ptr2, align 16
ret void
}
The asm for x86 SSE then improves from:
movaps %xmm0, %xmm2
cmpltps %xmm1, %xmm2
movaps %xmm2, %xmm3
andnps %xmm1, %xmm3
movaps %xmm2, %xmm4
andnps %xmm0, %xmm4
andps %xmm2, %xmm0
orps %xmm3, %xmm0
andps %xmm1, %xmm2
orps %xmm4, %xmm2
movaps %xmm0, (%rdi)
movaps %xmm2, (%rsi)
To:
movaps %xmm0, %xmm2
minps %xmm1, %xmm2
maxps %xmm0, %xmm1
movaps %xmm2, (%rdi)
movaps %xmm1, (%rsi)
The TODO comments show that we're limiting this transform only to vectors and only to bitcasts
because we need to improve other transforms or risk creating worse codegen.
Differential Revision: http://reviews.llvm.org/D21190
llvm-svn: 273011
2016-06-18 00:46:50 +08:00
|
|
|
if (!FIOpndTy->isVectorTy())
|
|
|
|
return nullptr;
|
2020-09-01 03:17:51 +08:00
|
|
|
if (cast<FixedVectorType>(CondVTy)->getNumElements() !=
|
|
|
|
cast<FixedVectorType>(FIOpndTy)->getNumElements())
|
[InstCombine] allow more than one use for vector bitcast folding with selects
The motivating example for this transform is similar to D20774 where bitcasts interfere
with a single cmp/select sequence, but in this case we have 2 uses of each bitcast to
produce min and max ops:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%bc1 = bitcast <4 x float> %a to <4 x i32>
%bc2 = bitcast <4 x float> %b to <4 x i32>
%sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2
%sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1
%bc3 = bitcast <4 x float>* %ptr1 to <4 x i32>*
store <4 x i32> %sel1, <4 x i32>* %bc3
%bc4 = bitcast <4 x float>* %ptr2 to <4 x i32>*
store <4 x i32> %sel2, <4 x i32>* %bc4
ret void
}
With this patch, we move the selects up to use the input args which allows getting rid of
all of the bitcasts:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%sel1.v = select <4 x i1> %cmp, <4 x float> %a, <4 x float> %b
%sel2.v = select <4 x i1> %cmp, <4 x float> %b, <4 x float> %a
store <4 x float> %sel1.v, <4 x float>* %ptr1, align 16
store <4 x float> %sel2.v, <4 x float>* %ptr2, align 16
ret void
}
The asm for x86 SSE then improves from:
movaps %xmm0, %xmm2
cmpltps %xmm1, %xmm2
movaps %xmm2, %xmm3
andnps %xmm1, %xmm3
movaps %xmm2, %xmm4
andnps %xmm0, %xmm4
andps %xmm2, %xmm0
orps %xmm3, %xmm0
andps %xmm1, %xmm2
orps %xmm4, %xmm2
movaps %xmm0, (%rdi)
movaps %xmm2, (%rsi)
To:
movaps %xmm0, %xmm2
minps %xmm1, %xmm2
maxps %xmm0, %xmm1
movaps %xmm2, (%rdi)
movaps %xmm1, (%rsi)
The TODO comments show that we're limiting this transform only to vectors and only to bitcasts
because we need to improve other transforms or risk creating worse codegen.
Differential Revision: http://reviews.llvm.org/D21190
llvm-svn: 273011
2016-06-18 00:46:50 +08:00
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// TODO: If the backend knew how to deal with casts better, we could
|
|
|
|
// remove this limitation. For now, there's too much potential to create
|
|
|
|
// worse codegen by promoting the select ahead of size-altering casts
|
|
|
|
// (PR28160).
|
|
|
|
//
|
|
|
|
// Note that ValueTracking's matchSelectPattern() looks through casts
|
|
|
|
// without checking 'hasOneUse' when it matches min/max patterns, so this
|
|
|
|
// transform may end up happening anyway.
|
|
|
|
if (TI->getOpcode() != Instruction::BitCast &&
|
|
|
|
(!TI->hasOneUse() || !FI->hasOneUse()))
|
|
|
|
return nullptr;
|
|
|
|
} else if (!TI->hasOneUse() || !FI->hasOneUse()) {
|
|
|
|
// TODO: The one-use restrictions for a scalar select could be eased if
|
|
|
|
// the fold of a select in visitLoadInst() was enhanced to match a pattern
|
|
|
|
// that includes a cast.
|
2016-06-09 04:31:52 +08:00
|
|
|
return nullptr;
|
[InstCombine] allow more than one use for vector bitcast folding with selects
The motivating example for this transform is similar to D20774 where bitcasts interfere
with a single cmp/select sequence, but in this case we have 2 uses of each bitcast to
produce min and max ops:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%bc1 = bitcast <4 x float> %a to <4 x i32>
%bc2 = bitcast <4 x float> %b to <4 x i32>
%sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2
%sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1
%bc3 = bitcast <4 x float>* %ptr1 to <4 x i32>*
store <4 x i32> %sel1, <4 x i32>* %bc3
%bc4 = bitcast <4 x float>* %ptr2 to <4 x i32>*
store <4 x i32> %sel2, <4 x i32>* %bc4
ret void
}
With this patch, we move the selects up to use the input args which allows getting rid of
all of the bitcasts:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%sel1.v = select <4 x i1> %cmp, <4 x float> %a, <4 x float> %b
%sel2.v = select <4 x i1> %cmp, <4 x float> %b, <4 x float> %a
store <4 x float> %sel1.v, <4 x float>* %ptr1, align 16
store <4 x float> %sel2.v, <4 x float>* %ptr2, align 16
ret void
}
The asm for x86 SSE then improves from:
movaps %xmm0, %xmm2
cmpltps %xmm1, %xmm2
movaps %xmm2, %xmm3
andnps %xmm1, %xmm3
movaps %xmm2, %xmm4
andnps %xmm0, %xmm4
andps %xmm2, %xmm0
orps %xmm3, %xmm0
andps %xmm1, %xmm2
orps %xmm4, %xmm2
movaps %xmm0, (%rdi)
movaps %xmm2, (%rsi)
To:
movaps %xmm0, %xmm2
minps %xmm1, %xmm2
maxps %xmm0, %xmm1
movaps %xmm2, (%rdi)
movaps %xmm1, (%rsi)
The TODO comments show that we're limiting this transform only to vectors and only to bitcasts
because we need to improve other transforms or risk creating worse codegen.
Differential Revision: http://reviews.llvm.org/D21190
llvm-svn: 273011
2016-06-18 00:46:50 +08:00
|
|
|
}
|
2010-01-05 14:03:12 +08:00
|
|
|
|
|
|
|
// Fold this by inserting a select from the input values.
|
2016-08-25 08:26:32 +08:00
|
|
|
Value *NewSI =
|
2019-05-07 01:39:18 +08:00
|
|
|
Builder.CreateSelect(Cond, TI->getOperand(0), FI->getOperand(0),
|
|
|
|
SI.getName() + ".v", &SI);
|
2011-01-08 05:33:13 +08:00
|
|
|
return CastInst::Create(Instruction::CastOps(TI->getOpcode()), NewSI,
|
2010-01-05 14:03:12 +08:00
|
|
|
TI->getType());
|
|
|
|
}
|
|
|
|
|
2019-05-07 04:34:05 +08:00
|
|
|
// Cond ? -X : -Y --> -(Cond ? X : Y)
|
|
|
|
Value *X, *Y;
|
|
|
|
if (match(TI, m_FNeg(m_Value(X))) && match(FI, m_FNeg(m_Value(Y))) &&
|
|
|
|
(TI->hasOneUse() || FI->hasOneUse())) {
|
|
|
|
Value *NewSel = Builder.CreateSelect(Cond, X, Y, SI.getName() + ".v", &SI);
|
2020-03-10 23:05:31 +08:00
|
|
|
return UnaryOperator::CreateFNegFMF(NewSel, TI);
|
2019-05-07 04:34:05 +08:00
|
|
|
}
|
|
|
|
|
2018-01-19 18:05:15 +08:00
|
|
|
// Only handle binary operators (including two-operand getelementptr) with
|
|
|
|
// one-use here. As with the cast case above, it may be possible to relax the
|
|
|
|
// one-use constraint, but that needs be examined carefully since it may not
|
|
|
|
// reduce the total number of instructions.
|
|
|
|
if (TI->getNumOperands() != 2 || FI->getNumOperands() != 2 ||
|
|
|
|
(!isa<BinaryOperator>(TI) && !isa<GetElementPtrInst>(TI)) ||
|
|
|
|
!TI->hasOneUse() || !FI->hasOneUse())
|
2014-04-25 13:29:35 +08:00
|
|
|
return nullptr;
|
2010-01-05 14:03:12 +08:00
|
|
|
|
|
|
|
// Figure out if the operations have any operands in common.
|
|
|
|
Value *MatchOp, *OtherOpT, *OtherOpF;
|
|
|
|
bool MatchIsOpZero;
|
|
|
|
if (TI->getOperand(0) == FI->getOperand(0)) {
|
|
|
|
MatchOp = TI->getOperand(0);
|
|
|
|
OtherOpT = TI->getOperand(1);
|
|
|
|
OtherOpF = FI->getOperand(1);
|
|
|
|
MatchIsOpZero = true;
|
|
|
|
} else if (TI->getOperand(1) == FI->getOperand(1)) {
|
|
|
|
MatchOp = TI->getOperand(1);
|
|
|
|
OtherOpT = TI->getOperand(0);
|
|
|
|
OtherOpF = FI->getOperand(0);
|
|
|
|
MatchIsOpZero = false;
|
|
|
|
} else if (!TI->isCommutative()) {
|
2014-04-25 13:29:35 +08:00
|
|
|
return nullptr;
|
2010-01-05 14:03:12 +08:00
|
|
|
} else if (TI->getOperand(0) == FI->getOperand(1)) {
|
|
|
|
MatchOp = TI->getOperand(0);
|
|
|
|
OtherOpT = TI->getOperand(1);
|
|
|
|
OtherOpF = FI->getOperand(0);
|
|
|
|
MatchIsOpZero = true;
|
|
|
|
} else if (TI->getOperand(1) == FI->getOperand(0)) {
|
|
|
|
MatchOp = TI->getOperand(1);
|
|
|
|
OtherOpT = TI->getOperand(0);
|
|
|
|
OtherOpF = FI->getOperand(1);
|
|
|
|
MatchIsOpZero = true;
|
|
|
|
} else {
|
2014-04-25 13:29:35 +08:00
|
|
|
return nullptr;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
|
2018-09-07 22:40:06 +08:00
|
|
|
// If the select condition is a vector, the operands of the original select's
|
|
|
|
// operands also must be vectors. This may not be the case for getelementptr
|
|
|
|
// for example.
|
2019-05-07 01:39:18 +08:00
|
|
|
if (CondTy->isVectorTy() && (!OtherOpT->getType()->isVectorTy() ||
|
|
|
|
!OtherOpF->getType()->isVectorTy()))
|
2018-09-07 22:40:06 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// If we reach here, they do have operations in common.
|
2019-05-07 01:39:18 +08:00
|
|
|
Value *NewSI = Builder.CreateSelect(Cond, OtherOpT, OtherOpF,
|
2017-07-08 07:16:26 +08:00
|
|
|
SI.getName() + ".v", &SI);
|
2016-11-12 07:01:20 +08:00
|
|
|
Value *Op0 = MatchIsOpZero ? MatchOp : NewSI;
|
|
|
|
Value *Op1 = MatchIsOpZero ? NewSI : MatchOp;
|
2018-01-19 18:05:15 +08:00
|
|
|
if (auto *BO = dyn_cast<BinaryOperator>(TI)) {
|
2018-08-17 04:59:45 +08:00
|
|
|
BinaryOperator *NewBO = BinaryOperator::Create(BO->getOpcode(), Op0, Op1);
|
2018-08-21 06:26:58 +08:00
|
|
|
NewBO->copyIRFlags(TI);
|
|
|
|
NewBO->andIRFlags(FI);
|
2018-08-17 04:59:45 +08:00
|
|
|
return NewBO;
|
2018-01-19 18:05:15 +08:00
|
|
|
}
|
|
|
|
if (auto *TGEP = dyn_cast<GetElementPtrInst>(TI)) {
|
|
|
|
auto *FGEP = cast<GetElementPtrInst>(FI);
|
|
|
|
Type *ElementType = TGEP->getResultElementType();
|
|
|
|
return TGEP->isInBounds() && FGEP->isInBounds()
|
|
|
|
? GetElementPtrInst::CreateInBounds(ElementType, Op0, {Op1})
|
|
|
|
: GetElementPtrInst::Create(ElementType, Op0, {Op1});
|
|
|
|
}
|
|
|
|
llvm_unreachable("Expected BinaryOperator or GEP");
|
|
|
|
return nullptr;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
|
2017-09-05 13:26:36 +08:00
|
|
|
static bool isSelect01(const APInt &C1I, const APInt &C2I) {
|
|
|
|
if (!C1I.isNullValue() && !C2I.isNullValue()) // One side must be zero.
|
2010-01-05 14:03:12 +08:00
|
|
|
return false;
|
2017-09-05 13:26:36 +08:00
|
|
|
return C1I.isOneValue() || C1I.isAllOnesValue() ||
|
|
|
|
C2I.isOneValue() || C2I.isAllOnesValue();
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
|
2015-09-09 23:24:36 +08:00
|
|
|
/// Try to fold the select into one of the operands to allow further
|
|
|
|
/// optimization.
|
2020-06-03 21:56:40 +08:00
|
|
|
Instruction *InstCombinerImpl::foldSelectIntoOp(SelectInst &SI, Value *TrueVal,
|
|
|
|
Value *FalseVal) {
|
2010-01-05 14:03:12 +08:00
|
|
|
// See the comment above GetSelectFoldableOperands for a description of the
|
|
|
|
// transformation we are doing here.
|
2017-08-08 14:19:24 +08:00
|
|
|
if (auto *TVI = dyn_cast<BinaryOperator>(TrueVal)) {
|
|
|
|
if (TVI->hasOneUse() && !isa<Constant>(FalseVal)) {
|
2016-09-30 06:18:30 +08:00
|
|
|
if (unsigned SFO = getSelectFoldableOperands(TVI)) {
|
2010-01-05 14:03:12 +08:00
|
|
|
unsigned OpToFold = 0;
|
|
|
|
if ((SFO & 1) && FalseVal == TVI->getOperand(0)) {
|
|
|
|
OpToFold = 1;
|
2011-03-28 03:51:23 +08:00
|
|
|
} else if ((SFO & 2) && FalseVal == TVI->getOperand(1)) {
|
2010-01-05 14:03:12 +08:00
|
|
|
OpToFold = 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (OpToFold) {
|
2017-09-05 13:26:36 +08:00
|
|
|
APInt CI = getSelectFoldableConstant(TVI);
|
2010-01-05 14:03:12 +08:00
|
|
|
Value *OOp = TVI->getOperand(2-OpToFold);
|
|
|
|
// Avoid creating select between 2 constants unless it's selecting
|
2010-12-23 07:12:15 +08:00
|
|
|
// between 0, 1 and -1.
|
2017-09-05 13:26:36 +08:00
|
|
|
const APInt *OOpC;
|
|
|
|
bool OOpIsAPInt = match(OOp, m_APInt(OOpC));
|
|
|
|
if (!isa<Constant>(OOp) || (OOpIsAPInt && isSelect01(CI, *OOpC))) {
|
|
|
|
Value *C = ConstantInt::get(OOp->getType(), CI);
|
2017-07-08 07:16:26 +08:00
|
|
|
Value *NewSel = Builder.CreateSelect(SI.getCondition(), OOp, C);
|
2010-01-05 14:03:12 +08:00
|
|
|
NewSel->takeName(TVI);
|
2017-08-08 14:19:24 +08:00
|
|
|
BinaryOperator *BO = BinaryOperator::Create(TVI->getOpcode(),
|
2011-03-28 03:51:23 +08:00
|
|
|
FalseVal, NewSel);
|
2017-08-08 14:19:24 +08:00
|
|
|
BO->copyIRFlags(TVI);
|
2011-03-29 01:48:26 +08:00
|
|
|
return BO;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-08-08 14:19:24 +08:00
|
|
|
if (auto *FVI = dyn_cast<BinaryOperator>(FalseVal)) {
|
|
|
|
if (FVI->hasOneUse() && !isa<Constant>(TrueVal)) {
|
2016-09-30 06:18:30 +08:00
|
|
|
if (unsigned SFO = getSelectFoldableOperands(FVI)) {
|
2010-01-05 14:03:12 +08:00
|
|
|
unsigned OpToFold = 0;
|
|
|
|
if ((SFO & 1) && TrueVal == FVI->getOperand(0)) {
|
|
|
|
OpToFold = 1;
|
2011-03-28 03:51:23 +08:00
|
|
|
} else if ((SFO & 2) && TrueVal == FVI->getOperand(1)) {
|
2010-01-05 14:03:12 +08:00
|
|
|
OpToFold = 2;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (OpToFold) {
|
2017-09-05 13:26:36 +08:00
|
|
|
APInt CI = getSelectFoldableConstant(FVI);
|
2010-01-05 14:03:12 +08:00
|
|
|
Value *OOp = FVI->getOperand(2-OpToFold);
|
|
|
|
// Avoid creating select between 2 constants unless it's selecting
|
2010-12-23 07:12:15 +08:00
|
|
|
// between 0, 1 and -1.
|
2017-09-05 13:26:36 +08:00
|
|
|
const APInt *OOpC;
|
|
|
|
bool OOpIsAPInt = match(OOp, m_APInt(OOpC));
|
|
|
|
if (!isa<Constant>(OOp) || (OOpIsAPInt && isSelect01(CI, *OOpC))) {
|
|
|
|
Value *C = ConstantInt::get(OOp->getType(), CI);
|
2017-07-08 07:16:26 +08:00
|
|
|
Value *NewSel = Builder.CreateSelect(SI.getCondition(), C, OOp);
|
2010-01-05 14:03:12 +08:00
|
|
|
NewSel->takeName(FVI);
|
2017-08-08 14:19:24 +08:00
|
|
|
BinaryOperator *BO = BinaryOperator::Create(FVI->getOpcode(),
|
2011-03-28 03:51:23 +08:00
|
|
|
TrueVal, NewSel);
|
2017-08-08 14:19:24 +08:00
|
|
|
BO->copyIRFlags(FVI);
|
2011-03-29 01:48:26 +08:00
|
|
|
return BO;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-04-25 13:29:35 +08:00
|
|
|
return nullptr;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
|
2018-04-07 18:37:24 +08:00
|
|
|
/// We want to turn:
|
|
|
|
/// (select (icmp eq (and X, Y), 0), (and (lshr X, Z), 1), 1)
|
|
|
|
/// into:
|
|
|
|
/// zext (icmp ne i32 (and X, (or Y, (shl 1, Z))), 0)
|
|
|
|
/// Note:
|
|
|
|
/// Z may be 0 if lshr is missing.
|
2018-04-13 17:57:57 +08:00
|
|
|
/// Worst-case scenario is that we will replace 5 instructions with 5 different
|
2018-04-07 18:37:24 +08:00
|
|
|
/// instructions, but we got rid of select.
|
2018-04-13 17:57:57 +08:00
|
|
|
static Instruction *foldSelectICmpAndAnd(Type *SelType, const ICmpInst *Cmp,
|
|
|
|
Value *TVal, Value *FVal,
|
2018-04-07 18:37:24 +08:00
|
|
|
InstCombiner::BuilderTy &Builder) {
|
2018-04-13 17:57:57 +08:00
|
|
|
if (!(Cmp->hasOneUse() && Cmp->getOperand(0)->hasOneUse() &&
|
|
|
|
Cmp->getPredicate() == ICmpInst::ICMP_EQ &&
|
|
|
|
match(Cmp->getOperand(1), m_Zero()) && match(FVal, m_One())))
|
2018-04-07 18:37:24 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2018-04-13 17:57:57 +08:00
|
|
|
// The TrueVal has general form of: and %B, 1
|
2018-04-07 18:37:24 +08:00
|
|
|
Value *B;
|
2018-04-13 17:57:57 +08:00
|
|
|
if (!match(TVal, m_OneUse(m_And(m_Value(B), m_One()))))
|
2018-04-07 18:37:24 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2018-04-13 17:57:57 +08:00
|
|
|
// Where %B may be optionally shifted: lshr %X, %Z.
|
|
|
|
Value *X, *Z;
|
|
|
|
const bool HasShift = match(B, m_OneUse(m_LShr(m_Value(X), m_Value(Z))));
|
|
|
|
if (!HasShift)
|
|
|
|
X = B;
|
|
|
|
|
|
|
|
Value *Y;
|
|
|
|
if (!match(Cmp->getOperand(0), m_c_And(m_Specific(X), m_Value(Y))))
|
2018-04-07 18:37:24 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2018-04-13 17:57:57 +08:00
|
|
|
// ((X & Y) == 0) ? ((X >> Z) & 1) : 1 --> (X & (Y | (1 << Z))) != 0
|
|
|
|
// ((X & Y) == 0) ? (X & 1) : 1 --> (X & (Y | 1)) != 0
|
|
|
|
Constant *One = ConstantInt::get(SelType, 1);
|
|
|
|
Value *MaskB = HasShift ? Builder.CreateShl(One, Z) : One;
|
2018-04-07 18:37:24 +08:00
|
|
|
Value *FullMask = Builder.CreateOr(Y, MaskB);
|
|
|
|
Value *MaskedX = Builder.CreateAnd(X, FullMask);
|
|
|
|
Value *ICmpNeZero = Builder.CreateIsNotNull(MaskedX);
|
|
|
|
return new ZExtInst(ICmpNeZero, SelType);
|
|
|
|
}
|
|
|
|
|
[InstCombine] Fold select (icmp sgt x, -1), lshr (X, Y), ashr (X, Y) to ashr (X, Y))
Summary:
(select (icmp sgt x, -1), lshr (X, Y), ashr (X, Y)) -> ashr (X, Y))
(select (icmp slt x, 1), ashr (X, Y), lshr (X, Y)) -> ashr (X, Y))
Fixes PR41173
Alive proof by @lebedev.ri (thanks)
Name: PR41173
%cmp = icmp slt i32 %x, 1
%shr = lshr i32 %x, %y
%shr1 = ashr i32 %x, %y
%retval.0 = select i1 %cmp, i32 %shr1, i32 %shr
=>
%retval.0 = ashr i32 %x, %y
Optimization: PR41173
Done: 1
Optimization is correct!
Reviewers: lebedev.ri, spatel
Reviewed By: lebedev.ri
Subscribers: nikic, craig.topper, llvm-commits, lebedev.ri
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64285
llvm-svn: 365893
2019-07-12 19:31:16 +08:00
|
|
|
/// We want to turn:
|
|
|
|
/// (select (icmp sgt x, C), lshr (X, Y), ashr (X, Y)); iff C s>= -1
|
|
|
|
/// (select (icmp slt x, C), ashr (X, Y), lshr (X, Y)); iff C s>= 0
|
|
|
|
/// into:
|
|
|
|
/// ashr (X, Y)
|
|
|
|
static Value *foldSelectICmpLshrAshr(const ICmpInst *IC, Value *TrueVal,
|
|
|
|
Value *FalseVal,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
ICmpInst::Predicate Pred = IC->getPredicate();
|
|
|
|
Value *CmpLHS = IC->getOperand(0);
|
|
|
|
Value *CmpRHS = IC->getOperand(1);
|
2019-07-13 05:14:21 +08:00
|
|
|
if (!CmpRHS->getType()->isIntOrIntVectorTy())
|
|
|
|
return nullptr;
|
[InstCombine] Fold select (icmp sgt x, -1), lshr (X, Y), ashr (X, Y) to ashr (X, Y))
Summary:
(select (icmp sgt x, -1), lshr (X, Y), ashr (X, Y)) -> ashr (X, Y))
(select (icmp slt x, 1), ashr (X, Y), lshr (X, Y)) -> ashr (X, Y))
Fixes PR41173
Alive proof by @lebedev.ri (thanks)
Name: PR41173
%cmp = icmp slt i32 %x, 1
%shr = lshr i32 %x, %y
%shr1 = ashr i32 %x, %y
%retval.0 = select i1 %cmp, i32 %shr1, i32 %shr
=>
%retval.0 = ashr i32 %x, %y
Optimization: PR41173
Done: 1
Optimization is correct!
Reviewers: lebedev.ri, spatel
Reviewed By: lebedev.ri
Subscribers: nikic, craig.topper, llvm-commits, lebedev.ri
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64285
llvm-svn: 365893
2019-07-12 19:31:16 +08:00
|
|
|
|
|
|
|
Value *X, *Y;
|
|
|
|
unsigned Bitwidth = CmpRHS->getType()->getScalarSizeInBits();
|
|
|
|
if ((Pred != ICmpInst::ICMP_SGT ||
|
|
|
|
!match(CmpRHS,
|
|
|
|
m_SpecificInt_ICMP(ICmpInst::ICMP_SGE, APInt(Bitwidth, -1)))) &&
|
|
|
|
(Pred != ICmpInst::ICMP_SLT ||
|
|
|
|
!match(CmpRHS,
|
|
|
|
m_SpecificInt_ICMP(ICmpInst::ICMP_SGE, APInt(Bitwidth, 0)))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Canonicalize so that ashr is in FalseVal.
|
|
|
|
if (Pred == ICmpInst::ICMP_SLT)
|
|
|
|
std::swap(TrueVal, FalseVal);
|
|
|
|
|
|
|
|
if (match(TrueVal, m_LShr(m_Value(X), m_Value(Y))) &&
|
|
|
|
match(FalseVal, m_AShr(m_Specific(X), m_Specific(Y))) &&
|
|
|
|
match(CmpLHS, m_Specific(X))) {
|
|
|
|
const auto *Ashr = cast<Instruction>(FalseVal);
|
|
|
|
// if lshr is not exact and ashr is, this new ashr must not be exact.
|
|
|
|
bool IsExact = Ashr->isExact() && cast<Instruction>(TrueVal)->isExact();
|
|
|
|
return Builder.CreateAShr(X, Y, IC->getName(), IsExact);
|
|
|
|
}
|
|
|
|
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2015-09-09 23:24:36 +08:00
|
|
|
/// We want to turn:
|
2013-04-30 16:57:58 +08:00
|
|
|
/// (select (icmp eq (and X, C1), 0), Y, (or Y, C2))
|
|
|
|
/// into:
|
2017-06-22 00:07:13 +08:00
|
|
|
/// (or (shl (and X, C1), C3), Y)
|
2013-04-30 16:57:58 +08:00
|
|
|
/// iff:
|
|
|
|
/// C1 and C2 are both powers of 2
|
|
|
|
/// where:
|
|
|
|
/// C3 = Log(C2) - Log(C1)
|
|
|
|
///
|
|
|
|
/// This transform handles cases where:
|
|
|
|
/// 1. The icmp predicate is inverted
|
|
|
|
/// 2. The select operands are reversed
|
|
|
|
/// 3. The magnitude of C2 and C1 are flipped
|
2017-08-29 08:13:49 +08:00
|
|
|
static Value *foldSelectICmpAndOr(const ICmpInst *IC, Value *TrueVal,
|
2013-04-30 16:57:58 +08:00
|
|
|
Value *FalseVal,
|
2017-07-08 07:16:26 +08:00
|
|
|
InstCombiner::BuilderTy &Builder) {
|
2017-08-29 08:13:49 +08:00
|
|
|
// Only handle integer compares. Also, if this is a vector select, we need a
|
|
|
|
// vector compare.
|
|
|
|
if (!TrueVal->getType()->isIntOrIntVectorTy() ||
|
|
|
|
TrueVal->getType()->isVectorTy() != IC->getType()->isVectorTy())
|
2014-04-25 13:29:35 +08:00
|
|
|
return nullptr;
|
2013-04-30 16:57:58 +08:00
|
|
|
|
|
|
|
Value *CmpLHS = IC->getOperand(0);
|
|
|
|
Value *CmpRHS = IC->getOperand(1);
|
|
|
|
|
[InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2))
Summary:
InstCombine likes to turn (icmp eq (and X, C1), 0) into (icmp slt (trunc (X)), 0) sometimes. This breaks foldSelectICmpAndOr's ability to recognize (select (icmp eq (and X, C1), 0), Y, (or Y, C2))->(or (shl (and X, C1), C3), y).
This patch tries to recover this. I had to flip around some of the early out checks so that I could create a new And instruction during the compare processing without it possibly never getting used.
Reviewers: spatel, majnemer, davide
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34184
llvm-svn: 306029
2017-06-23 00:23:30 +08:00
|
|
|
Value *V;
|
|
|
|
unsigned C1Log;
|
|
|
|
bool IsEqualZero;
|
|
|
|
bool NeedAnd = false;
|
|
|
|
if (IC->isEquality()) {
|
|
|
|
if (!match(CmpRHS, m_Zero()))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
const APInt *C1;
|
|
|
|
if (!match(CmpLHS, m_And(m_Value(), m_Power2(C1))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
V = CmpLHS;
|
|
|
|
C1Log = C1->logBase2();
|
|
|
|
IsEqualZero = IC->getPredicate() == ICmpInst::ICMP_EQ;
|
|
|
|
} else if (IC->getPredicate() == ICmpInst::ICMP_SLT ||
|
|
|
|
IC->getPredicate() == ICmpInst::ICMP_SGT) {
|
|
|
|
// We also need to recognize (icmp slt (trunc (X)), 0) and
|
|
|
|
// (icmp sgt (trunc (X)), -1).
|
|
|
|
IsEqualZero = IC->getPredicate() == ICmpInst::ICMP_SGT;
|
|
|
|
if ((IsEqualZero && !match(CmpRHS, m_AllOnes())) ||
|
|
|
|
(!IsEqualZero && !match(CmpRHS, m_Zero())))
|
|
|
|
return nullptr;
|
2013-04-30 16:57:58 +08:00
|
|
|
|
[InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2))
Summary:
InstCombine likes to turn (icmp eq (and X, C1), 0) into (icmp slt (trunc (X)), 0) sometimes. This breaks foldSelectICmpAndOr's ability to recognize (select (icmp eq (and X, C1), 0), Y, (or Y, C2))->(or (shl (and X, C1), C3), y).
This patch tries to recover this. I had to flip around some of the early out checks so that I could create a new And instruction during the compare processing without it possibly never getting used.
Reviewers: spatel, majnemer, davide
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34184
llvm-svn: 306029
2017-06-23 00:23:30 +08:00
|
|
|
if (!match(CmpLHS, m_OneUse(m_Trunc(m_Value(V)))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
C1Log = CmpLHS->getType()->getScalarSizeInBits() - 1;
|
|
|
|
NeedAnd = true;
|
|
|
|
} else {
|
2014-04-25 13:29:35 +08:00
|
|
|
return nullptr;
|
[InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2))
Summary:
InstCombine likes to turn (icmp eq (and X, C1), 0) into (icmp slt (trunc (X)), 0) sometimes. This breaks foldSelectICmpAndOr's ability to recognize (select (icmp eq (and X, C1), 0), Y, (or Y, C2))->(or (shl (and X, C1), C3), y).
This patch tries to recover this. I had to flip around some of the early out checks so that I could create a new And instruction during the compare processing without it possibly never getting used.
Reviewers: spatel, majnemer, davide
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34184
llvm-svn: 306029
2017-06-23 00:23:30 +08:00
|
|
|
}
|
2013-04-30 16:57:58 +08:00
|
|
|
|
|
|
|
const APInt *C2;
|
2014-05-15 16:22:55 +08:00
|
|
|
bool OrOnTrueVal = false;
|
|
|
|
bool OrOnFalseVal = match(FalseVal, m_Or(m_Specific(TrueVal), m_Power2(C2)));
|
|
|
|
if (!OrOnFalseVal)
|
|
|
|
OrOnTrueVal = match(TrueVal, m_Or(m_Specific(FalseVal), m_Power2(C2)));
|
2013-04-30 16:57:58 +08:00
|
|
|
|
|
|
|
if (!OrOnFalseVal && !OrOnTrueVal)
|
2014-04-25 13:29:35 +08:00
|
|
|
return nullptr;
|
2013-04-30 16:57:58 +08:00
|
|
|
|
|
|
|
Value *Y = OrOnFalseVal ? TrueVal : FalseVal;
|
|
|
|
|
|
|
|
unsigned C2Log = C2->logBase2();
|
2017-06-22 00:07:13 +08:00
|
|
|
|
[InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2))
Summary:
InstCombine likes to turn (icmp eq (and X, C1), 0) into (icmp slt (trunc (X)), 0) sometimes. This breaks foldSelectICmpAndOr's ability to recognize (select (icmp eq (and X, C1), 0), Y, (or Y, C2))->(or (shl (and X, C1), C3), y).
This patch tries to recover this. I had to flip around some of the early out checks so that I could create a new And instruction during the compare processing without it possibly never getting used.
Reviewers: spatel, majnemer, davide
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34184
llvm-svn: 306029
2017-06-23 00:23:30 +08:00
|
|
|
bool NeedXor = (!IsEqualZero && OrOnFalseVal) || (IsEqualZero && OrOnTrueVal);
|
2017-06-22 00:07:13 +08:00
|
|
|
bool NeedShift = C1Log != C2Log;
|
2017-08-29 08:13:49 +08:00
|
|
|
bool NeedZExtTrunc = Y->getType()->getScalarSizeInBits() !=
|
|
|
|
V->getType()->getScalarSizeInBits();
|
2017-06-22 00:07:13 +08:00
|
|
|
|
|
|
|
// Make sure we don't create more instructions than we save.
|
|
|
|
Value *Or = OrOnFalseVal ? FalseVal : TrueVal;
|
|
|
|
if ((NeedShift + NeedXor + NeedZExtTrunc) >
|
|
|
|
(IC->hasOneUse() + Or->hasOneUse()))
|
|
|
|
return nullptr;
|
|
|
|
|
[InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2))
Summary:
InstCombine likes to turn (icmp eq (and X, C1), 0) into (icmp slt (trunc (X)), 0) sometimes. This breaks foldSelectICmpAndOr's ability to recognize (select (icmp eq (and X, C1), 0), Y, (or Y, C2))->(or (shl (and X, C1), C3), y).
This patch tries to recover this. I had to flip around some of the early out checks so that I could create a new And instruction during the compare processing without it possibly never getting used.
Reviewers: spatel, majnemer, davide
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34184
llvm-svn: 306029
2017-06-23 00:23:30 +08:00
|
|
|
if (NeedAnd) {
|
|
|
|
// Insert the AND instruction on the input to the truncate.
|
|
|
|
APInt C1 = APInt::getOneBitSet(V->getType()->getScalarSizeInBits(), C1Log);
|
2017-07-08 07:16:26 +08:00
|
|
|
V = Builder.CreateAnd(V, ConstantInt::get(V->getType(), C1));
|
[InstCombine] Teach foldSelectICmpAndOr to recognize (select (icmp slt (trunc (X)), 0), Y, (or Y, C2))
Summary:
InstCombine likes to turn (icmp eq (and X, C1), 0) into (icmp slt (trunc (X)), 0) sometimes. This breaks foldSelectICmpAndOr's ability to recognize (select (icmp eq (and X, C1), 0), Y, (or Y, C2))->(or (shl (and X, C1), C3), y).
This patch tries to recover this. I had to flip around some of the early out checks so that I could create a new And instruction during the compare processing without it possibly never getting used.
Reviewers: spatel, majnemer, davide
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D34184
llvm-svn: 306029
2017-06-23 00:23:30 +08:00
|
|
|
}
|
|
|
|
|
2013-04-30 16:57:58 +08:00
|
|
|
if (C2Log > C1Log) {
|
2017-07-08 07:16:26 +08:00
|
|
|
V = Builder.CreateZExtOrTrunc(V, Y->getType());
|
|
|
|
V = Builder.CreateShl(V, C2Log - C1Log);
|
2013-04-30 16:57:58 +08:00
|
|
|
} else if (C1Log > C2Log) {
|
2017-07-08 07:16:26 +08:00
|
|
|
V = Builder.CreateLShr(V, C1Log - C2Log);
|
|
|
|
V = Builder.CreateZExtOrTrunc(V, Y->getType());
|
2013-04-30 18:36:33 +08:00
|
|
|
} else
|
2017-07-08 07:16:26 +08:00
|
|
|
V = Builder.CreateZExtOrTrunc(V, Y->getType());
|
2013-04-30 16:57:58 +08:00
|
|
|
|
2017-06-22 00:07:13 +08:00
|
|
|
if (NeedXor)
|
2017-07-08 07:16:26 +08:00
|
|
|
V = Builder.CreateXor(V, *C2);
|
2013-04-30 16:57:58 +08:00
|
|
|
|
2017-07-08 07:16:26 +08:00
|
|
|
return Builder.CreateOr(V, Y);
|
2013-04-30 16:57:58 +08:00
|
|
|
}
|
|
|
|
|
[InstCombine] use select-of-constants with set/clear bit mask patterns
Cond ? (X & ~C) : (X | C) --> (X & ~C) | (Cond ? 0 : C)
Cond ? (X | C) : (X & ~C) --> (X & ~C) | (Cond ? C : 0)
The select-of-constants form results in better codegen.
There's an existing test diff that shows a transform that
results in an extra IR instruction, but that's an existing
problem.
This is motivated by code seen in LLVM itself - see PR37581:
https://bugs.llvm.org/show_bug.cgi?id=37581
define i8 @src(i8 %x, i8 %C, i1 %b) {
%notC = xor i8 %C, -1
%and = and i8 %x, %notC
%or = or i8 %x, %C
%cond = select i1 %b, i8 %or, i8 %and
ret i8 %cond
}
define i8 @tgt(i8 %x, i8 %C, i1 %b) {
%notC = xor i8 %C, -1
%and = and i8 %x, %notC
%mul = select i1 %b, i8 %C, i8 0
%or = or i8 %mul, %and
ret i8 %or
}
http://volta.cs.utah.edu:8080/z/Vt2WVm
Differential Revision: https://reviews.llvm.org/D78880
2020-05-03 21:43:49 +08:00
|
|
|
/// Canonicalize a set or clear of a masked set of constant bits to
|
|
|
|
/// select-of-constants form.
|
|
|
|
static Instruction *foldSetClearBits(SelectInst &Sel,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
Value *Cond = Sel.getCondition();
|
|
|
|
Value *T = Sel.getTrueValue();
|
|
|
|
Value *F = Sel.getFalseValue();
|
|
|
|
Type *Ty = Sel.getType();
|
|
|
|
Value *X;
|
|
|
|
const APInt *NotC, *C;
|
|
|
|
|
|
|
|
// Cond ? (X & ~C) : (X | C) --> (X & ~C) | (Cond ? 0 : C)
|
|
|
|
if (match(T, m_And(m_Value(X), m_APInt(NotC))) &&
|
|
|
|
match(F, m_OneUse(m_Or(m_Specific(X), m_APInt(C)))) && *NotC == ~(*C)) {
|
|
|
|
Constant *Zero = ConstantInt::getNullValue(Ty);
|
|
|
|
Constant *OrC = ConstantInt::get(Ty, *C);
|
|
|
|
Value *NewSel = Builder.CreateSelect(Cond, Zero, OrC, "masksel", &Sel);
|
|
|
|
return BinaryOperator::CreateOr(T, NewSel);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Cond ? (X | C) : (X & ~C) --> (X & ~C) | (Cond ? C : 0)
|
|
|
|
if (match(F, m_And(m_Value(X), m_APInt(NotC))) &&
|
|
|
|
match(T, m_OneUse(m_Or(m_Specific(X), m_APInt(C)))) && *NotC == ~(*C)) {
|
|
|
|
Constant *Zero = ConstantInt::getNullValue(Ty);
|
|
|
|
Constant *OrC = ConstantInt::get(Ty, *C);
|
|
|
|
Value *NewSel = Builder.CreateSelect(Cond, OrC, Zero, "masksel", &Sel);
|
|
|
|
return BinaryOperator::CreateOr(F, NewSel);
|
|
|
|
}
|
|
|
|
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2019-03-28 01:56:15 +08:00
|
|
|
/// Transform patterns such as (a > b) ? a - b : 0 into usub.sat(a, b).
|
2018-02-06 01:53:29 +08:00
|
|
|
/// There are 8 commuted/swapped variants of this pattern.
|
|
|
|
/// TODO: Also support a - UMIN(a,b) patterns.
|
|
|
|
static Value *canonicalizeSaturatedSubtract(const ICmpInst *ICI,
|
|
|
|
const Value *TrueVal,
|
|
|
|
const Value *FalseVal,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
ICmpInst::Predicate Pred = ICI->getPredicate();
|
|
|
|
if (!ICmpInst::isUnsigned(Pred))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// (b > a) ? 0 : a - b -> (b <= a) ? a - b : 0
|
|
|
|
if (match(TrueVal, m_Zero())) {
|
|
|
|
Pred = ICmpInst::getInversePredicate(Pred);
|
|
|
|
std::swap(TrueVal, FalseVal);
|
|
|
|
}
|
|
|
|
if (!match(FalseVal, m_Zero()))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Value *A = ICI->getOperand(0);
|
|
|
|
Value *B = ICI->getOperand(1);
|
|
|
|
if (Pred == ICmpInst::ICMP_ULE || Pred == ICmpInst::ICMP_ULT) {
|
|
|
|
// (b < a) ? a - b : 0 -> (a > b) ? a - b : 0
|
|
|
|
std::swap(A, B);
|
|
|
|
Pred = ICmpInst::getSwappedPredicate(Pred);
|
|
|
|
}
|
|
|
|
|
|
|
|
assert((Pred == ICmpInst::ICMP_UGE || Pred == ICmpInst::ICMP_UGT) &&
|
|
|
|
"Unexpected isUnsigned predicate!");
|
|
|
|
|
2019-12-01 00:39:29 +08:00
|
|
|
// Ensure the sub is of the form:
|
|
|
|
// (a > b) ? a - b : 0 -> usub.sat(a, b)
|
|
|
|
// (a > b) ? b - a : 0 -> -usub.sat(a, b)
|
|
|
|
// Checking for both a-b and a+(-b) as a constant.
|
2018-02-06 01:53:29 +08:00
|
|
|
bool IsNegative = false;
|
2019-12-01 00:39:29 +08:00
|
|
|
const APInt *C;
|
|
|
|
if (match(TrueVal, m_Sub(m_Specific(B), m_Specific(A))) ||
|
|
|
|
(match(A, m_APInt(C)) &&
|
|
|
|
match(TrueVal, m_Add(m_Specific(B), m_SpecificInt(-*C)))))
|
2018-02-06 01:53:29 +08:00
|
|
|
IsNegative = true;
|
2019-12-01 00:39:29 +08:00
|
|
|
else if (!match(TrueVal, m_Sub(m_Specific(A), m_Specific(B))) &&
|
|
|
|
!(match(B, m_APInt(C)) &&
|
|
|
|
match(TrueVal, m_Add(m_Specific(A), m_SpecificInt(-*C)))))
|
2018-02-06 01:53:29 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2019-11-30 22:20:55 +08:00
|
|
|
// If we are adding a negate and the sub and icmp are used anywhere else, we
|
|
|
|
// would end up with more instructions.
|
|
|
|
if (IsNegative && !TrueVal->hasOneUse() && !ICI->hasOneUse())
|
2018-02-06 01:53:29 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2019-03-28 01:56:15 +08:00
|
|
|
// (a > b) ? a - b : 0 -> usub.sat(a, b)
|
|
|
|
// (a > b) ? b - a : 0 -> -usub.sat(a, b)
|
|
|
|
Value *Result = Builder.CreateBinaryIntrinsic(Intrinsic::usub_sat, A, B);
|
|
|
|
if (IsNegative)
|
|
|
|
Result = Builder.CreateNeg(Result);
|
|
|
|
return Result;
|
2018-02-06 01:53:29 +08:00
|
|
|
}
|
|
|
|
|
[InstCombine] canonicalize cmp/select form of uadd saturate with constant
I'm circling back around to a loose end from D51929.
The backend (either CGP or DAG) doesn't recognize this pattern, so we end up with different asm for these IR variants.
Regardless of any future changes to canonicalize to saturation/overflow intrinsics, we want to get raw IR variations
into the minimal number of raw IR forms. If/when we can canonicalize to intrinsics, that will make that step easier.
Pre: C2 == ~C1
%a = add i32 %x, C1
%c = icmp ugt i32 %x, C2
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, C1
%c2 = icmp ult i32 %x, C2
%r = select i1 %c2, i32 %a, i32 -1
https://rise4fun.com/Alive/pkH
Differential Revision: https://reviews.llvm.org/D57352
llvm-svn: 352536
2019-01-30 04:02:45 +08:00
|
|
|
static Value *canonicalizeSaturatedAdd(ICmpInst *Cmp, Value *TVal, Value *FVal,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
[InstCombine] reduce more unsigned saturated add with 'not' op
We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
Name: not op
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ult i32 %notx, %y
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, %y
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
Name: not op ugt
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ugt i32 %y, %notx
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, %y
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
https://rise4fun.com/Alive/niom
(The matching here is still incomplete.)
llvm-svn: 354224
2019-02-18 00:48:50 +08:00
|
|
|
if (!Cmp->hasOneUse())
|
[InstCombine] canonicalize cmp/select form of uadd saturate with constant
I'm circling back around to a loose end from D51929.
The backend (either CGP or DAG) doesn't recognize this pattern, so we end up with different asm for these IR variants.
Regardless of any future changes to canonicalize to saturation/overflow intrinsics, we want to get raw IR variations
into the minimal number of raw IR forms. If/when we can canonicalize to intrinsics, that will make that step easier.
Pre: C2 == ~C1
%a = add i32 %x, C1
%c = icmp ugt i32 %x, C2
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, C1
%c2 = icmp ult i32 %x, C2
%r = select i1 %c2, i32 %a, i32 -1
https://rise4fun.com/Alive/pkH
Differential Revision: https://reviews.llvm.org/D57352
llvm-svn: 352536
2019-01-30 04:02:45 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2019-02-20 05:46:13 +08:00
|
|
|
// Match unsigned saturated add with constant.
|
2019-02-17 23:58:48 +08:00
|
|
|
Value *Cmp0 = Cmp->getOperand(0);
|
|
|
|
Value *Cmp1 = Cmp->getOperand(1);
|
[InstCombine] reduce more unsigned saturated add with 'not' op
We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
Name: not op
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ult i32 %notx, %y
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, %y
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
Name: not op ugt
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ugt i32 %y, %notx
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, %y
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
https://rise4fun.com/Alive/niom
(The matching here is still incomplete.)
llvm-svn: 354224
2019-02-18 00:48:50 +08:00
|
|
|
ICmpInst::Predicate Pred = Cmp->getPredicate();
|
2019-02-20 05:46:13 +08:00
|
|
|
Value *X;
|
|
|
|
const APInt *C, *CmpC;
|
|
|
|
if (Pred == ICmpInst::ICMP_ULT &&
|
|
|
|
match(TVal, m_Add(m_Value(X), m_APInt(C))) && X == Cmp0 &&
|
|
|
|
match(FVal, m_AllOnes()) && match(Cmp1, m_APInt(CmpC)) && *CmpC == ~*C) {
|
2019-03-28 01:56:15 +08:00
|
|
|
// (X u< ~C) ? (X + C) : -1 --> uadd.sat(X, C)
|
|
|
|
return Builder.CreateBinaryIntrinsic(
|
|
|
|
Intrinsic::uadd_sat, X, ConstantInt::get(X->getType(), *C));
|
2019-02-20 05:46:13 +08:00
|
|
|
}
|
|
|
|
|
[InstCombine] reduce even more unsigned saturated add with 'not' op
We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
Name: uaddsat, -1 fval
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ugt i32 %notx, %y
%r = select i1 %c, i32 %a, i32 -1
=>
%a = add i32 %x, %y
%c2 = icmp ugt i32 %y, %a
%r = select i1 %c2, i32 -1, i32 %a
Name: uaddsat, -1 fval + ult
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ult i32 %y, %notx
%r = select i1 %c, i32 %a, i32 -1
=>
%a = add i32 %x, %y
%c2 = icmp ugt i32 %y, %a
%r = select i1 %c2, i32 -1, i32 %a
https://rise4fun.com/Alive/nTp
llvm-svn: 354393
2019-02-20 06:14:21 +08:00
|
|
|
// Match unsigned saturated add of 2 variables with an unnecessary 'not'.
|
|
|
|
// There are 8 commuted variants.
|
2019-03-28 01:56:15 +08:00
|
|
|
// Canonicalize -1 (saturated result) to true value of the select. Just
|
|
|
|
// swapping the compare operands is legal, because the selected value is the
|
|
|
|
// same in case of equality, so we can interchange u< and u<=.
|
[InstCombine] reduce even more unsigned saturated add with 'not' op
We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
Name: uaddsat, -1 fval
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ugt i32 %notx, %y
%r = select i1 %c, i32 %a, i32 -1
=>
%a = add i32 %x, %y
%c2 = icmp ugt i32 %y, %a
%r = select i1 %c2, i32 -1, i32 %a
Name: uaddsat, -1 fval + ult
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ult i32 %y, %notx
%r = select i1 %c, i32 %a, i32 -1
=>
%a = add i32 %x, %y
%c2 = icmp ugt i32 %y, %a
%r = select i1 %c2, i32 -1, i32 %a
https://rise4fun.com/Alive/nTp
llvm-svn: 354393
2019-02-20 06:14:21 +08:00
|
|
|
if (match(FVal, m_AllOnes())) {
|
|
|
|
std::swap(TVal, FVal);
|
|
|
|
std::swap(Cmp0, Cmp1);
|
|
|
|
}
|
|
|
|
if (!match(TVal, m_AllOnes()))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Canonicalize predicate to 'ULT'.
|
[InstCombine] reduce more unsigned saturated add with 'not' op
We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
Name: not op
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ult i32 %notx, %y
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, %y
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
Name: not op ugt
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ugt i32 %y, %notx
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, %y
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
https://rise4fun.com/Alive/niom
(The matching here is still incomplete.)
llvm-svn: 354224
2019-02-18 00:48:50 +08:00
|
|
|
if (Pred == ICmpInst::ICMP_UGT) {
|
|
|
|
Pred = ICmpInst::ICMP_ULT;
|
|
|
|
std::swap(Cmp0, Cmp1);
|
|
|
|
}
|
|
|
|
if (Pred != ICmpInst::ICMP_ULT)
|
|
|
|
return nullptr;
|
|
|
|
|
2019-02-19 00:04:22 +08:00
|
|
|
// Match unsigned saturated add of 2 variables with an unnecessary 'not'.
|
2019-02-20 05:46:13 +08:00
|
|
|
Value *Y;
|
[InstCombine] reduce even more unsigned saturated add with 'not' op
We want to use the sum in the icmp to allow matching with
m_UAddWithOverflow and eliminate the 'not'. This is discussed
in D51929 and is another step towards solving PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
Name: uaddsat, -1 fval
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ugt i32 %notx, %y
%r = select i1 %c, i32 %a, i32 -1
=>
%a = add i32 %x, %y
%c2 = icmp ugt i32 %y, %a
%r = select i1 %c2, i32 -1, i32 %a
Name: uaddsat, -1 fval + ult
%notx = xor i32 %x, -1
%a = add i32 %x, %y
%c = icmp ult i32 %y, %notx
%r = select i1 %c, i32 %a, i32 -1
=>
%a = add i32 %x, %y
%c2 = icmp ugt i32 %y, %a
%r = select i1 %c2, i32 -1, i32 %a
https://rise4fun.com/Alive/nTp
llvm-svn: 354393
2019-02-20 06:14:21 +08:00
|
|
|
if (match(Cmp0, m_Not(m_Value(X))) &&
|
2019-02-17 23:58:48 +08:00
|
|
|
match(FVal, m_c_Add(m_Specific(X), m_Value(Y))) && Y == Cmp1) {
|
2019-03-28 01:56:15 +08:00
|
|
|
// (~X u< Y) ? -1 : (X + Y) --> uadd.sat(X, Y)
|
|
|
|
// (~X u< Y) ? -1 : (Y + X) --> uadd.sat(X, Y)
|
|
|
|
return Builder.CreateBinaryIntrinsic(Intrinsic::uadd_sat, X, Y);
|
[InstCombine] canonicalize more unsigned saturated add with 'not'
Yet another pattern variation suggested by:
https://bugs.llvm.org/show_bug.cgi?id=14613
There are 8 more potential commuted patterns here on top of the
8 that were already handled (rL354221, rL354276, rL354393).
We have the obvious commute of the 'add' + commute of the cmp
predicate/operands (ugt/ult) + commute of the select operands:
Name: base
%notx = xor i32 %x, -1
%a = add i32 %notx, %y
%c = icmp ult i32 %x, %y
%r = select i1 %c, i32 -1, i32 %a
=>
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
Name: ugt
%notx = xor i32 %x, -1
%a = add i32 %notx, %y
%c = icmp ugt i32 %y, %x
%r = select i1 %c, i32 -1, i32 %a
=>
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
Name: commute select
%notx = xor i32 %x, -1
%a = add i32 %notx, %y
%c = icmp ult i32 %y, %x
%r = select i1 %c, i32 %a, i32 -1
=>
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
Name: ugt + commute select
%notx = xor i32 %x, -1
%a = add i32 %notx, %y
%c = icmp ugt i32 %x, %y
%r = select i1 %c, i32 %a, i32 -1
=>
%c2 = icmp ult i32 %a, %y
%r = select i1 %c2, i32 -1, i32 %a
https://rise4fun.com/Alive/den
llvm-svn: 354887
2019-02-26 23:18:49 +08:00
|
|
|
}
|
|
|
|
// The 'not' op may be included in the sum but not the compare.
|
|
|
|
X = Cmp0;
|
|
|
|
Y = Cmp1;
|
|
|
|
if (match(FVal, m_c_Add(m_Not(m_Specific(X)), m_Specific(Y)))) {
|
2019-03-28 01:56:15 +08:00
|
|
|
// (X u< Y) ? -1 : (~X + Y) --> uadd.sat(~X, Y)
|
|
|
|
// (X u< Y) ? -1 : (Y + ~X) --> uadd.sat(Y, ~X)
|
|
|
|
BinaryOperator *BO = cast<BinaryOperator>(FVal);
|
|
|
|
return Builder.CreateBinaryIntrinsic(
|
|
|
|
Intrinsic::uadd_sat, BO->getOperand(0), BO->getOperand(1));
|
2019-02-17 23:58:48 +08:00
|
|
|
}
|
2019-10-20 18:28:33 +08:00
|
|
|
// The overflow may be detected via the add wrapping round.
|
|
|
|
if (match(Cmp0, m_c_Add(m_Specific(Cmp1), m_Value(Y))) &&
|
|
|
|
match(FVal, m_c_Add(m_Specific(Cmp1), m_Specific(Y)))) {
|
|
|
|
// ((X + Y) u< X) ? -1 : (X + Y) --> uadd.sat(X, Y)
|
|
|
|
// ((X + Y) u< Y) ? -1 : (X + Y) --> uadd.sat(X, Y)
|
|
|
|
return Builder.CreateBinaryIntrinsic(Intrinsic::uadd_sat, Cmp1, Y);
|
|
|
|
}
|
2019-02-17 23:58:48 +08:00
|
|
|
|
|
|
|
return nullptr;
|
[InstCombine] canonicalize cmp/select form of uadd saturate with constant
I'm circling back around to a loose end from D51929.
The backend (either CGP or DAG) doesn't recognize this pattern, so we end up with different asm for these IR variants.
Regardless of any future changes to canonicalize to saturation/overflow intrinsics, we want to get raw IR variations
into the minimal number of raw IR forms. If/when we can canonicalize to intrinsics, that will make that step easier.
Pre: C2 == ~C1
%a = add i32 %x, C1
%c = icmp ugt i32 %x, C2
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, C1
%c2 = icmp ult i32 %x, C2
%r = select i1 %c2, i32 %a, i32 -1
https://rise4fun.com/Alive/pkH
Differential Revision: https://reviews.llvm.org/D57352
llvm-svn: 352536
2019-01-30 04:02:45 +08:00
|
|
|
}
|
|
|
|
|
2019-08-27 18:22:40 +08:00
|
|
|
/// Fold the following code sequence:
|
|
|
|
/// \code
|
|
|
|
/// int a = ctlz(x & -x);
|
|
|
|
// x ? 31 - a : a;
|
|
|
|
/// \code
|
|
|
|
///
|
|
|
|
/// into:
|
|
|
|
/// cttz(x)
|
|
|
|
static Instruction *foldSelectCtlzToCttz(ICmpInst *ICI, Value *TrueVal,
|
|
|
|
Value *FalseVal,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
unsigned BitWidth = TrueVal->getType()->getScalarSizeInBits();
|
|
|
|
if (!ICI->isEquality() || !match(ICI->getOperand(1), m_Zero()))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
if (ICI->getPredicate() == ICmpInst::ICMP_NE)
|
|
|
|
std::swap(TrueVal, FalseVal);
|
|
|
|
|
|
|
|
if (!match(FalseVal,
|
|
|
|
m_Xor(m_Deferred(TrueVal), m_SpecificInt(BitWidth - 1))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
if (!match(TrueVal, m_Intrinsic<Intrinsic::ctlz>()))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Value *X = ICI->getOperand(0);
|
|
|
|
auto *II = cast<IntrinsicInst>(TrueVal);
|
|
|
|
if (!match(II->getOperand(0), m_c_And(m_Specific(X), m_Neg(m_Specific(X)))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Function *F = Intrinsic::getDeclaration(II->getModule(), Intrinsic::cttz,
|
|
|
|
II->getType());
|
|
|
|
return CallInst::Create(F, {X, II->getArgOperand(1)});
|
|
|
|
}
|
|
|
|
|
2015-01-27 23:58:14 +08:00
|
|
|
/// Attempt to fold a cttz/ctlz followed by a icmp plus select into a single
|
|
|
|
/// call to cttz/ctlz with flag 'is_zero_undef' cleared.
|
|
|
|
///
|
|
|
|
/// For example, we can fold the following code sequence:
|
|
|
|
/// \code
|
|
|
|
/// %0 = tail call i32 @llvm.cttz.i32(i32 %x, i1 true)
|
|
|
|
/// %1 = icmp ne i32 %x, 0
|
|
|
|
/// %2 = select i1 %1, i32 %0, i32 32
|
|
|
|
/// \code
|
2016-03-23 09:38:35 +08:00
|
|
|
///
|
2015-01-27 23:58:14 +08:00
|
|
|
/// into:
|
|
|
|
/// %0 = tail call i32 @llvm.cttz.i32(i32 %x, i1 false)
|
|
|
|
static Value *foldSelectCttzCtlz(ICmpInst *ICI, Value *TrueVal, Value *FalseVal,
|
2017-07-08 07:16:26 +08:00
|
|
|
InstCombiner::BuilderTy &Builder) {
|
2015-01-27 23:58:14 +08:00
|
|
|
ICmpInst::Predicate Pred = ICI->getPredicate();
|
|
|
|
Value *CmpLHS = ICI->getOperand(0);
|
|
|
|
Value *CmpRHS = ICI->getOperand(1);
|
|
|
|
|
|
|
|
// Check if the condition value compares a value for equality against zero.
|
|
|
|
if (!ICI->isEquality() || !match(CmpRHS, m_Zero()))
|
|
|
|
return nullptr;
|
|
|
|
|
2020-02-16 18:00:22 +08:00
|
|
|
Value *SelectArg = FalseVal;
|
2015-01-27 23:58:14 +08:00
|
|
|
Value *ValueOnZero = TrueVal;
|
|
|
|
if (Pred == ICmpInst::ICMP_NE)
|
2020-02-16 18:00:22 +08:00
|
|
|
std::swap(SelectArg, ValueOnZero);
|
2015-01-27 23:58:14 +08:00
|
|
|
|
|
|
|
// Skip zero extend/truncate.
|
2020-02-16 18:00:22 +08:00
|
|
|
Value *Count = nullptr;
|
|
|
|
if (!match(SelectArg, m_ZExt(m_Value(Count))) &&
|
|
|
|
!match(SelectArg, m_Trunc(m_Value(Count))))
|
|
|
|
Count = SelectArg;
|
2015-01-27 23:58:14 +08:00
|
|
|
|
2019-01-05 17:48:16 +08:00
|
|
|
// Check that 'Count' is a call to intrinsic cttz/ctlz. Also check that the
|
|
|
|
// input to the cttz/ctlz is used as LHS for the compare instruction.
|
|
|
|
if (!match(Count, m_Intrinsic<Intrinsic::cttz>(m_Specific(CmpLHS))) &&
|
|
|
|
!match(Count, m_Intrinsic<Intrinsic::ctlz>(m_Specific(CmpLHS))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
IntrinsicInst *II = cast<IntrinsicInst>(Count);
|
|
|
|
|
2015-01-27 23:58:14 +08:00
|
|
|
// Check if the value propagated on zero is a constant number equal to the
|
|
|
|
// sizeof in bits of 'Count'.
|
|
|
|
unsigned SizeOfInBits = Count->getType()->getScalarSizeInBits();
|
2019-01-05 17:48:16 +08:00
|
|
|
if (match(ValueOnZero, m_SpecificInt(SizeOfInBits))) {
|
2020-02-16 18:00:22 +08:00
|
|
|
// Explicitly clear the 'undef_on_zero' flag. It's always valid to go from
|
|
|
|
// true to false on this flag, so we can replace it for all users.
|
|
|
|
II->setArgOperand(1, ConstantInt::getFalse(II->getContext()));
|
|
|
|
return SelectArg;
|
2015-01-27 23:58:14 +08:00
|
|
|
}
|
|
|
|
|
2020-05-02 01:51:21 +08:00
|
|
|
// The ValueOnZero is not the bitwidth. But if the cttz/ctlz (and optional
|
|
|
|
// zext/trunc) have one use (ending at the select), the cttz/ctlz result will
|
|
|
|
// not be used if the input is zero. Relax to 'undef_on_zero' for that case.
|
|
|
|
if (II->hasOneUse() && SelectArg->hasOneUse() &&
|
|
|
|
!match(II->getArgOperand(1), m_One()))
|
2019-01-05 17:48:16 +08:00
|
|
|
II->setArgOperand(1, ConstantInt::getTrue(II->getContext()));
|
|
|
|
|
2015-01-27 23:58:14 +08:00
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2016-11-02 01:46:08 +08:00
|
|
|
/// Return true if we find and adjust an icmp+select pattern where the compare
|
|
|
|
/// is with a constant that can be incremented or decremented to match the
|
|
|
|
/// minimum or maximum idiom.
|
2016-11-02 02:15:03 +08:00
|
|
|
static bool adjustMinMax(SelectInst &Sel, ICmpInst &Cmp) {
|
|
|
|
ICmpInst::Predicate Pred = Cmp.getPredicate();
|
|
|
|
Value *CmpLHS = Cmp.getOperand(0);
|
|
|
|
Value *CmpRHS = Cmp.getOperand(1);
|
|
|
|
Value *TrueVal = Sel.getTrueValue();
|
|
|
|
Value *FalseVal = Sel.getFalseValue();
|
|
|
|
|
|
|
|
// We may move or edit the compare, so make sure the select is the only user.
|
2016-11-07 23:52:45 +08:00
|
|
|
const APInt *CmpC;
|
|
|
|
if (!Cmp.hasOneUse() || !match(CmpRHS, m_APInt(CmpC)))
|
2016-11-02 02:15:03 +08:00
|
|
|
return false;
|
2010-01-05 14:03:12 +08:00
|
|
|
|
2016-11-07 23:52:45 +08:00
|
|
|
// These transforms only work for selects of integers or vector selects of
|
|
|
|
// integer vectors.
|
|
|
|
Type *SelTy = Sel.getType();
|
|
|
|
auto *SelEltTy = dyn_cast<IntegerType>(SelTy->getScalarType());
|
|
|
|
if (!SelEltTy || SelTy->isVectorTy() != Cmp.getType()->isVectorTy())
|
2016-11-02 02:15:03 +08:00
|
|
|
return false;
|
|
|
|
|
|
|
|
Constant *AdjustedRHS;
|
|
|
|
if (Pred == ICmpInst::ICMP_UGT || Pred == ICmpInst::ICMP_SGT)
|
2016-11-07 23:52:45 +08:00
|
|
|
AdjustedRHS = ConstantInt::get(CmpRHS->getType(), *CmpC + 1);
|
2016-11-02 02:15:03 +08:00
|
|
|
else if (Pred == ICmpInst::ICMP_ULT || Pred == ICmpInst::ICMP_SLT)
|
2016-11-07 23:52:45 +08:00
|
|
|
AdjustedRHS = ConstantInt::get(CmpRHS->getType(), *CmpC - 1);
|
2016-11-02 02:15:03 +08:00
|
|
|
else
|
|
|
|
return false;
|
|
|
|
|
|
|
|
// X > C ? X : C+1 --> X < C+1 ? C+1 : X
|
|
|
|
// X < C ? X : C-1 --> X > C-1 ? C-1 : X
|
|
|
|
if ((CmpLHS == TrueVal && AdjustedRHS == FalseVal) ||
|
|
|
|
(CmpLHS == FalseVal && AdjustedRHS == TrueVal)) {
|
|
|
|
; // Nothing to do here. Values match without any sign/zero extension.
|
|
|
|
}
|
|
|
|
// Types do not match. Instead of calculating this with mixed types, promote
|
|
|
|
// all to the larger type. This enables scalar evolution to analyze this
|
|
|
|
// expression.
|
2016-11-07 23:52:45 +08:00
|
|
|
else if (CmpRHS->getType()->getScalarSizeInBits() < SelEltTy->getBitWidth()) {
|
|
|
|
Constant *SextRHS = ConstantExpr::getSExt(AdjustedRHS, SelTy);
|
2016-11-02 02:15:03 +08:00
|
|
|
|
|
|
|
// X = sext x; x >s c ? X : C+1 --> X = sext x; X <s C+1 ? C+1 : X
|
|
|
|
// X = sext x; x <s c ? X : C-1 --> X = sext x; X >s C-1 ? C-1 : X
|
|
|
|
// X = sext x; x >u c ? X : C+1 --> X = sext x; X <u C+1 ? C+1 : X
|
|
|
|
// X = sext x; x <u c ? X : C-1 --> X = sext x; X >u C-1 ? C-1 : X
|
|
|
|
if (match(TrueVal, m_SExt(m_Specific(CmpLHS))) && SextRHS == FalseVal) {
|
|
|
|
CmpLHS = TrueVal;
|
|
|
|
AdjustedRHS = SextRHS;
|
|
|
|
} else if (match(FalseVal, m_SExt(m_Specific(CmpLHS))) &&
|
|
|
|
SextRHS == TrueVal) {
|
|
|
|
CmpLHS = FalseVal;
|
|
|
|
AdjustedRHS = SextRHS;
|
|
|
|
} else if (Cmp.isUnsigned()) {
|
2016-11-07 23:52:45 +08:00
|
|
|
Constant *ZextRHS = ConstantExpr::getZExt(AdjustedRHS, SelTy);
|
2016-11-02 02:15:03 +08:00
|
|
|
// X = zext x; x >u c ? X : C+1 --> X = zext x; X <u C+1 ? C+1 : X
|
|
|
|
// X = zext x; x <u c ? X : C-1 --> X = zext x; X >u C-1 ? C-1 : X
|
|
|
|
// zext + signed compare cannot be changed:
|
|
|
|
// 0xff <s 0x00, but 0x00ff >s 0x0000
|
|
|
|
if (match(TrueVal, m_ZExt(m_Specific(CmpLHS))) && ZextRHS == FalseVal) {
|
|
|
|
CmpLHS = TrueVal;
|
|
|
|
AdjustedRHS = ZextRHS;
|
|
|
|
} else if (match(FalseVal, m_ZExt(m_Specific(CmpLHS))) &&
|
|
|
|
ZextRHS == TrueVal) {
|
|
|
|
CmpLHS = FalseVal;
|
|
|
|
AdjustedRHS = ZextRHS;
|
|
|
|
} else {
|
|
|
|
return false;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
2016-11-02 02:15:03 +08:00
|
|
|
} else {
|
|
|
|
return false;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
2016-11-02 02:15:03 +08:00
|
|
|
} else {
|
|
|
|
return false;
|
|
|
|
}
|
2010-01-05 14:03:12 +08:00
|
|
|
|
2016-11-02 02:15:03 +08:00
|
|
|
Pred = ICmpInst::getSwappedPredicate(Pred);
|
|
|
|
CmpRHS = AdjustedRHS;
|
|
|
|
std::swap(FalseVal, TrueVal);
|
|
|
|
Cmp.setPredicate(Pred);
|
|
|
|
Cmp.setOperand(0, CmpLHS);
|
|
|
|
Cmp.setOperand(1, CmpRHS);
|
|
|
|
Sel.setOperand(1, TrueVal);
|
|
|
|
Sel.setOperand(2, FalseVal);
|
|
|
|
Sel.swapProfMetadata();
|
|
|
|
|
|
|
|
// Move the compare instruction right before the select instruction. Otherwise
|
|
|
|
// the sext/zext value may be defined after the compare instruction uses it.
|
|
|
|
Cmp.moveBefore(&Sel);
|
|
|
|
|
|
|
|
return true;
|
2016-11-02 01:46:08 +08:00
|
|
|
}
|
|
|
|
|
2017-02-22 03:33:53 +08:00
|
|
|
/// If this is an integer min/max (icmp + select) with a constant operand,
|
|
|
|
/// create the canonical icmp for the min/max operation and canonicalize the
|
|
|
|
/// constant to the 'false' operand of the select:
|
|
|
|
/// select (icmp Pred X, C1), C2, X --> select (icmp Pred' X, C2), X, C2
|
|
|
|
/// Note: if C1 != C2, this will change the icmp constant to the existing
|
|
|
|
/// constant operand of the select.
|
2020-06-03 21:56:40 +08:00
|
|
|
static Instruction *canonicalizeMinMaxWithConstant(SelectInst &Sel,
|
|
|
|
ICmpInst &Cmp,
|
|
|
|
InstCombinerImpl &IC) {
|
2017-02-22 03:33:53 +08:00
|
|
|
if (!Cmp.hasOneUse() || !isa<Constant>(Cmp.getOperand(1)))
|
2016-11-22 06:04:14 +08:00
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Canonicalize the compare predicate based on whether we have min or max.
|
|
|
|
Value *LHS, *RHS;
|
|
|
|
SelectPatternResult SPR = matchSelectPattern(&Sel, LHS, RHS);
|
2018-03-07 03:01:18 +08:00
|
|
|
if (!SelectPatternResult::isMinOrMax(SPR.Flavor))
|
|
|
|
return nullptr;
|
2016-11-22 06:04:14 +08:00
|
|
|
|
2017-02-22 03:33:53 +08:00
|
|
|
// Is this already canonical?
|
2018-03-07 03:01:18 +08:00
|
|
|
ICmpInst::Predicate CanonicalPred = getMinMaxPred(SPR.Flavor);
|
2017-02-22 03:33:53 +08:00
|
|
|
if (Cmp.getOperand(0) == LHS && Cmp.getOperand(1) == RHS &&
|
2018-03-07 03:01:18 +08:00
|
|
|
Cmp.getPredicate() == CanonicalPred)
|
2017-02-22 03:33:53 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2020-02-03 00:40:15 +08:00
|
|
|
// Bail out on unsimplified X-0 operand (due to some worklist management bug),
|
|
|
|
// as this may cause an infinite combine loop. Let the sub be folded first.
|
|
|
|
if (match(LHS, m_Sub(m_Value(), m_Zero())) ||
|
|
|
|
match(RHS, m_Sub(m_Value(), m_Zero())))
|
|
|
|
return nullptr;
|
|
|
|
|
2017-02-22 03:33:53 +08:00
|
|
|
// Create the canonical compare and plug it into the select.
|
2020-02-04 04:17:36 +08:00
|
|
|
IC.replaceOperand(Sel, 0, IC.Builder.CreateICmp(CanonicalPred, LHS, RHS));
|
2016-11-22 06:04:14 +08:00
|
|
|
|
2017-02-22 03:33:53 +08:00
|
|
|
// If the select operands did not change, we're done.
|
|
|
|
if (Sel.getTrueValue() == LHS && Sel.getFalseValue() == RHS)
|
|
|
|
return &Sel;
|
2016-11-22 06:04:14 +08:00
|
|
|
|
2017-02-22 03:33:53 +08:00
|
|
|
// If we are swapping the select operands, swap the metadata too.
|
|
|
|
assert(Sel.getTrueValue() == RHS && Sel.getFalseValue() == LHS &&
|
|
|
|
"Unexpected results from matchSelectPattern");
|
2019-08-01 20:31:35 +08:00
|
|
|
Sel.swapValues();
|
2017-02-22 03:33:53 +08:00
|
|
|
Sel.swapProfMetadata();
|
|
|
|
return &Sel;
|
2016-11-22 06:04:14 +08:00
|
|
|
}
|
|
|
|
|
2020-09-18 15:27:56 +08:00
|
|
|
/// There are many select variants for each of ABS/NABS.
|
|
|
|
/// In matchSelectPattern(), there are different compare constants, compare
|
|
|
|
/// predicates/operands and select operands.
|
|
|
|
/// In isKnownNegation(), there are different formats of negated operands.
|
|
|
|
/// Canonicalize all these variants to 1 pattern.
|
|
|
|
/// This makes CSE more likely.
|
2018-05-20 22:23:23 +08:00
|
|
|
static Instruction *canonicalizeAbsNabs(SelectInst &Sel, ICmpInst &Cmp,
|
2020-06-03 21:56:40 +08:00
|
|
|
InstCombinerImpl &IC) {
|
2018-05-20 22:23:23 +08:00
|
|
|
if (!Cmp.hasOneUse() || !isa<Constant>(Cmp.getOperand(1)))
|
|
|
|
return nullptr;
|
|
|
|
|
2020-09-18 15:27:56 +08:00
|
|
|
// Choose a sign-bit check for the compare (likely simpler for codegen).
|
|
|
|
// ABS: (X <s 0) ? -X : X
|
|
|
|
// NABS: (X <s 0) ? X : -X
|
2018-05-20 22:23:23 +08:00
|
|
|
Value *LHS, *RHS;
|
|
|
|
SelectPatternFlavor SPF = matchSelectPattern(&Sel, LHS, RHS).Flavor;
|
|
|
|
if (SPF != SelectPatternFlavor::SPF_ABS &&
|
|
|
|
SPF != SelectPatternFlavor::SPF_NABS)
|
|
|
|
return nullptr;
|
2018-07-27 09:49:51 +08:00
|
|
|
|
2020-09-18 15:27:56 +08:00
|
|
|
Value *TVal = Sel.getTrueValue();
|
|
|
|
Value *FVal = Sel.getFalseValue();
|
|
|
|
assert(isKnownNegation(TVal, FVal) &&
|
|
|
|
"Unexpected result from matchSelectPattern");
|
2018-07-27 09:49:51 +08:00
|
|
|
|
2020-09-18 15:27:56 +08:00
|
|
|
// The compare may use the negated abs()/nabs() operand, or it may use
|
|
|
|
// negation in non-canonical form such as: sub A, B.
|
|
|
|
bool CmpUsesNegatedOp = match(Cmp.getOperand(0), m_Neg(m_Specific(TVal))) ||
|
|
|
|
match(Cmp.getOperand(0), m_Neg(m_Specific(FVal)));
|
2018-07-27 09:49:51 +08:00
|
|
|
|
2020-09-18 15:27:56 +08:00
|
|
|
bool CmpCanonicalized = !CmpUsesNegatedOp &&
|
|
|
|
match(Cmp.getOperand(1), m_ZeroInt()) &&
|
|
|
|
Cmp.getPredicate() == ICmpInst::ICMP_SLT;
|
|
|
|
bool RHSCanonicalized = match(RHS, m_Neg(m_Specific(LHS)));
|
|
|
|
|
|
|
|
// Is this already canonical?
|
|
|
|
if (CmpCanonicalized && RHSCanonicalized)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// If RHS is not canonical but is used by other instructions, don't
|
|
|
|
// canonicalize it and potentially increase the instruction count.
|
|
|
|
if (!RHSCanonicalized)
|
|
|
|
if (!(RHS->hasOneUse() || (RHS->hasNUses(2) && CmpUsesNegatedOp)))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Create the canonical compare: icmp slt LHS 0.
|
|
|
|
if (!CmpCanonicalized) {
|
|
|
|
Cmp.setPredicate(ICmpInst::ICMP_SLT);
|
|
|
|
Cmp.setOperand(1, ConstantInt::getNullValue(Cmp.getOperand(0)->getType()));
|
|
|
|
if (CmpUsesNegatedOp)
|
|
|
|
Cmp.setOperand(0, LHS);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Create the canonical RHS: RHS = sub (0, LHS).
|
|
|
|
if (!RHSCanonicalized) {
|
|
|
|
assert(RHS->hasOneUse() && "RHS use number is not right");
|
|
|
|
RHS = IC.Builder.CreateNeg(LHS);
|
|
|
|
if (TVal == LHS) {
|
|
|
|
// Replace false value.
|
|
|
|
IC.replaceOperand(Sel, 2, RHS);
|
|
|
|
FVal = RHS;
|
|
|
|
} else {
|
|
|
|
// Replace true value.
|
|
|
|
IC.replaceOperand(Sel, 1, RHS);
|
|
|
|
TVal = RHS;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// If the select operands do not change, we're done.
|
|
|
|
if (SPF == SelectPatternFlavor::SPF_NABS) {
|
|
|
|
if (TVal == LHS)
|
|
|
|
return &Sel;
|
|
|
|
assert(FVal == LHS && "Unexpected results from matchSelectPattern");
|
|
|
|
} else {
|
|
|
|
if (FVal == LHS)
|
|
|
|
return &Sel;
|
|
|
|
assert(TVal == LHS && "Unexpected results from matchSelectPattern");
|
|
|
|
}
|
|
|
|
|
|
|
|
// We are swapping the select operands, so swap the metadata too.
|
|
|
|
Sel.swapValues();
|
|
|
|
Sel.swapProfMetadata();
|
|
|
|
return &Sel;
|
2018-05-20 22:23:23 +08:00
|
|
|
}
|
|
|
|
|
2019-08-03 01:39:32 +08:00
|
|
|
/// If we have a select with an equality comparison, then we know the value in
|
|
|
|
/// one of the arms of the select. See if substituting this value into an arm
|
|
|
|
/// and simplifying the result yields the same value as the other arm.
|
|
|
|
///
|
|
|
|
/// To make this transform safe, we must drop poison-generating flags
|
|
|
|
/// (nsw, etc) if we simplified to a binop because the select may be guarding
|
|
|
|
/// that poison from propagating. If the existing binop already had no
|
|
|
|
/// poison-generating flags, then this transform can be done by instsimplify.
|
|
|
|
///
|
|
|
|
/// Consider:
|
|
|
|
/// %cmp = icmp eq i32 %x, 2147483647
|
|
|
|
/// %add = add nsw i32 %x, 1
|
|
|
|
/// %sel = select i1 %cmp, i32 -2147483648, i32 %add
|
|
|
|
///
|
|
|
|
/// We can't replace %sel with %add unless we strip away the flags.
|
2019-09-22 22:31:53 +08:00
|
|
|
/// TODO: Wrapping flags could be preserved in some cases with better analysis.
|
2020-10-02 02:57:09 +08:00
|
|
|
Instruction *InstCombinerImpl::foldSelectValueEquivalence(SelectInst &Sel,
|
|
|
|
ICmpInst &Cmp) {
|
2019-08-03 01:39:32 +08:00
|
|
|
if (!Cmp.isEquality())
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Canonicalize the pattern to ICMP_EQ by swapping the select operands.
|
|
|
|
Value *TrueVal = Sel.getTrueValue(), *FalseVal = Sel.getFalseValue();
|
2020-09-11 00:45:53 +08:00
|
|
|
bool Swapped = false;
|
|
|
|
if (Cmp.getPredicate() == ICmpInst::ICMP_NE) {
|
2019-08-03 01:39:32 +08:00
|
|
|
std::swap(TrueVal, FalseVal);
|
2020-09-11 00:45:53 +08:00
|
|
|
Swapped = true;
|
|
|
|
}
|
|
|
|
|
2020-10-02 02:57:09 +08:00
|
|
|
// In X == Y ? f(X) : Z, try to evaluate f(Y) and replace the operand.
|
|
|
|
// Make sure Y cannot be undef though, as we might pick different values for
|
|
|
|
// undef in the icmp and in f(Y). Additionally, take care to avoid replacing
|
|
|
|
// X == Y ? X : Z with X == Y ? Y : Z, as that would lead to an infinite
|
|
|
|
// replacement cycle.
|
2020-09-11 00:45:53 +08:00
|
|
|
Value *CmpLHS = Cmp.getOperand(0), *CmpRHS = Cmp.getOperand(1);
|
2020-10-12 15:23:18 +08:00
|
|
|
if (TrueVal != CmpLHS &&
|
|
|
|
isGuaranteedNotToBeUndefOrPoison(CmpRHS, SQ.AC, &Sel, &DT))
|
2020-10-02 02:57:09 +08:00
|
|
|
if (Value *V = SimplifyWithOpReplaced(TrueVal, CmpLHS, CmpRHS, SQ,
|
2020-09-11 00:45:53 +08:00
|
|
|
/* AllowRefinement */ true))
|
2020-10-02 02:57:09 +08:00
|
|
|
return replaceOperand(Sel, Swapped ? 2 : 1, V);
|
2020-10-12 15:23:18 +08:00
|
|
|
if (TrueVal != CmpRHS &&
|
|
|
|
isGuaranteedNotToBeUndefOrPoison(CmpLHS, SQ.AC, &Sel, &DT))
|
2020-10-02 02:57:09 +08:00
|
|
|
if (Value *V = SimplifyWithOpReplaced(TrueVal, CmpRHS, CmpLHS, SQ,
|
2020-09-11 00:45:53 +08:00
|
|
|
/* AllowRefinement */ true))
|
2020-10-02 02:57:09 +08:00
|
|
|
return replaceOperand(Sel, Swapped ? 2 : 1, V);
|
2019-08-03 01:39:32 +08:00
|
|
|
|
2020-09-10 18:19:16 +08:00
|
|
|
auto *FalseInst = dyn_cast<Instruction>(FalseVal);
|
|
|
|
if (!FalseInst)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// InstSimplify already performed this fold if it was possible subject to
|
|
|
|
// current poison-generating flags. Try the transform again with
|
|
|
|
// poison-generating flags temporarily dropped.
|
2020-10-06 03:13:02 +08:00
|
|
|
bool WasNUW = false, WasNSW = false, WasExact = false, WasInBounds = false;
|
2020-09-10 18:19:16 +08:00
|
|
|
if (auto *OBO = dyn_cast<OverflowingBinaryOperator>(FalseVal)) {
|
|
|
|
WasNUW = OBO->hasNoUnsignedWrap();
|
|
|
|
WasNSW = OBO->hasNoSignedWrap();
|
|
|
|
FalseInst->setHasNoUnsignedWrap(false);
|
|
|
|
FalseInst->setHasNoSignedWrap(false);
|
|
|
|
}
|
|
|
|
if (auto *PEO = dyn_cast<PossiblyExactOperator>(FalseVal)) {
|
|
|
|
WasExact = PEO->isExact();
|
|
|
|
FalseInst->setIsExact(false);
|
|
|
|
}
|
2020-10-06 03:13:02 +08:00
|
|
|
if (auto *GEP = dyn_cast<GetElementPtrInst>(FalseVal)) {
|
|
|
|
WasInBounds = GEP->isInBounds();
|
|
|
|
GEP->setIsInBounds(false);
|
|
|
|
}
|
2020-09-10 18:19:16 +08:00
|
|
|
|
2019-08-03 01:39:32 +08:00
|
|
|
// Try each equivalence substitution possibility.
|
|
|
|
// We have an 'EQ' comparison, so the select's false value will propagate.
|
|
|
|
// Example:
|
|
|
|
// (X == 42) ? 43 : (X + 1) --> (X == 42) ? (X + 1) : (X + 1) --> X + 1
|
2020-10-02 02:57:09 +08:00
|
|
|
if (SimplifyWithOpReplaced(FalseVal, CmpLHS, CmpRHS, SQ,
|
2020-09-10 18:19:16 +08:00
|
|
|
/* AllowRefinement */ false) == TrueVal ||
|
2020-10-02 02:57:09 +08:00
|
|
|
SimplifyWithOpReplaced(FalseVal, CmpRHS, CmpLHS, SQ,
|
2020-09-10 18:19:16 +08:00
|
|
|
/* AllowRefinement */ false) == TrueVal) {
|
2020-10-02 02:57:09 +08:00
|
|
|
return replaceInstUsesWith(Sel, FalseVal);
|
2019-08-03 01:39:32 +08:00
|
|
|
}
|
2020-09-10 18:19:16 +08:00
|
|
|
|
|
|
|
// Restore poison-generating flags if the transform did not apply.
|
|
|
|
if (WasNUW)
|
|
|
|
FalseInst->setHasNoUnsignedWrap();
|
|
|
|
if (WasNSW)
|
|
|
|
FalseInst->setHasNoSignedWrap();
|
|
|
|
if (WasExact)
|
|
|
|
FalseInst->setIsExact();
|
2020-10-06 03:13:02 +08:00
|
|
|
if (WasInBounds)
|
|
|
|
cast<GetElementPtrInst>(FalseInst)->setIsInBounds();
|
2020-09-10 18:19:16 +08:00
|
|
|
|
2019-08-03 01:39:32 +08:00
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
[InstCombine] Non-canonical clamp-like pattern handling
Summary:
Given a pattern like:
```
%old_cmp1 = icmp slt i32 %x, C2
%old_replacement = select i1 %old_cmp1, i32 %target_low, i32 %target_high
%old_x_offseted = add i32 %x, C1
%old_cmp0 = icmp ult i32 %old_x_offseted, C0
%r = select i1 %old_cmp0, i32 %x, i32 %old_replacement
```
it can be rewritten as more canonical pattern:
```
%new_cmp1 = icmp slt i32 %x, -C1
%new_cmp2 = icmp sge i32 %x, C0-C1
%new_clamped_low = select i1 %new_cmp1, i32 %target_low, i32 %x
%r = select i1 %new_cmp2, i32 %target_high, i32 %new_clamped_low
```
Iff `-C1 s<= C2 s<= C0-C1`
Also, `ULT` predicate can also be `UGE`; or `UGT` iff `C0 != -1` (+invert result)
Also, `SLT` predicate can also be `SGE`; or `SGT` iff `C2 != INT_MAX` (+invert result)
If `C1 == 0`, then all 3 instructions must be one-use; else at most either `%old_cmp1` or `%old_x_offseted` can have extra uses.
NOTE: if we could reuse `%old_cmp1` as one of the comparisons we'll have to build, this could be less limiting.
So there are two icmp's, each one with 3 predicate variants, so there are 9 fold variants:
| | ULT | UGE | UGT |
| SLT | https://rise4fun.com/Alive/yIJ | https://rise4fun.com/Alive/5BfN | https://rise4fun.com/Alive/INH |
| SGE | https://rise4fun.com/Alive/hd8 | https://rise4fun.com/Alive/Abk | https://rise4fun.com/Alive/PlzS |
| SGT | https://rise4fun.com/Alive/VYG | https://rise4fun.com/Alive/oMY | https://rise4fun.com/Alive/KrzC |
{F9730206}
This fold was brought up in https://reviews.llvm.org/D65148#1603922 by @dmgreen, and is needed to unblock that patch.
This patch requires D65530.
Reviewers: spatel, nikic, xbolva00, dmgreen
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits, dmgreen
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65765
llvm-svn: 368687
2019-08-13 20:49:28 +08:00
|
|
|
// See if this is a pattern like:
|
|
|
|
// %old_cmp1 = icmp slt i32 %x, C2
|
|
|
|
// %old_replacement = select i1 %old_cmp1, i32 %target_low, i32 %target_high
|
|
|
|
// %old_x_offseted = add i32 %x, C1
|
|
|
|
// %old_cmp0 = icmp ult i32 %old_x_offseted, C0
|
|
|
|
// %r = select i1 %old_cmp0, i32 %x, i32 %old_replacement
|
|
|
|
// This can be rewritten as more canonical pattern:
|
|
|
|
// %new_cmp1 = icmp slt i32 %x, -C1
|
|
|
|
// %new_cmp2 = icmp sge i32 %x, C0-C1
|
|
|
|
// %new_clamped_low = select i1 %new_cmp1, i32 %target_low, i32 %x
|
|
|
|
// %r = select i1 %new_cmp2, i32 %target_high, i32 %new_clamped_low
|
|
|
|
// Iff -C1 s<= C2 s<= C0-C1
|
|
|
|
// Also ULT predicate can also be UGT iff C0 != -1 (+invert result)
|
|
|
|
// SLT predicate can also be SGT iff C2 != INT_MAX (+invert res.)
|
|
|
|
static Instruction *canonicalizeClampLike(SelectInst &Sel0, ICmpInst &Cmp0,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
Value *X = Sel0.getTrueValue();
|
|
|
|
Value *Sel1 = Sel0.getFalseValue();
|
|
|
|
|
|
|
|
// First match the condition of the outermost select.
|
|
|
|
// Said condition must be one-use.
|
|
|
|
if (!Cmp0.hasOneUse())
|
|
|
|
return nullptr;
|
|
|
|
Value *Cmp00 = Cmp0.getOperand(0);
|
|
|
|
Constant *C0;
|
|
|
|
if (!match(Cmp0.getOperand(1),
|
|
|
|
m_CombineAnd(m_AnyIntegralConstant(), m_Constant(C0))))
|
|
|
|
return nullptr;
|
|
|
|
// Canonicalize Cmp0 into the form we expect.
|
|
|
|
// FIXME: we shouldn't care about lanes that are 'undef' in the end?
|
|
|
|
switch (Cmp0.getPredicate()) {
|
|
|
|
case ICmpInst::Predicate::ICMP_ULT:
|
|
|
|
break; // Great!
|
|
|
|
case ICmpInst::Predicate::ICMP_ULE:
|
|
|
|
// We'd have to increment C0 by one, and for that it must not have all-ones
|
|
|
|
// element, but then it would have been canonicalized to 'ult' before
|
|
|
|
// we get here. So we can't do anything useful with 'ule'.
|
|
|
|
return nullptr;
|
|
|
|
case ICmpInst::Predicate::ICMP_UGT:
|
|
|
|
// We want to canonicalize it to 'ult', so we'll need to increment C0,
|
|
|
|
// which again means it must not have any all-ones elements.
|
|
|
|
if (!match(C0,
|
|
|
|
m_SpecificInt_ICMP(ICmpInst::Predicate::ICMP_NE,
|
|
|
|
APInt::getAllOnesValue(
|
|
|
|
C0->getType()->getScalarSizeInBits()))))
|
|
|
|
return nullptr; // Can't do, have all-ones element[s].
|
2020-06-03 21:56:40 +08:00
|
|
|
C0 = InstCombiner::AddOne(C0);
|
[InstCombine] Non-canonical clamp-like pattern handling
Summary:
Given a pattern like:
```
%old_cmp1 = icmp slt i32 %x, C2
%old_replacement = select i1 %old_cmp1, i32 %target_low, i32 %target_high
%old_x_offseted = add i32 %x, C1
%old_cmp0 = icmp ult i32 %old_x_offseted, C0
%r = select i1 %old_cmp0, i32 %x, i32 %old_replacement
```
it can be rewritten as more canonical pattern:
```
%new_cmp1 = icmp slt i32 %x, -C1
%new_cmp2 = icmp sge i32 %x, C0-C1
%new_clamped_low = select i1 %new_cmp1, i32 %target_low, i32 %x
%r = select i1 %new_cmp2, i32 %target_high, i32 %new_clamped_low
```
Iff `-C1 s<= C2 s<= C0-C1`
Also, `ULT` predicate can also be `UGE`; or `UGT` iff `C0 != -1` (+invert result)
Also, `SLT` predicate can also be `SGE`; or `SGT` iff `C2 != INT_MAX` (+invert result)
If `C1 == 0`, then all 3 instructions must be one-use; else at most either `%old_cmp1` or `%old_x_offseted` can have extra uses.
NOTE: if we could reuse `%old_cmp1` as one of the comparisons we'll have to build, this could be less limiting.
So there are two icmp's, each one with 3 predicate variants, so there are 9 fold variants:
| | ULT | UGE | UGT |
| SLT | https://rise4fun.com/Alive/yIJ | https://rise4fun.com/Alive/5BfN | https://rise4fun.com/Alive/INH |
| SGE | https://rise4fun.com/Alive/hd8 | https://rise4fun.com/Alive/Abk | https://rise4fun.com/Alive/PlzS |
| SGT | https://rise4fun.com/Alive/VYG | https://rise4fun.com/Alive/oMY | https://rise4fun.com/Alive/KrzC |
{F9730206}
This fold was brought up in https://reviews.llvm.org/D65148#1603922 by @dmgreen, and is needed to unblock that patch.
This patch requires D65530.
Reviewers: spatel, nikic, xbolva00, dmgreen
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits, dmgreen
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65765
llvm-svn: 368687
2019-08-13 20:49:28 +08:00
|
|
|
std::swap(X, Sel1);
|
|
|
|
break;
|
|
|
|
case ICmpInst::Predicate::ICMP_UGE:
|
|
|
|
// The only way we'd get this predicate if this `icmp` has extra uses,
|
|
|
|
// but then we won't be able to do this fold.
|
|
|
|
return nullptr;
|
|
|
|
default:
|
|
|
|
return nullptr; // Unknown predicate.
|
|
|
|
}
|
|
|
|
|
|
|
|
// Now that we've canonicalized the ICmp, we know the X we expect;
|
|
|
|
// the select in other hand should be one-use.
|
|
|
|
if (!Sel1->hasOneUse())
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// We now can finish matching the condition of the outermost select:
|
|
|
|
// it should either be the X itself, or an addition of some constant to X.
|
|
|
|
Constant *C1;
|
|
|
|
if (Cmp00 == X)
|
|
|
|
C1 = ConstantInt::getNullValue(Sel0.getType());
|
|
|
|
else if (!match(Cmp00,
|
|
|
|
m_Add(m_Specific(X),
|
|
|
|
m_CombineAnd(m_AnyIntegralConstant(), m_Constant(C1)))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Value *Cmp1;
|
|
|
|
ICmpInst::Predicate Pred1;
|
|
|
|
Constant *C2;
|
|
|
|
Value *ReplacementLow, *ReplacementHigh;
|
|
|
|
if (!match(Sel1, m_Select(m_Value(Cmp1), m_Value(ReplacementLow),
|
|
|
|
m_Value(ReplacementHigh))) ||
|
|
|
|
!match(Cmp1,
|
|
|
|
m_ICmp(Pred1, m_Specific(X),
|
|
|
|
m_CombineAnd(m_AnyIntegralConstant(), m_Constant(C2)))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
if (!Cmp1->hasOneUse() && (Cmp00 == X || !Cmp00->hasOneUse()))
|
|
|
|
return nullptr; // Not enough one-use instructions for the fold.
|
|
|
|
// FIXME: this restriction could be relaxed if Cmp1 can be reused as one of
|
|
|
|
// two comparisons we'll need to build.
|
|
|
|
|
|
|
|
// Canonicalize Cmp1 into the form we expect.
|
|
|
|
// FIXME: we shouldn't care about lanes that are 'undef' in the end?
|
|
|
|
switch (Pred1) {
|
|
|
|
case ICmpInst::Predicate::ICMP_SLT:
|
|
|
|
break;
|
|
|
|
case ICmpInst::Predicate::ICMP_SLE:
|
|
|
|
// We'd have to increment C2 by one, and for that it must not have signed
|
|
|
|
// max element, but then it would have been canonicalized to 'slt' before
|
|
|
|
// we get here. So we can't do anything useful with 'sle'.
|
|
|
|
return nullptr;
|
|
|
|
case ICmpInst::Predicate::ICMP_SGT:
|
|
|
|
// We want to canonicalize it to 'slt', so we'll need to increment C2,
|
|
|
|
// which again means it must not have any signed max elements.
|
|
|
|
if (!match(C2,
|
|
|
|
m_SpecificInt_ICMP(ICmpInst::Predicate::ICMP_NE,
|
|
|
|
APInt::getSignedMaxValue(
|
|
|
|
C2->getType()->getScalarSizeInBits()))))
|
|
|
|
return nullptr; // Can't do, have signed max element[s].
|
2020-06-03 21:56:40 +08:00
|
|
|
C2 = InstCombiner::AddOne(C2);
|
[InstCombine] Non-canonical clamp-like pattern handling
Summary:
Given a pattern like:
```
%old_cmp1 = icmp slt i32 %x, C2
%old_replacement = select i1 %old_cmp1, i32 %target_low, i32 %target_high
%old_x_offseted = add i32 %x, C1
%old_cmp0 = icmp ult i32 %old_x_offseted, C0
%r = select i1 %old_cmp0, i32 %x, i32 %old_replacement
```
it can be rewritten as more canonical pattern:
```
%new_cmp1 = icmp slt i32 %x, -C1
%new_cmp2 = icmp sge i32 %x, C0-C1
%new_clamped_low = select i1 %new_cmp1, i32 %target_low, i32 %x
%r = select i1 %new_cmp2, i32 %target_high, i32 %new_clamped_low
```
Iff `-C1 s<= C2 s<= C0-C1`
Also, `ULT` predicate can also be `UGE`; or `UGT` iff `C0 != -1` (+invert result)
Also, `SLT` predicate can also be `SGE`; or `SGT` iff `C2 != INT_MAX` (+invert result)
If `C1 == 0`, then all 3 instructions must be one-use; else at most either `%old_cmp1` or `%old_x_offseted` can have extra uses.
NOTE: if we could reuse `%old_cmp1` as one of the comparisons we'll have to build, this could be less limiting.
So there are two icmp's, each one with 3 predicate variants, so there are 9 fold variants:
| | ULT | UGE | UGT |
| SLT | https://rise4fun.com/Alive/yIJ | https://rise4fun.com/Alive/5BfN | https://rise4fun.com/Alive/INH |
| SGE | https://rise4fun.com/Alive/hd8 | https://rise4fun.com/Alive/Abk | https://rise4fun.com/Alive/PlzS |
| SGT | https://rise4fun.com/Alive/VYG | https://rise4fun.com/Alive/oMY | https://rise4fun.com/Alive/KrzC |
{F9730206}
This fold was brought up in https://reviews.llvm.org/D65148#1603922 by @dmgreen, and is needed to unblock that patch.
This patch requires D65530.
Reviewers: spatel, nikic, xbolva00, dmgreen
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits, dmgreen
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65765
llvm-svn: 368687
2019-08-13 20:49:28 +08:00
|
|
|
LLVM_FALLTHROUGH;
|
|
|
|
case ICmpInst::Predicate::ICMP_SGE:
|
|
|
|
// Also non-canonical, but here we don't need to change C2,
|
|
|
|
// so we don't have any restrictions on C2, so we can just handle it.
|
|
|
|
std::swap(ReplacementLow, ReplacementHigh);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return nullptr; // Unknown predicate.
|
|
|
|
}
|
|
|
|
|
|
|
|
// The thresholds of this clamp-like pattern.
|
|
|
|
auto *ThresholdLowIncl = ConstantExpr::getNeg(C1);
|
|
|
|
auto *ThresholdHighExcl = ConstantExpr::getSub(C0, C1);
|
|
|
|
|
|
|
|
// The fold has a precondition 1: C2 s>= ThresholdLow
|
|
|
|
auto *Precond1 = ConstantExpr::getICmp(ICmpInst::Predicate::ICMP_SGE, C2,
|
|
|
|
ThresholdLowIncl);
|
|
|
|
if (!match(Precond1, m_One()))
|
|
|
|
return nullptr;
|
|
|
|
// The fold has a precondition 2: C2 s<= ThresholdHigh
|
|
|
|
auto *Precond2 = ConstantExpr::getICmp(ICmpInst::Predicate::ICMP_SLE, C2,
|
|
|
|
ThresholdHighExcl);
|
|
|
|
if (!match(Precond2, m_One()))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// All good, finally emit the new pattern.
|
|
|
|
Value *ShouldReplaceLow = Builder.CreateICmpSLT(X, ThresholdLowIncl);
|
|
|
|
Value *ShouldReplaceHigh = Builder.CreateICmpSGE(X, ThresholdHighExcl);
|
|
|
|
Value *MaybeReplacedLow =
|
|
|
|
Builder.CreateSelect(ShouldReplaceLow, ReplacementLow, X);
|
|
|
|
Instruction *MaybeReplacedHigh =
|
|
|
|
SelectInst::Create(ShouldReplaceHigh, ReplacementHigh, MaybeReplacedLow);
|
|
|
|
|
|
|
|
return MaybeReplacedHigh;
|
|
|
|
}
|
|
|
|
|
[InstCombine] Try to reuse constant from select in leading comparison
Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
2019-08-24 14:49:25 +08:00
|
|
|
// If we have
|
|
|
|
// %cmp = icmp [canonical predicate] i32 %x, C0
|
|
|
|
// %r = select i1 %cmp, i32 %y, i32 C1
|
|
|
|
// Where C0 != C1 and %x may be different from %y, see if the constant that we
|
|
|
|
// will have if we flip the strictness of the predicate (i.e. without changing
|
|
|
|
// the result) is identical to the C1 in select. If it matches we can change
|
|
|
|
// original comparison to one with swapped predicate, reuse the constant,
|
|
|
|
// and swap the hands of select.
|
|
|
|
static Instruction *
|
|
|
|
tryToReuseConstantFromSelectInComparison(SelectInst &Sel, ICmpInst &Cmp,
|
2020-06-03 21:56:40 +08:00
|
|
|
InstCombinerImpl &IC) {
|
[InstCombine] Try to reuse constant from select in leading comparison
Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
2019-08-24 14:49:25 +08:00
|
|
|
ICmpInst::Predicate Pred;
|
|
|
|
Value *X;
|
|
|
|
Constant *C0;
|
|
|
|
if (!match(&Cmp, m_OneUse(m_ICmp(
|
|
|
|
Pred, m_Value(X),
|
|
|
|
m_CombineAnd(m_AnyIntegralConstant(), m_Constant(C0))))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// If comparison predicate is non-relational, we won't be able to do anything.
|
|
|
|
if (ICmpInst::isEquality(Pred))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// If comparison predicate is non-canonical, then we certainly won't be able
|
|
|
|
// to make it canonical; canonicalizeCmpWithConstant() already tried.
|
2020-06-03 21:56:40 +08:00
|
|
|
if (!InstCombiner::isCanonicalPredicate(Pred))
|
[InstCombine] Try to reuse constant from select in leading comparison
Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
2019-08-24 14:49:25 +08:00
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// If the [input] type of comparison and select type are different, lets abort
|
|
|
|
// for now. We could try to compare constants with trunc/[zs]ext though.
|
|
|
|
if (C0->getType() != Sel.getType())
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// FIXME: are there any magic icmp predicate+constant pairs we must not touch?
|
|
|
|
|
|
|
|
Value *SelVal0, *SelVal1; // We do not care which one is from where.
|
|
|
|
match(&Sel, m_Select(m_Value(), m_Value(SelVal0), m_Value(SelVal1)));
|
|
|
|
// At least one of these values we are selecting between must be a constant
|
|
|
|
// else we'll never succeed.
|
|
|
|
if (!match(SelVal0, m_AnyIntegralConstant()) &&
|
|
|
|
!match(SelVal1, m_AnyIntegralConstant()))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Does this constant C match any of the `select` values?
|
2019-08-24 14:49:51 +08:00
|
|
|
auto MatchesSelectValue = [SelVal0, SelVal1](Constant *C) {
|
|
|
|
return C->isElementWiseEqual(SelVal0) || C->isElementWiseEqual(SelVal1);
|
[InstCombine] Try to reuse constant from select in leading comparison
Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
2019-08-24 14:49:25 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
// If C0 *already* matches true/false value of select, we are done.
|
|
|
|
if (MatchesSelectValue(C0))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Check the constant we'd have with flipped-strictness predicate.
|
2020-06-03 21:56:40 +08:00
|
|
|
auto FlippedStrictness =
|
|
|
|
InstCombiner::getFlippedStrictnessPredicateAndConstant(Pred, C0);
|
[InstCombine] Try to reuse constant from select in leading comparison
Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
2019-08-24 14:49:25 +08:00
|
|
|
if (!FlippedStrictness)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// If said constant doesn't match either, then there is no hope,
|
|
|
|
if (!MatchesSelectValue(FlippedStrictness->second))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// It matched! Lets insert the new comparison just before select.
|
2020-02-04 04:17:36 +08:00
|
|
|
InstCombiner::BuilderTy::InsertPointGuard Guard(IC.Builder);
|
|
|
|
IC.Builder.SetInsertPoint(&Sel);
|
[InstCombine] Try to reuse constant from select in leading comparison
Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
2019-08-24 14:49:25 +08:00
|
|
|
|
|
|
|
Pred = ICmpInst::getSwappedPredicate(Pred); // Yes, swapped.
|
2020-02-04 04:17:36 +08:00
|
|
|
Value *NewCmp = IC.Builder.CreateICmp(Pred, X, FlippedStrictness->second,
|
|
|
|
Cmp.getName() + ".inv");
|
|
|
|
IC.replaceOperand(Sel, 0, NewCmp);
|
[InstCombine] Try to reuse constant from select in leading comparison
Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
2019-08-24 14:49:25 +08:00
|
|
|
Sel.swapValues();
|
|
|
|
Sel.swapProfMetadata();
|
|
|
|
|
|
|
|
return &Sel;
|
|
|
|
}
|
|
|
|
|
2016-11-02 01:46:08 +08:00
|
|
|
/// Visit a SelectInst that has an ICmpInst as its first operand.
|
2020-06-03 21:56:40 +08:00
|
|
|
Instruction *InstCombinerImpl::foldSelectInstWithICmp(SelectInst &SI,
|
|
|
|
ICmpInst *ICI) {
|
2020-10-02 02:57:09 +08:00
|
|
|
if (Instruction *NewSel = foldSelectValueEquivalence(SI, *ICI))
|
2020-09-11 00:45:53 +08:00
|
|
|
return NewSel;
|
2017-08-04 13:12:37 +08:00
|
|
|
|
2020-02-04 04:17:36 +08:00
|
|
|
if (Instruction *NewSel = canonicalizeMinMaxWithConstant(SI, *ICI, *this))
|
2016-11-22 06:04:14 +08:00
|
|
|
return NewSel;
|
|
|
|
|
2020-03-29 23:08:04 +08:00
|
|
|
if (Instruction *NewAbs = canonicalizeAbsNabs(SI, *ICI, *this))
|
2018-05-20 22:23:23 +08:00
|
|
|
return NewAbs;
|
|
|
|
|
[InstCombine] Non-canonical clamp-like pattern handling
Summary:
Given a pattern like:
```
%old_cmp1 = icmp slt i32 %x, C2
%old_replacement = select i1 %old_cmp1, i32 %target_low, i32 %target_high
%old_x_offseted = add i32 %x, C1
%old_cmp0 = icmp ult i32 %old_x_offseted, C0
%r = select i1 %old_cmp0, i32 %x, i32 %old_replacement
```
it can be rewritten as more canonical pattern:
```
%new_cmp1 = icmp slt i32 %x, -C1
%new_cmp2 = icmp sge i32 %x, C0-C1
%new_clamped_low = select i1 %new_cmp1, i32 %target_low, i32 %x
%r = select i1 %new_cmp2, i32 %target_high, i32 %new_clamped_low
```
Iff `-C1 s<= C2 s<= C0-C1`
Also, `ULT` predicate can also be `UGE`; or `UGT` iff `C0 != -1` (+invert result)
Also, `SLT` predicate can also be `SGE`; or `SGT` iff `C2 != INT_MAX` (+invert result)
If `C1 == 0`, then all 3 instructions must be one-use; else at most either `%old_cmp1` or `%old_x_offseted` can have extra uses.
NOTE: if we could reuse `%old_cmp1` as one of the comparisons we'll have to build, this could be less limiting.
So there are two icmp's, each one with 3 predicate variants, so there are 9 fold variants:
| | ULT | UGE | UGT |
| SLT | https://rise4fun.com/Alive/yIJ | https://rise4fun.com/Alive/5BfN | https://rise4fun.com/Alive/INH |
| SGE | https://rise4fun.com/Alive/hd8 | https://rise4fun.com/Alive/Abk | https://rise4fun.com/Alive/PlzS |
| SGT | https://rise4fun.com/Alive/VYG | https://rise4fun.com/Alive/oMY | https://rise4fun.com/Alive/KrzC |
{F9730206}
This fold was brought up in https://reviews.llvm.org/D65148#1603922 by @dmgreen, and is needed to unblock that patch.
This patch requires D65530.
Reviewers: spatel, nikic, xbolva00, dmgreen
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits, dmgreen
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D65765
llvm-svn: 368687
2019-08-13 20:49:28 +08:00
|
|
|
if (Instruction *NewAbs = canonicalizeClampLike(SI, *ICI, Builder))
|
|
|
|
return NewAbs;
|
|
|
|
|
[InstCombine] Try to reuse constant from select in leading comparison
Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
2019-08-24 14:49:25 +08:00
|
|
|
if (Instruction *NewSel =
|
2020-02-04 04:17:36 +08:00
|
|
|
tryToReuseConstantFromSelectInComparison(SI, *ICI, *this))
|
[InstCombine] Try to reuse constant from select in leading comparison
Summary:
If we have e.g.:
```
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
```
the constants `65535` and `65536` are suspiciously close.
We could perform a transformation to deduplicate them:
```
Name: ult
%t = icmp ult i32 %x, 65536
%r = select i1 %t, i32 %y, i32 65535
=>
%t.inv = icmp ugt i32 %x, 65535
%r = select i1 %t.inv, i32 65535, i32 %y
```
https://rise4fun.com/Alive/avb
While this may seem esoteric, this should certainly be good for vectors
(less constant pool usage) and for opt-for-size - need to have only one constant.
But the real fun part here is that it allows further transformation,
in particular it finishes cleaning up the `clamp` folding,
see e.g. `canonicalize-clamp-with-select-of-constant-threshold-pattern.ll`.
We start with e.g.
```
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
%clamp_limit = select i1 %dont_need_to_clamp_positive, i32 -32768, i32 32767
%dont_need_to_clamp = and i1 %dont_need_to_clamp_positive, %dont_need_to_clamp_negative
%R = select i1 %dont_need_to_clamp, i32 %X, i32 %clamp_limit
```
without this patch we currently produce
```
%1 = icmp slt i32 %X, 32768
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1, i32 %3, i32 32767
```
which isn't really a `clamp` - both comparisons are performed on the original value,
this patch changes it into
```
%1.inv = icmp sgt i32 %X, 32767
%2 = icmp sgt i32 %X, -32768
%3 = select i1 %2, i32 %X, i32 -32768
%R = select i1 %1.inv, i32 32767, i32 %3
```
and then the magic happens! Some further transform finishes polishing it and we finally get:
```
%t1 = icmp sgt i32 %X, -32768
%t2 = select i1 %t1, i32 %X, i32 -32768
%t3 = icmp slt i32 %t2, 32767
%R = select i1 %t3, i32 %t2, i32 32767
```
which is beautiful and just what we want.
Proofs for `getFlippedStrictnessPredicateAndConstant()` for de-canonicalization:
https://rise4fun.com/Alive/THl
Proofs for the fold itself: https://rise4fun.com/Alive/THl
Reviewers: spatel, dmgreen, nikic, xbolva00
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D66232
llvm-svn: 369840
2019-08-24 14:49:25 +08:00
|
|
|
return NewSel;
|
|
|
|
|
2016-11-02 02:15:03 +08:00
|
|
|
bool Changed = adjustMinMax(SI, *ICI);
|
2016-11-02 01:46:08 +08:00
|
|
|
|
2018-04-26 00:34:01 +08:00
|
|
|
if (Value *V = foldSelectICmpAnd(SI, ICI, Builder))
|
|
|
|
return replaceInstUsesWith(SI, V);
|
2017-08-22 03:02:06 +08:00
|
|
|
|
2011-05-27 21:00:16 +08:00
|
|
|
// NOTE: if we wanted to, this is where to detect integer MIN/MAX
|
2019-08-03 01:39:32 +08:00
|
|
|
Value *TrueVal = SI.getTrueValue();
|
|
|
|
Value *FalseVal = SI.getFalseValue();
|
[InstCombine] refine select-of-constants to bitwise ops
Add logic for the special case when a cmp+select can clearly be
reduced to just a bitwise logic instruction, and remove an
over-reaching chunk of general purpose bit magic. The primary goal
is to remove cases where we are not improving the IR instruction
count when doing these select transforms, and in all cases here that
is true.
In the motivating 3-way compare tests, there are further improvements
because we can combine/propagate select values (not sure if that
belongs in instcombine, but it's there for now).
DAGCombiner has folds to turn some of these selects into bit magic,
so there should be no difference in the end result in those cases.
Not all constant combinations are handled there yet, however, so it
is possible that some targets will see more cmov/csel codegen with
this change in IR canonicalization.
Ideally, we'll go further to *not* turn selects into multiple
logic/math ops in instcombine, and we'll canonicalize to selects.
But we should make sure that this step does not result in regressions
first (and if it does, we should fix those in the backend).
The general direction for this change was discussed here:
http://lists.llvm.org/pipermail/llvm-dev/2016-September/105373.html
http://lists.llvm.org/pipermail/llvm-dev/2017-July/114885.html
Alive proofs for the new bit magic:
https://rise4fun.com/Alive/XG7
Differential Revision: https://reviews.llvm.org/D46086
llvm-svn: 331486
2018-05-04 05:58:44 +08:00
|
|
|
ICmpInst::Predicate Pred = ICI->getPredicate();
|
|
|
|
Value *CmpLHS = ICI->getOperand(0);
|
|
|
|
Value *CmpRHS = ICI->getOperand(1);
|
2012-05-29 03:18:16 +08:00
|
|
|
if (CmpRHS != CmpLHS && isa<Constant>(CmpRHS)) {
|
2011-03-27 15:30:57 +08:00
|
|
|
if (CmpLHS == TrueVal && Pred == ICmpInst::ICMP_EQ) {
|
|
|
|
// Transform (X == C) ? X : Y -> (X == C) ? C : Y
|
|
|
|
SI.setOperand(1, CmpRHS);
|
|
|
|
Changed = true;
|
|
|
|
} else if (CmpLHS == FalseVal && Pred == ICmpInst::ICMP_NE) {
|
|
|
|
// Transform (X != C) ? Y : X -> (X != C) ? Y : C
|
|
|
|
SI.setOperand(2, CmpRHS);
|
|
|
|
Changed = true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-07-21 07:40:01 +08:00
|
|
|
// FIXME: This code is nearly duplicated in InstSimplify. Using/refactoring
|
|
|
|
// decomposeBitTestICmp() might help.
|
2015-06-07 06:40:21 +08:00
|
|
|
{
|
2016-07-21 07:40:01 +08:00
|
|
|
unsigned BitWidth =
|
|
|
|
DL.getTypeSizeInBits(TrueVal->getType()->getScalarType());
|
2017-04-21 00:56:25 +08:00
|
|
|
APInt MinSignedValue = APInt::getSignedMinValue(BitWidth);
|
2014-11-27 15:25:21 +08:00
|
|
|
Value *X;
|
|
|
|
const APInt *Y, *C;
|
2014-12-20 12:45:35 +08:00
|
|
|
bool TrueWhenUnset;
|
|
|
|
bool IsBitTest = false;
|
|
|
|
if (ICmpInst::isEquality(Pred) &&
|
|
|
|
match(CmpLHS, m_And(m_Value(X), m_Power2(Y))) &&
|
2014-11-27 15:25:21 +08:00
|
|
|
match(CmpRHS, m_Zero())) {
|
2014-12-20 12:45:35 +08:00
|
|
|
IsBitTest = true;
|
|
|
|
TrueWhenUnset = Pred == ICmpInst::ICMP_EQ;
|
|
|
|
} else if (Pred == ICmpInst::ICMP_SLT && match(CmpRHS, m_Zero())) {
|
|
|
|
X = CmpLHS;
|
|
|
|
Y = &MinSignedValue;
|
|
|
|
IsBitTest = true;
|
|
|
|
TrueWhenUnset = false;
|
|
|
|
} else if (Pred == ICmpInst::ICMP_SGT && match(CmpRHS, m_AllOnes())) {
|
|
|
|
X = CmpLHS;
|
|
|
|
Y = &MinSignedValue;
|
|
|
|
IsBitTest = true;
|
|
|
|
TrueWhenUnset = true;
|
|
|
|
}
|
|
|
|
if (IsBitTest) {
|
2014-11-27 15:25:21 +08:00
|
|
|
Value *V = nullptr;
|
|
|
|
// (X & Y) == 0 ? X : X ^ Y --> X & ~Y
|
2014-12-20 12:45:35 +08:00
|
|
|
if (TrueWhenUnset && TrueVal == X &&
|
2014-11-27 15:25:21 +08:00
|
|
|
match(FalseVal, m_Xor(m_Specific(X), m_APInt(C))) && *Y == *C)
|
2017-07-08 07:16:26 +08:00
|
|
|
V = Builder.CreateAnd(X, ~(*Y));
|
2014-11-27 15:25:21 +08:00
|
|
|
// (X & Y) != 0 ? X ^ Y : X --> X & ~Y
|
2014-12-20 12:45:35 +08:00
|
|
|
else if (!TrueWhenUnset && FalseVal == X &&
|
2014-11-27 15:25:21 +08:00
|
|
|
match(TrueVal, m_Xor(m_Specific(X), m_APInt(C))) && *Y == *C)
|
2017-07-08 07:16:26 +08:00
|
|
|
V = Builder.CreateAnd(X, ~(*Y));
|
2014-11-27 15:25:21 +08:00
|
|
|
// (X & Y) == 0 ? X ^ Y : X --> X | Y
|
2014-12-20 12:45:35 +08:00
|
|
|
else if (TrueWhenUnset && FalseVal == X &&
|
2014-11-27 15:25:21 +08:00
|
|
|
match(TrueVal, m_Xor(m_Specific(X), m_APInt(C))) && *Y == *C)
|
2017-07-08 07:16:26 +08:00
|
|
|
V = Builder.CreateOr(X, *Y);
|
2014-11-27 15:25:21 +08:00
|
|
|
// (X & Y) != 0 ? X : X ^ Y --> X | Y
|
2014-12-20 12:45:35 +08:00
|
|
|
else if (!TrueWhenUnset && TrueVal == X &&
|
2014-11-27 15:25:21 +08:00
|
|
|
match(FalseVal, m_Xor(m_Specific(X), m_APInt(C))) && *Y == *C)
|
2017-07-08 07:16:26 +08:00
|
|
|
V = Builder.CreateOr(X, *Y);
|
2014-11-27 15:25:21 +08:00
|
|
|
|
|
|
|
if (V)
|
2016-02-02 06:23:39 +08:00
|
|
|
return replaceInstUsesWith(SI, V);
|
2014-11-27 15:25:21 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-04-07 18:37:24 +08:00
|
|
|
if (Instruction *V =
|
|
|
|
foldSelectICmpAndAnd(SI.getType(), ICI, TrueVal, FalseVal, Builder))
|
|
|
|
return V;
|
|
|
|
|
2019-08-27 18:22:40 +08:00
|
|
|
if (Instruction *V = foldSelectCtlzToCttz(ICI, TrueVal, FalseVal, Builder))
|
|
|
|
return V;
|
|
|
|
|
2017-08-29 08:13:49 +08:00
|
|
|
if (Value *V = foldSelectICmpAndOr(ICI, TrueVal, FalseVal, Builder))
|
2016-02-02 06:23:39 +08:00
|
|
|
return replaceInstUsesWith(SI, V);
|
2013-04-30 16:57:58 +08:00
|
|
|
|
[InstCombine] Fold select (icmp sgt x, -1), lshr (X, Y), ashr (X, Y) to ashr (X, Y))
Summary:
(select (icmp sgt x, -1), lshr (X, Y), ashr (X, Y)) -> ashr (X, Y))
(select (icmp slt x, 1), ashr (X, Y), lshr (X, Y)) -> ashr (X, Y))
Fixes PR41173
Alive proof by @lebedev.ri (thanks)
Name: PR41173
%cmp = icmp slt i32 %x, 1
%shr = lshr i32 %x, %y
%shr1 = ashr i32 %x, %y
%retval.0 = select i1 %cmp, i32 %shr1, i32 %shr
=>
%retval.0 = ashr i32 %x, %y
Optimization: PR41173
Done: 1
Optimization is correct!
Reviewers: lebedev.ri, spatel
Reviewed By: lebedev.ri
Subscribers: nikic, craig.topper, llvm-commits, lebedev.ri
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64285
llvm-svn: 365893
2019-07-12 19:31:16 +08:00
|
|
|
if (Value *V = foldSelectICmpLshrAshr(ICI, TrueVal, FalseVal, Builder))
|
|
|
|
return replaceInstUsesWith(SI, V);
|
|
|
|
|
2015-01-27 23:58:14 +08:00
|
|
|
if (Value *V = foldSelectCttzCtlz(ICI, TrueVal, FalseVal, Builder))
|
2016-02-02 06:23:39 +08:00
|
|
|
return replaceInstUsesWith(SI, V);
|
2015-01-27 23:58:14 +08:00
|
|
|
|
2018-02-06 01:53:29 +08:00
|
|
|
if (Value *V = canonicalizeSaturatedSubtract(ICI, TrueVal, FalseVal, Builder))
|
|
|
|
return replaceInstUsesWith(SI, V);
|
|
|
|
|
[InstCombine] canonicalize cmp/select form of uadd saturate with constant
I'm circling back around to a loose end from D51929.
The backend (either CGP or DAG) doesn't recognize this pattern, so we end up with different asm for these IR variants.
Regardless of any future changes to canonicalize to saturation/overflow intrinsics, we want to get raw IR variations
into the minimal number of raw IR forms. If/when we can canonicalize to intrinsics, that will make that step easier.
Pre: C2 == ~C1
%a = add i32 %x, C1
%c = icmp ugt i32 %x, C2
%r = select i1 %c, i32 -1, i32 %a
=>
%a = add i32 %x, C1
%c2 = icmp ult i32 %x, C2
%r = select i1 %c2, i32 %a, i32 -1
https://rise4fun.com/Alive/pkH
Differential Revision: https://reviews.llvm.org/D57352
llvm-svn: 352536
2019-01-30 04:02:45 +08:00
|
|
|
if (Value *V = canonicalizeSaturatedAdd(ICI, TrueVal, FalseVal, Builder))
|
|
|
|
return replaceInstUsesWith(SI, V);
|
|
|
|
|
2014-04-25 13:29:35 +08:00
|
|
|
return Changed ? &SI : nullptr;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
|
2015-09-09 23:24:36 +08:00
|
|
|
/// SI is a select whose condition is a PHI node (but the two may be in
|
|
|
|
/// different blocks). See if the true/false values (V) are live in all of the
|
|
|
|
/// predecessor blocks of the PHI. For example, cases like this can't be mapped:
|
2010-01-05 14:03:12 +08:00
|
|
|
///
|
|
|
|
/// X = phi [ C1, BB1], [C2, BB2]
|
|
|
|
/// Y = add
|
|
|
|
/// Z = select X, Y, 0
|
|
|
|
///
|
|
|
|
/// because Y is not live in BB1/BB2.
|
2016-09-30 06:18:30 +08:00
|
|
|
static bool canSelectOperandBeMappingIntoPredBlock(const Value *V,
|
2010-01-05 14:03:12 +08:00
|
|
|
const SelectInst &SI) {
|
|
|
|
// If the value is a non-instruction value like a constant or argument, it
|
|
|
|
// can always be mapped.
|
|
|
|
const Instruction *I = dyn_cast<Instruction>(V);
|
2014-04-25 13:29:35 +08:00
|
|
|
if (!I) return true;
|
2011-01-08 05:33:13 +08:00
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// If V is a PHI node defined in the same block as the condition PHI, we can
|
|
|
|
// map the arguments.
|
|
|
|
const PHINode *CondPHI = cast<PHINode>(SI.getCondition());
|
2011-01-08 05:33:13 +08:00
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
if (const PHINode *VP = dyn_cast<PHINode>(I))
|
|
|
|
if (VP->getParent() == CondPHI->getParent())
|
|
|
|
return true;
|
2011-01-08 05:33:13 +08:00
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// Otherwise, if the PHI and select are defined in the same block and if V is
|
|
|
|
// defined in a different block, then we can transform it.
|
|
|
|
if (SI.getParent() == CondPHI->getParent() &&
|
|
|
|
I->getParent() != CondPHI->getParent())
|
|
|
|
return true;
|
2011-01-08 05:33:13 +08:00
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// Otherwise we have a 'hard' case and we can't tell without doing more
|
|
|
|
// detailed dominator based analysis, punt.
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2015-09-09 23:24:36 +08:00
|
|
|
/// We have an SPF (e.g. a min or max) of an SPF of the form:
|
2011-01-08 05:33:13 +08:00
|
|
|
/// SPF2(SPF1(A, B), C)
|
2020-06-03 21:56:40 +08:00
|
|
|
Instruction *InstCombinerImpl::foldSPFofSPF(Instruction *Inner,
|
|
|
|
SelectPatternFlavor SPF1, Value *A,
|
|
|
|
Value *B, Instruction &Outer,
|
|
|
|
SelectPatternFlavor SPF2,
|
|
|
|
Value *C) {
|
2016-04-09 00:51:49 +08:00
|
|
|
if (Outer.getType() != Inner->getType())
|
|
|
|
return nullptr;
|
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
if (C == A || C == B) {
|
|
|
|
// MAX(MAX(A, B), B) -> MAX(A, B)
|
|
|
|
// MIN(MIN(a, b), a) -> MIN(a, b)
|
2018-09-14 00:04:06 +08:00
|
|
|
// TODO: This could be done in instsimplify.
|
2018-05-19 05:21:56 +08:00
|
|
|
if (SPF1 == SPF2 && SelectPatternResult::isMinOrMax(SPF1))
|
2016-02-02 06:23:39 +08:00
|
|
|
return replaceInstUsesWith(Outer, Inner);
|
2011-01-08 05:33:13 +08:00
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// MAX(MIN(a, b), a) -> a
|
|
|
|
// MIN(MAX(a, b), a) -> a
|
2018-09-14 00:04:06 +08:00
|
|
|
// TODO: This could be done in instsimplify.
|
2010-01-05 14:03:12 +08:00
|
|
|
if ((SPF1 == SPF_SMIN && SPF2 == SPF_SMAX) ||
|
|
|
|
(SPF1 == SPF_SMAX && SPF2 == SPF_SMIN) ||
|
|
|
|
(SPF1 == SPF_UMIN && SPF2 == SPF_UMAX) ||
|
|
|
|
(SPF1 == SPF_UMAX && SPF2 == SPF_UMIN))
|
2016-02-02 06:23:39 +08:00
|
|
|
return replaceInstUsesWith(Outer, C);
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
2011-01-08 05:33:13 +08:00
|
|
|
|
Added instcombine for 'MIN(MIN(A, 27), 93)' and 'MAX(MAX(A, 93), 27)'
MIN(MIN(A, 23), 97) -> MIN(A, 23)
MAX(MAX(A, 97), 23) -> MAX(A, 97)
Differential Revision: http://reviews.llvm.org/D3629
llvm-svn: 208849
2014-05-15 14:13:40 +08:00
|
|
|
if (SPF1 == SPF2) {
|
2016-10-28 05:19:40 +08:00
|
|
|
const APInt *CB, *CC;
|
|
|
|
if (match(B, m_APInt(CB)) && match(C, m_APInt(CC))) {
|
|
|
|
// MIN(MIN(A, 23), 97) -> MIN(A, 23)
|
|
|
|
// MAX(MAX(A, 97), 23) -> MAX(A, 97)
|
2018-09-14 00:04:06 +08:00
|
|
|
// TODO: This could be done in instsimplify.
|
2016-10-28 05:19:40 +08:00
|
|
|
if ((SPF1 == SPF_UMIN && CB->ule(*CC)) ||
|
|
|
|
(SPF1 == SPF_SMIN && CB->sle(*CC)) ||
|
|
|
|
(SPF1 == SPF_UMAX && CB->uge(*CC)) ||
|
|
|
|
(SPF1 == SPF_SMAX && CB->sge(*CC)))
|
|
|
|
return replaceInstUsesWith(Outer, Inner);
|
|
|
|
|
|
|
|
// MIN(MIN(A, 97), 23) -> MIN(A, 23)
|
|
|
|
// MAX(MAX(A, 23), 97) -> MAX(A, 97)
|
|
|
|
if ((SPF1 == SPF_UMIN && CB->ugt(*CC)) ||
|
|
|
|
(SPF1 == SPF_SMIN && CB->sgt(*CC)) ||
|
|
|
|
(SPF1 == SPF_UMAX && CB->ult(*CC)) ||
|
|
|
|
(SPF1 == SPF_SMAX && CB->slt(*CC))) {
|
|
|
|
Outer.replaceUsesOfWith(Inner, A);
|
|
|
|
return &Outer;
|
Added instcombine for 'MIN(MIN(A, 27), 93)' and 'MAX(MAX(A, 93), 27)'
MIN(MIN(A, 23), 97) -> MIN(A, 23)
MAX(MAX(A, 97), 23) -> MAX(A, 97)
Differential Revision: http://reviews.llvm.org/D3629
llvm-svn: 208849
2014-05-15 14:13:40 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2014-06-06 14:54:45 +08:00
|
|
|
|
[InstCombine] simplify min/max of min/max with same operands (PR35607)
This is the original integer variant requested in:
https://bugs.llvm.org/show_bug.cgi?id=35607
As noted in the TODO and several similar TODOs around this block,
we could do this in instsimplify, but then it would cost more
because we would be trying to match min/max via ValueTracking
in 2 different places.
There are 4 commuted variants for each of smin/smax/umin/umax
that are not matched here. There are also icmp predicate variants
that are not included in the affected test file because they are
already handled by instsimplify by folding the final icmp to
true/false.
https://rise4fun.com/Alive/3KVc
Name: smax(smax, smin)
%c1 = icmp slt i32 %x, %y
%c2 = icmp slt i32 %y, %x
%min = select i1 %c1, i32 %x, i32 %y
%max = select i1 %c2, i32 %x, i32 %y
%c3 = icmp sgt i32 %max, %min
%r = select i1 %c3, i32 %max, i32 %min
=>
%r = %max
Name: smin(smax, smin)
%c1 = icmp slt i32 %x, %y
%c2 = icmp slt i32 %y, %x
%min = select i1 %c1, i32 %x, i32 %y
%max = select i1 %c2, i32 %x, i32 %y
%c3 = icmp sgt i32 %max, %min
%r = select i1 %c3, i32 %min, i32 %max
=>
%r = %min
Name: umax(umax, umin)
%c1 = icmp ult i32 %x, %y
%c2 = icmp ult i32 %y, %x
%min = select i1 %c1, i32 %x, i32 %y
%max = select i1 %c2, i32 %x, i32 %y
%c3 = icmp ult i32 %min, %max
%r = select i1 %c3, i32 %max, i32 %min
=>
%r = %max
Name: umin(umax, umin)
%c1 = icmp ult i32 %x, %y
%c2 = icmp ult i32 %y, %x
%min = select i1 %c1, i32 %x, i32 %y
%max = select i1 %c2, i32 %x, i32 %y
%c3 = icmp ult i32 %min, %max
%r = select i1 %c3, i32 %min, i32 %max
=>
%r = %min
llvm-svn: 369386
2019-08-20 21:39:17 +08:00
|
|
|
// max(max(A, B), min(A, B)) --> max(A, B)
|
|
|
|
// min(min(A, B), max(A, B)) --> min(A, B)
|
|
|
|
// TODO: This could be done in instsimplify.
|
|
|
|
if (SPF1 == SPF2 &&
|
|
|
|
((SPF1 == SPF_UMIN && match(C, m_c_UMax(m_Specific(A), m_Specific(B)))) ||
|
|
|
|
(SPF1 == SPF_SMIN && match(C, m_c_SMax(m_Specific(A), m_Specific(B)))) ||
|
|
|
|
(SPF1 == SPF_UMAX && match(C, m_c_UMin(m_Specific(A), m_Specific(B)))) ||
|
|
|
|
(SPF1 == SPF_SMAX && match(C, m_c_SMin(m_Specific(A), m_Specific(B))))))
|
|
|
|
return replaceInstUsesWith(Outer, Inner);
|
|
|
|
|
2014-06-06 14:54:45 +08:00
|
|
|
// ABS(ABS(X)) -> ABS(X)
|
|
|
|
// NABS(NABS(X)) -> NABS(X)
|
2018-09-14 00:04:06 +08:00
|
|
|
// TODO: This could be done in instsimplify.
|
2014-06-06 14:54:45 +08:00
|
|
|
if (SPF1 == SPF2 && (SPF1 == SPF_ABS || SPF1 == SPF_NABS)) {
|
2016-02-02 06:23:39 +08:00
|
|
|
return replaceInstUsesWith(Outer, Inner);
|
2014-06-06 14:54:45 +08:00
|
|
|
}
|
|
|
|
|
2014-06-12 22:06:00 +08:00
|
|
|
// ABS(NABS(X)) -> ABS(X)
|
|
|
|
// NABS(ABS(X)) -> NABS(X)
|
|
|
|
if ((SPF1 == SPF_ABS && SPF2 == SPF_NABS) ||
|
|
|
|
(SPF1 == SPF_NABS && SPF2 == SPF_ABS)) {
|
|
|
|
SelectInst *SI = cast<SelectInst>(Inner);
|
2016-08-25 08:26:32 +08:00
|
|
|
Value *NewSI =
|
2017-07-08 07:16:26 +08:00
|
|
|
Builder.CreateSelect(SI->getCondition(), SI->getFalseValue(),
|
|
|
|
SI->getTrueValue(), SI->getName(), SI);
|
2016-02-02 06:23:39 +08:00
|
|
|
return replaceInstUsesWith(Outer, NewSI);
|
2014-06-12 22:06:00 +08:00
|
|
|
}
|
2015-04-30 12:56:04 +08:00
|
|
|
|
|
|
|
auto IsFreeOrProfitableToInvert =
|
|
|
|
[&](Value *V, Value *&NotV, bool &ElidesXor) {
|
|
|
|
if (match(V, m_Not(m_Value(NotV)))) {
|
|
|
|
// If V has at most 2 uses then we can get rid of the xor operation
|
|
|
|
// entirely.
|
|
|
|
ElidesXor |= !V->hasNUsesOrMore(3);
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2019-08-13 20:49:16 +08:00
|
|
|
if (isFreeToInvert(V, !V->hasNUsesOrMore(3))) {
|
2015-04-30 12:56:04 +08:00
|
|
|
NotV = nullptr;
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
};
|
|
|
|
|
|
|
|
Value *NotA, *NotB, *NotC;
|
|
|
|
bool ElidesXor = false;
|
|
|
|
|
|
|
|
// MIN(MIN(~A, ~B), ~C) == ~MAX(MAX(A, B), C)
|
|
|
|
// MIN(MAX(~A, ~B), ~C) == ~MAX(MIN(A, B), C)
|
|
|
|
// MAX(MIN(~A, ~B), ~C) == ~MIN(MAX(A, B), C)
|
|
|
|
// MAX(MAX(~A, ~B), ~C) == ~MIN(MIN(A, B), C)
|
|
|
|
//
|
|
|
|
// This transform is performance neutral if we can elide at least one xor from
|
|
|
|
// the set of three operands, since we'll be tacking on an xor at the very
|
|
|
|
// end.
|
2017-02-21 22:40:28 +08:00
|
|
|
if (SelectPatternResult::isMinOrMax(SPF1) &&
|
|
|
|
SelectPatternResult::isMinOrMax(SPF2) &&
|
|
|
|
IsFreeOrProfitableToInvert(A, NotA, ElidesXor) &&
|
2015-04-30 12:56:04 +08:00
|
|
|
IsFreeOrProfitableToInvert(B, NotB, ElidesXor) &&
|
|
|
|
IsFreeOrProfitableToInvert(C, NotC, ElidesXor) && ElidesXor) {
|
|
|
|
if (!NotA)
|
2017-07-08 07:16:26 +08:00
|
|
|
NotA = Builder.CreateNot(A);
|
2015-04-30 12:56:04 +08:00
|
|
|
if (!NotB)
|
2017-07-08 07:16:26 +08:00
|
|
|
NotB = Builder.CreateNot(B);
|
2015-04-30 12:56:04 +08:00
|
|
|
if (!NotC)
|
2017-07-08 07:16:26 +08:00
|
|
|
NotC = Builder.CreateNot(C);
|
2015-04-30 12:56:04 +08:00
|
|
|
|
2018-03-07 00:57:55 +08:00
|
|
|
Value *NewInner = createMinMax(Builder, getInverseMinMaxFlavor(SPF1), NotA,
|
|
|
|
NotB);
|
|
|
|
Value *NewOuter = Builder.CreateNot(
|
|
|
|
createMinMax(Builder, getInverseMinMaxFlavor(SPF2), NewInner, NotC));
|
2016-02-02 06:23:39 +08:00
|
|
|
return replaceInstUsesWith(Outer, NewOuter);
|
2015-04-30 12:56:04 +08:00
|
|
|
}
|
|
|
|
|
2014-04-25 13:29:35 +08:00
|
|
|
return nullptr;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
|
2016-06-09 05:10:01 +08:00
|
|
|
/// Turn select C, (X + Y), (X - Y) --> (X + (select C, Y, (-Y))).
|
|
|
|
/// This is even legal for FP.
|
|
|
|
static Instruction *foldAddSubSelect(SelectInst &SI,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
Value *CondVal = SI.getCondition();
|
|
|
|
Value *TrueVal = SI.getTrueValue();
|
|
|
|
Value *FalseVal = SI.getFalseValue();
|
|
|
|
auto *TI = dyn_cast<Instruction>(TrueVal);
|
|
|
|
auto *FI = dyn_cast<Instruction>(FalseVal);
|
|
|
|
if (!TI || !FI || !TI->hasOneUse() || !FI->hasOneUse())
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Instruction *AddOp = nullptr, *SubOp = nullptr;
|
|
|
|
if ((TI->getOpcode() == Instruction::Sub &&
|
|
|
|
FI->getOpcode() == Instruction::Add) ||
|
|
|
|
(TI->getOpcode() == Instruction::FSub &&
|
|
|
|
FI->getOpcode() == Instruction::FAdd)) {
|
|
|
|
AddOp = FI;
|
|
|
|
SubOp = TI;
|
|
|
|
} else if ((FI->getOpcode() == Instruction::Sub &&
|
|
|
|
TI->getOpcode() == Instruction::Add) ||
|
|
|
|
(FI->getOpcode() == Instruction::FSub &&
|
|
|
|
TI->getOpcode() == Instruction::FAdd)) {
|
|
|
|
AddOp = TI;
|
|
|
|
SubOp = FI;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (AddOp) {
|
|
|
|
Value *OtherAddOp = nullptr;
|
|
|
|
if (SubOp->getOperand(0) == AddOp->getOperand(0)) {
|
|
|
|
OtherAddOp = AddOp->getOperand(1);
|
|
|
|
} else if (SubOp->getOperand(0) == AddOp->getOperand(1)) {
|
|
|
|
OtherAddOp = AddOp->getOperand(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (OtherAddOp) {
|
|
|
|
// So at this point we know we have (Y -> OtherAddOp):
|
|
|
|
// select C, (add X, Y), (sub X, Z)
|
|
|
|
Value *NegVal; // Compute -Z
|
|
|
|
if (SI.getType()->isFPOrFPVectorTy()) {
|
|
|
|
NegVal = Builder.CreateFNeg(SubOp->getOperand(1));
|
|
|
|
if (Instruction *NegInst = dyn_cast<Instruction>(NegVal)) {
|
|
|
|
FastMathFlags Flags = AddOp->getFastMathFlags();
|
|
|
|
Flags &= SubOp->getFastMathFlags();
|
|
|
|
NegInst->setFastMathFlags(Flags);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
NegVal = Builder.CreateNeg(SubOp->getOperand(1));
|
|
|
|
}
|
|
|
|
|
|
|
|
Value *NewTrueOp = OtherAddOp;
|
|
|
|
Value *NewFalseOp = NegVal;
|
|
|
|
if (AddOp != TI)
|
|
|
|
std::swap(NewTrueOp, NewFalseOp);
|
|
|
|
Value *NewSel = Builder.CreateSelect(CondVal, NewTrueOp, NewFalseOp,
|
2016-08-25 08:26:32 +08:00
|
|
|
SI.getName() + ".p", &SI);
|
2016-06-09 05:10:01 +08:00
|
|
|
|
|
|
|
if (SI.getType()->isFPOrFPVectorTy()) {
|
|
|
|
Instruction *RI =
|
|
|
|
BinaryOperator::CreateFAdd(SubOp->getOperand(0), NewSel);
|
|
|
|
|
|
|
|
FastMathFlags Flags = AddOp->getFastMathFlags();
|
|
|
|
Flags &= SubOp->getFastMathFlags();
|
|
|
|
RI->setFastMathFlags(Flags);
|
|
|
|
return RI;
|
|
|
|
} else
|
|
|
|
return BinaryOperator::CreateAdd(SubOp->getOperand(0), NewSel);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2019-10-31 20:42:36 +08:00
|
|
|
/// Turn X + Y overflows ? -1 : X + Y -> uadd_sat X, Y
|
|
|
|
/// And X - Y overflows ? 0 : X - Y -> usub_sat X, Y
|
2019-11-17 18:40:26 +08:00
|
|
|
/// Along with a number of patterns similar to:
|
|
|
|
/// X + Y overflows ? (X < 0 ? INTMIN : INTMAX) : X + Y --> sadd_sat X, Y
|
2019-11-17 18:45:00 +08:00
|
|
|
/// X - Y overflows ? (X > 0 ? INTMAX : INTMIN) : X - Y --> ssub_sat X, Y
|
2019-10-31 20:42:36 +08:00
|
|
|
static Instruction *
|
|
|
|
foldOverflowingAddSubSelect(SelectInst &SI, InstCombiner::BuilderTy &Builder) {
|
|
|
|
Value *CondVal = SI.getCondition();
|
|
|
|
Value *TrueVal = SI.getTrueValue();
|
|
|
|
Value *FalseVal = SI.getFalseValue();
|
|
|
|
|
|
|
|
WithOverflowInst *II;
|
|
|
|
if (!match(CondVal, m_ExtractValue<1>(m_WithOverflowInst(II))) ||
|
|
|
|
!match(FalseVal, m_ExtractValue<0>(m_Specific(II))))
|
|
|
|
return nullptr;
|
|
|
|
|
2019-11-17 18:40:26 +08:00
|
|
|
Value *X = II->getLHS();
|
|
|
|
Value *Y = II->getRHS();
|
|
|
|
|
2019-11-17 18:45:00 +08:00
|
|
|
auto IsSignedSaturateLimit = [&](Value *Limit, bool IsAdd) {
|
2019-11-17 18:40:26 +08:00
|
|
|
Type *Ty = Limit->getType();
|
|
|
|
|
|
|
|
ICmpInst::Predicate Pred;
|
|
|
|
Value *TrueVal, *FalseVal, *Op;
|
|
|
|
const APInt *C;
|
|
|
|
if (!match(Limit, m_Select(m_ICmp(Pred, m_Value(Op), m_APInt(C)),
|
|
|
|
m_Value(TrueVal), m_Value(FalseVal))))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
auto IsZeroOrOne = [](const APInt &C) {
|
|
|
|
return C.isNullValue() || C.isOneValue();
|
|
|
|
};
|
|
|
|
auto IsMinMax = [&](Value *Min, Value *Max) {
|
|
|
|
APInt MinVal = APInt::getSignedMinValue(Ty->getScalarSizeInBits());
|
|
|
|
APInt MaxVal = APInt::getSignedMaxValue(Ty->getScalarSizeInBits());
|
|
|
|
return match(Min, m_SpecificInt(MinVal)) &&
|
|
|
|
match(Max, m_SpecificInt(MaxVal));
|
|
|
|
};
|
|
|
|
|
|
|
|
if (Op != X && Op != Y)
|
|
|
|
return false;
|
|
|
|
|
2019-11-17 18:45:00 +08:00
|
|
|
if (IsAdd) {
|
|
|
|
// X + Y overflows ? (X <s 0 ? INTMIN : INTMAX) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (X <s 1 ? INTMIN : INTMAX) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (Y <s 0 ? INTMIN : INTMAX) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (Y <s 1 ? INTMIN : INTMAX) : X + Y --> sadd_sat X, Y
|
|
|
|
if (Pred == ICmpInst::ICMP_SLT && IsZeroOrOne(*C) &&
|
|
|
|
IsMinMax(TrueVal, FalseVal))
|
|
|
|
return true;
|
|
|
|
// X + Y overflows ? (X >s 0 ? INTMAX : INTMIN) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (X >s -1 ? INTMAX : INTMIN) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (Y >s 0 ? INTMAX : INTMIN) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (Y >s -1 ? INTMAX : INTMIN) : X + Y --> sadd_sat X, Y
|
|
|
|
if (Pred == ICmpInst::ICMP_SGT && IsZeroOrOne(*C + 1) &&
|
|
|
|
IsMinMax(FalseVal, TrueVal))
|
|
|
|
return true;
|
|
|
|
} else {
|
|
|
|
// X - Y overflows ? (X <s 0 ? INTMIN : INTMAX) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (X <s -1 ? INTMIN : INTMAX) : X - Y --> ssub_sat X, Y
|
|
|
|
if (Op == X && Pred == ICmpInst::ICMP_SLT && IsZeroOrOne(*C + 1) &&
|
|
|
|
IsMinMax(TrueVal, FalseVal))
|
|
|
|
return true;
|
|
|
|
// X - Y overflows ? (X >s -1 ? INTMAX : INTMIN) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (X >s -2 ? INTMAX : INTMIN) : X - Y --> ssub_sat X, Y
|
|
|
|
if (Op == X && Pred == ICmpInst::ICMP_SGT && IsZeroOrOne(*C + 2) &&
|
|
|
|
IsMinMax(FalseVal, TrueVal))
|
|
|
|
return true;
|
|
|
|
// X - Y overflows ? (Y <s 0 ? INTMAX : INTMIN) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (Y <s 1 ? INTMAX : INTMIN) : X - Y --> ssub_sat X, Y
|
|
|
|
if (Op == Y && Pred == ICmpInst::ICMP_SLT && IsZeroOrOne(*C) &&
|
|
|
|
IsMinMax(FalseVal, TrueVal))
|
|
|
|
return true;
|
|
|
|
// X - Y overflows ? (Y >s 0 ? INTMIN : INTMAX) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (Y >s -1 ? INTMIN : INTMAX) : X - Y --> ssub_sat X, Y
|
|
|
|
if (Op == Y && Pred == ICmpInst::ICMP_SGT && IsZeroOrOne(*C + 1) &&
|
|
|
|
IsMinMax(TrueVal, FalseVal))
|
|
|
|
return true;
|
|
|
|
}
|
2019-11-17 18:40:26 +08:00
|
|
|
|
|
|
|
return false;
|
|
|
|
};
|
|
|
|
|
2019-10-31 20:42:36 +08:00
|
|
|
Intrinsic::ID NewIntrinsicID;
|
|
|
|
if (II->getIntrinsicID() == Intrinsic::uadd_with_overflow &&
|
|
|
|
match(TrueVal, m_AllOnes()))
|
|
|
|
// X + Y overflows ? -1 : X + Y -> uadd_sat X, Y
|
|
|
|
NewIntrinsicID = Intrinsic::uadd_sat;
|
|
|
|
else if (II->getIntrinsicID() == Intrinsic::usub_with_overflow &&
|
|
|
|
match(TrueVal, m_Zero()))
|
|
|
|
// X - Y overflows ? 0 : X - Y -> usub_sat X, Y
|
|
|
|
NewIntrinsicID = Intrinsic::usub_sat;
|
2019-11-17 18:40:26 +08:00
|
|
|
else if (II->getIntrinsicID() == Intrinsic::sadd_with_overflow &&
|
2019-11-17 18:45:00 +08:00
|
|
|
IsSignedSaturateLimit(TrueVal, /*IsAdd=*/true))
|
2019-11-17 18:40:26 +08:00
|
|
|
// X + Y overflows ? (X <s 0 ? INTMIN : INTMAX) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (X <s 1 ? INTMIN : INTMAX) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (X >s 0 ? INTMAX : INTMIN) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (X >s -1 ? INTMAX : INTMIN) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (Y <s 0 ? INTMIN : INTMAX) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (Y <s 1 ? INTMIN : INTMAX) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (Y >s 0 ? INTMAX : INTMIN) : X + Y --> sadd_sat X, Y
|
|
|
|
// X + Y overflows ? (Y >s -1 ? INTMAX : INTMIN) : X + Y --> sadd_sat X, Y
|
|
|
|
NewIntrinsicID = Intrinsic::sadd_sat;
|
2019-11-17 18:45:00 +08:00
|
|
|
else if (II->getIntrinsicID() == Intrinsic::ssub_with_overflow &&
|
|
|
|
IsSignedSaturateLimit(TrueVal, /*IsAdd=*/false))
|
|
|
|
// X - Y overflows ? (X <s 0 ? INTMIN : INTMAX) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (X <s -1 ? INTMIN : INTMAX) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (X >s -1 ? INTMAX : INTMIN) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (X >s -2 ? INTMAX : INTMIN) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (Y <s 0 ? INTMAX : INTMIN) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (Y <s 1 ? INTMAX : INTMIN) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (Y >s 0 ? INTMIN : INTMAX) : X - Y --> ssub_sat X, Y
|
|
|
|
// X - Y overflows ? (Y >s -1 ? INTMIN : INTMAX) : X - Y --> ssub_sat X, Y
|
|
|
|
NewIntrinsicID = Intrinsic::ssub_sat;
|
2019-10-31 20:42:36 +08:00
|
|
|
else
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Function *F =
|
|
|
|
Intrinsic::getDeclaration(SI.getModule(), NewIntrinsicID, SI.getType());
|
2019-11-17 18:40:26 +08:00
|
|
|
return CallInst::Create(F, {X, Y});
|
2019-10-31 20:42:36 +08:00
|
|
|
}
|
|
|
|
|
2020-06-03 21:56:40 +08:00
|
|
|
Instruction *InstCombinerImpl::foldSelectExtConst(SelectInst &Sel) {
|
2018-06-01 03:55:27 +08:00
|
|
|
Constant *C;
|
|
|
|
if (!match(Sel.getTrueValue(), m_Constant(C)) &&
|
|
|
|
!match(Sel.getFalseValue(), m_Constant(C)))
|
|
|
|
return nullptr;
|
|
|
|
|
2016-10-01 03:49:22 +08:00
|
|
|
Instruction *ExtInst;
|
|
|
|
if (!match(Sel.getTrueValue(), m_Instruction(ExtInst)) &&
|
|
|
|
!match(Sel.getFalseValue(), m_Instruction(ExtInst)))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
auto ExtOpcode = ExtInst->getOpcode();
|
|
|
|
if (ExtOpcode != Instruction::ZExt && ExtOpcode != Instruction::SExt)
|
|
|
|
return nullptr;
|
|
|
|
|
2018-06-01 03:55:27 +08:00
|
|
|
// If we are extending from a boolean type or if we can create a select that
|
|
|
|
// has the same size operands as its condition, try to narrow the select.
|
2016-10-01 03:49:22 +08:00
|
|
|
Value *X = ExtInst->getOperand(0);
|
|
|
|
Type *SmallType = X->getType();
|
2018-06-01 03:55:27 +08:00
|
|
|
Value *Cond = Sel.getCondition();
|
|
|
|
auto *Cmp = dyn_cast<CmpInst>(Cond);
|
|
|
|
if (!SmallType->isIntOrIntVectorTy(1) &&
|
|
|
|
(!Cmp || Cmp->getOperand(0)->getType() != SmallType))
|
2016-10-01 03:49:22 +08:00
|
|
|
return nullptr;
|
[InstCombine] try to fold (select C, (sext A), B) into logical ops
Summary:
Turn (select C, (sext A), B) into (sext (select C, A, B')) when A is i1 and
B is a compatible constant, also for zext instead of sext. This will then be
further folded into logical operations.
The transformation would be valid for non-i1 types as well, but other parts of
InstCombine prefer to have sext from non-i1 as an operand of select.
Motivated by the shader compiler frontend in Mesa for AMDGPU, which emits i32
for boolean operations. With this change, the boolean logic is fully
recovered.
Reviewers: majnemer, spatel, tstellarAMD
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22747
llvm-svn: 277801
2016-08-05 16:22:29 +08:00
|
|
|
|
2016-10-01 03:49:22 +08:00
|
|
|
// If the constant is the same after truncation to the smaller type and
|
|
|
|
// extension to the original type, we can narrow the select.
|
|
|
|
Type *SelType = Sel.getType();
|
|
|
|
Constant *TruncC = ConstantExpr::getTrunc(C, SmallType);
|
|
|
|
Constant *ExtC = ConstantExpr::getCast(ExtOpcode, TruncC, SelType);
|
2020-07-03 23:52:52 +08:00
|
|
|
if (ExtC == C && ExtInst->hasOneUse()) {
|
2016-10-01 03:49:22 +08:00
|
|
|
Value *TruncCVal = cast<Value>(TruncC);
|
|
|
|
if (ExtInst == Sel.getFalseValue())
|
|
|
|
std::swap(X, TruncCVal);
|
|
|
|
|
|
|
|
// select Cond, (ext X), C --> ext(select Cond, X, C')
|
|
|
|
// select Cond, C, (ext X) --> ext(select Cond, C', X)
|
2017-07-08 07:16:26 +08:00
|
|
|
Value *NewSel = Builder.CreateSelect(Cond, X, TruncCVal, "narrow", &Sel);
|
2016-10-01 03:49:22 +08:00
|
|
|
return CastInst::Create(Instruction::CastOps(ExtOpcode), NewSel, SelType);
|
2016-09-30 06:18:30 +08:00
|
|
|
}
|
[InstCombine] try to fold (select C, (sext A), B) into logical ops
Summary:
Turn (select C, (sext A), B) into (sext (select C, A, B')) when A is i1 and
B is a compatible constant, also for zext instead of sext. This will then be
further folded into logical operations.
The transformation would be valid for non-i1 types as well, but other parts of
InstCombine prefer to have sext from non-i1 as an operand of select.
Motivated by the shader compiler frontend in Mesa for AMDGPU, which emits i32
for boolean operations. With this change, the boolean logic is fully
recovered.
Reviewers: majnemer, spatel, tstellarAMD
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22747
llvm-svn: 277801
2016-08-05 16:22:29 +08:00
|
|
|
|
[InstCombine] fold select X, (ext X), C
If we're going to canonicalize IR towards select of constants, try harder to create those.
Also, don't lose the metadata.
This is actually 4 related transforms in one patch:
// select X, (sext X), C --> select X, -1, C
// select X, (zext X), C --> select X, 1, C
// select X, C, (sext X) --> select X, C, 0
// select X, C, (zext X) --> select X, C, 0
Differential Revision: https://reviews.llvm.org/D25126
llvm-svn: 283575
2016-10-08 01:53:07 +08:00
|
|
|
// If one arm of the select is the extend of the condition, replace that arm
|
|
|
|
// with the extension of the appropriate known bool value.
|
|
|
|
if (Cond == X) {
|
|
|
|
if (ExtInst == Sel.getTrueValue()) {
|
|
|
|
// select X, (sext X), C --> select X, -1, C
|
|
|
|
// select X, (zext X), C --> select X, 1, C
|
|
|
|
Constant *One = ConstantInt::getTrue(SmallType);
|
|
|
|
Constant *AllOnesOrOne = ConstantExpr::getCast(ExtOpcode, One, SelType);
|
2016-11-26 23:01:59 +08:00
|
|
|
return SelectInst::Create(Cond, AllOnesOrOne, C, "", nullptr, &Sel);
|
[InstCombine] fold select X, (ext X), C
If we're going to canonicalize IR towards select of constants, try harder to create those.
Also, don't lose the metadata.
This is actually 4 related transforms in one patch:
// select X, (sext X), C --> select X, -1, C
// select X, (zext X), C --> select X, 1, C
// select X, C, (sext X) --> select X, C, 0
// select X, C, (zext X) --> select X, C, 0
Differential Revision: https://reviews.llvm.org/D25126
llvm-svn: 283575
2016-10-08 01:53:07 +08:00
|
|
|
} else {
|
|
|
|
// select X, C, (sext X) --> select X, C, 0
|
|
|
|
// select X, C, (zext X) --> select X, C, 0
|
|
|
|
Constant *Zero = ConstantInt::getNullValue(SelType);
|
2016-11-26 23:01:59 +08:00
|
|
|
return SelectInst::Create(Cond, C, Zero, "", nullptr, &Sel);
|
[InstCombine] fold select X, (ext X), C
If we're going to canonicalize IR towards select of constants, try harder to create those.
Also, don't lose the metadata.
This is actually 4 related transforms in one patch:
// select X, (sext X), C --> select X, -1, C
// select X, (zext X), C --> select X, 1, C
// select X, C, (sext X) --> select X, C, 0
// select X, C, (zext X) --> select X, C, 0
Differential Revision: https://reviews.llvm.org/D25126
llvm-svn: 283575
2016-10-08 01:53:07 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-09-30 06:18:30 +08:00
|
|
|
return nullptr;
|
[InstCombine] try to fold (select C, (sext A), B) into logical ops
Summary:
Turn (select C, (sext A), B) into (sext (select C, A, B')) when A is i1 and
B is a compatible constant, also for zext instead of sext. This will then be
further folded into logical operations.
The transformation would be valid for non-i1 types as well, but other parts of
InstCombine prefer to have sext from non-i1 as an operand of select.
Motivated by the shader compiler frontend in Mesa for AMDGPU, which emits i32
for boolean operations. With this change, the boolean logic is fully
recovered.
Reviewers: majnemer, spatel, tstellarAMD
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22747
llvm-svn: 277801
2016-08-05 16:22:29 +08:00
|
|
|
}
|
|
|
|
|
2016-09-17 06:16:18 +08:00
|
|
|
/// Try to transform a vector select with a constant condition vector into a
|
|
|
|
/// shuffle for easier combining with other shuffles and insert/extract.
|
|
|
|
static Instruction *canonicalizeSelectToShuffle(SelectInst &SI) {
|
|
|
|
Value *CondVal = SI.getCondition();
|
|
|
|
Constant *CondC;
|
|
|
|
if (!CondVal->getType()->isVectorTy() || !match(CondVal, m_Constant(CondC)))
|
|
|
|
return nullptr;
|
|
|
|
|
2020-09-01 03:17:51 +08:00
|
|
|
unsigned NumElts =
|
|
|
|
cast<FixedVectorType>(CondVal->getType())->getNumElements();
|
2020-04-15 20:29:09 +08:00
|
|
|
SmallVector<int, 16> Mask;
|
2016-09-17 06:16:18 +08:00
|
|
|
Mask.reserve(NumElts);
|
|
|
|
for (unsigned i = 0; i != NumElts; ++i) {
|
|
|
|
Constant *Elt = CondC->getAggregateElement(i);
|
|
|
|
if (!Elt)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
if (Elt->isOneValue()) {
|
|
|
|
// If the select condition element is true, choose from the 1st vector.
|
2020-04-15 20:29:09 +08:00
|
|
|
Mask.push_back(i);
|
2016-09-17 06:16:18 +08:00
|
|
|
} else if (Elt->isNullValue()) {
|
|
|
|
// If the select condition element is false, choose from the 2nd vector.
|
2020-04-15 20:29:09 +08:00
|
|
|
Mask.push_back(i + NumElts);
|
2016-09-17 06:16:18 +08:00
|
|
|
} else if (isa<UndefValue>(Elt)) {
|
2017-04-13 02:39:53 +08:00
|
|
|
// Undef in a select condition (choose one of the operands) does not mean
|
|
|
|
// the same thing as undef in a shuffle mask (any value is acceptable), so
|
|
|
|
// give up.
|
|
|
|
return nullptr;
|
2016-09-17 06:16:18 +08:00
|
|
|
} else {
|
|
|
|
// Bail out on a constant expression.
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-04-15 20:29:09 +08:00
|
|
|
return new ShuffleVectorInst(SI.getTrueValue(), SI.getFalseValue(), Mask);
|
2016-09-17 06:16:18 +08:00
|
|
|
}
|
|
|
|
|
[InstCombine] canonicalize a scalar-select-of-vectors to vector select
This pattern may arise more frequently with an enhancement to SLP vectorization suggested in PR42755:
https://bugs.llvm.org/show_bug.cgi?id=42755
...but we should handle this pattern to make things easier for the backend either way.
For all in-tree targets that I looked at, codegen for typical vector sizes looks better when we change
to a vector select, so this is safe to do without a cost model (in other words, as a target-independent
canonicalization).
For example, if the condition of the select is a scalar, we end up with something like this on x86:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpextrb $12, %xmm0, %eax
testb $1, %al
jne LBB0_2
## %bb.1:
vmovaps %xmm3, %xmm2
LBB0_2:
vmovaps %xmm2, %xmm0
Rather than the splat-condition variant:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpshufd $255, %xmm0, %xmm0 ## xmm0 = xmm0[3,3,3,3]
vblendvps %xmm0, %xmm2, %xmm3, %xmm0
Differential Revision: https://reviews.llvm.org/D66095
llvm-svn: 369140
2019-08-17 02:51:30 +08:00
|
|
|
/// If we have a select of vectors with a scalar condition, try to convert that
|
|
|
|
/// to a vector select by splatting the condition. A splat may get folded with
|
|
|
|
/// other operations in IR and having all operands of a select be vector types
|
|
|
|
/// is likely better for vector codegen.
|
2020-06-03 21:56:40 +08:00
|
|
|
static Instruction *canonicalizeScalarSelectOfVecs(SelectInst &Sel,
|
|
|
|
InstCombinerImpl &IC) {
|
2020-04-09 01:42:22 +08:00
|
|
|
auto *Ty = dyn_cast<VectorType>(Sel.getType());
|
|
|
|
if (!Ty)
|
[InstCombine] canonicalize a scalar-select-of-vectors to vector select
This pattern may arise more frequently with an enhancement to SLP vectorization suggested in PR42755:
https://bugs.llvm.org/show_bug.cgi?id=42755
...but we should handle this pattern to make things easier for the backend either way.
For all in-tree targets that I looked at, codegen for typical vector sizes looks better when we change
to a vector select, so this is safe to do without a cost model (in other words, as a target-independent
canonicalization).
For example, if the condition of the select is a scalar, we end up with something like this on x86:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpextrb $12, %xmm0, %eax
testb $1, %al
jne LBB0_2
## %bb.1:
vmovaps %xmm3, %xmm2
LBB0_2:
vmovaps %xmm2, %xmm0
Rather than the splat-condition variant:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpshufd $255, %xmm0, %xmm0 ## xmm0 = xmm0[3,3,3,3]
vblendvps %xmm0, %xmm2, %xmm3, %xmm0
Differential Revision: https://reviews.llvm.org/D66095
llvm-svn: 369140
2019-08-17 02:51:30 +08:00
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// We can replace a single-use extract with constant index.
|
|
|
|
Value *Cond = Sel.getCondition();
|
2020-05-23 22:13:50 +08:00
|
|
|
if (!match(Cond, m_OneUse(m_ExtractElt(m_Value(), m_ConstantInt()))))
|
[InstCombine] canonicalize a scalar-select-of-vectors to vector select
This pattern may arise more frequently with an enhancement to SLP vectorization suggested in PR42755:
https://bugs.llvm.org/show_bug.cgi?id=42755
...but we should handle this pattern to make things easier for the backend either way.
For all in-tree targets that I looked at, codegen for typical vector sizes looks better when we change
to a vector select, so this is safe to do without a cost model (in other words, as a target-independent
canonicalization).
For example, if the condition of the select is a scalar, we end up with something like this on x86:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpextrb $12, %xmm0, %eax
testb $1, %al
jne LBB0_2
## %bb.1:
vmovaps %xmm3, %xmm2
LBB0_2:
vmovaps %xmm2, %xmm0
Rather than the splat-condition variant:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpshufd $255, %xmm0, %xmm0 ## xmm0 = xmm0[3,3,3,3]
vblendvps %xmm0, %xmm2, %xmm3, %xmm0
Differential Revision: https://reviews.llvm.org/D66095
llvm-svn: 369140
2019-08-17 02:51:30 +08:00
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// select (extelt V, Index), T, F --> select (splat V, Index), T, F
|
|
|
|
// Splatting the extracted condition reduces code (we could directly create a
|
|
|
|
// splat shuffle of the source vector to eliminate the intermediate step).
|
2020-08-09 02:26:02 +08:00
|
|
|
return IC.replaceOperand(
|
|
|
|
Sel, 0, IC.Builder.CreateVectorSplat(Ty->getElementCount(), Cond));
|
[InstCombine] canonicalize a scalar-select-of-vectors to vector select
This pattern may arise more frequently with an enhancement to SLP vectorization suggested in PR42755:
https://bugs.llvm.org/show_bug.cgi?id=42755
...but we should handle this pattern to make things easier for the backend either way.
For all in-tree targets that I looked at, codegen for typical vector sizes looks better when we change
to a vector select, so this is safe to do without a cost model (in other words, as a target-independent
canonicalization).
For example, if the condition of the select is a scalar, we end up with something like this on x86:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpextrb $12, %xmm0, %eax
testb $1, %al
jne LBB0_2
## %bb.1:
vmovaps %xmm3, %xmm2
LBB0_2:
vmovaps %xmm2, %xmm0
Rather than the splat-condition variant:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpshufd $255, %xmm0, %xmm0 ## xmm0 = xmm0[3,3,3,3]
vblendvps %xmm0, %xmm2, %xmm3, %xmm0
Differential Revision: https://reviews.llvm.org/D66095
llvm-svn: 369140
2019-08-17 02:51:30 +08:00
|
|
|
}
|
|
|
|
|
2016-10-29 23:22:04 +08:00
|
|
|
/// Reuse bitcasted operands between a compare and select:
|
|
|
|
/// select (cmp (bitcast C), (bitcast D)), (bitcast' C), (bitcast' D) -->
|
|
|
|
/// bitcast (select (cmp (bitcast C), (bitcast D)), (bitcast C), (bitcast D))
|
|
|
|
static Instruction *foldSelectCmpBitcasts(SelectInst &Sel,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
Value *Cond = Sel.getCondition();
|
|
|
|
Value *TVal = Sel.getTrueValue();
|
|
|
|
Value *FVal = Sel.getFalseValue();
|
|
|
|
|
|
|
|
CmpInst::Predicate Pred;
|
|
|
|
Value *A, *B;
|
|
|
|
if (!match(Cond, m_Cmp(Pred, m_Value(A), m_Value(B))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// The select condition is a compare instruction. If the select's true/false
|
|
|
|
// values are already the same as the compare operands, there's nothing to do.
|
|
|
|
if (TVal == A || TVal == B || FVal == A || FVal == B)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Value *C, *D;
|
|
|
|
if (!match(A, m_BitCast(m_Value(C))) || !match(B, m_BitCast(m_Value(D))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// select (cmp (bitcast C), (bitcast D)), (bitcast TSrc), (bitcast FSrc)
|
|
|
|
Value *TSrc, *FSrc;
|
|
|
|
if (!match(TVal, m_BitCast(m_Value(TSrc))) ||
|
|
|
|
!match(FVal, m_BitCast(m_Value(FSrc))))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// If the select true/false values are *different bitcasts* of the same source
|
|
|
|
// operands, make the select operands the same as the compare operands and
|
|
|
|
// cast the result. This is the canonical select form for min/max.
|
|
|
|
Value *NewSel;
|
|
|
|
if (TSrc == C && FSrc == D) {
|
|
|
|
// select (cmp (bitcast C), (bitcast D)), (bitcast' C), (bitcast' D) -->
|
|
|
|
// bitcast (select (cmp A, B), A, B)
|
|
|
|
NewSel = Builder.CreateSelect(Cond, A, B, "", &Sel);
|
|
|
|
} else if (TSrc == D && FSrc == C) {
|
|
|
|
// select (cmp (bitcast C), (bitcast D)), (bitcast' D), (bitcast' C) -->
|
|
|
|
// bitcast (select (cmp A, B), B, A)
|
|
|
|
NewSel = Builder.CreateSelect(Cond, B, A, "", &Sel);
|
|
|
|
} else {
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
return CastInst::CreateBitOrPointerCast(NewSel, Sel.getType());
|
|
|
|
}
|
|
|
|
|
2017-10-31 20:34:02 +08:00
|
|
|
/// Try to eliminate select instructions that test the returned flag of cmpxchg
|
|
|
|
/// instructions.
|
|
|
|
///
|
|
|
|
/// If a select instruction tests the returned flag of a cmpxchg instruction and
|
|
|
|
/// selects between the returned value of the cmpxchg instruction its compare
|
|
|
|
/// operand, the result of the select will always be equal to its false value.
|
|
|
|
/// For example:
|
|
|
|
///
|
|
|
|
/// %0 = cmpxchg i64* %ptr, i64 %compare, i64 %new_value seq_cst seq_cst
|
|
|
|
/// %1 = extractvalue { i64, i1 } %0, 1
|
|
|
|
/// %2 = extractvalue { i64, i1 } %0, 0
|
|
|
|
/// %3 = select i1 %1, i64 %compare, i64 %2
|
|
|
|
/// ret i64 %3
|
|
|
|
///
|
|
|
|
/// The returned value of the cmpxchg instruction (%2) is the original value
|
|
|
|
/// located at %ptr prior to any update. If the cmpxchg operation succeeds, %2
|
|
|
|
/// must have been equal to %compare. Thus, the result of the select is always
|
|
|
|
/// equal to %2, and the code can be simplified to:
|
|
|
|
///
|
|
|
|
/// %0 = cmpxchg i64* %ptr, i64 %compare, i64 %new_value seq_cst seq_cst
|
|
|
|
/// %1 = extractvalue { i64, i1 } %0, 0
|
|
|
|
/// ret i64 %1
|
|
|
|
///
|
2020-03-30 00:55:59 +08:00
|
|
|
static Value *foldSelectCmpXchg(SelectInst &SI) {
|
2017-10-31 20:34:02 +08:00
|
|
|
// A helper that determines if V is an extractvalue instruction whose
|
|
|
|
// aggregate operand is a cmpxchg instruction and whose single index is equal
|
|
|
|
// to I. If such conditions are true, the helper returns the cmpxchg
|
|
|
|
// instruction; otherwise, a nullptr is returned.
|
|
|
|
auto isExtractFromCmpXchg = [](Value *V, unsigned I) -> AtomicCmpXchgInst * {
|
|
|
|
auto *Extract = dyn_cast<ExtractValueInst>(V);
|
|
|
|
if (!Extract)
|
|
|
|
return nullptr;
|
|
|
|
if (Extract->getIndices()[0] != I)
|
|
|
|
return nullptr;
|
|
|
|
return dyn_cast<AtomicCmpXchgInst>(Extract->getAggregateOperand());
|
|
|
|
};
|
|
|
|
|
|
|
|
// If the select has a single user, and this user is a select instruction that
|
|
|
|
// we can simplify, skip the cmpxchg simplification for now.
|
|
|
|
if (SI.hasOneUse())
|
|
|
|
if (auto *Select = dyn_cast<SelectInst>(SI.user_back()))
|
|
|
|
if (Select->getCondition() == SI.getCondition())
|
|
|
|
if (Select->getFalseValue() == SI.getTrueValue() ||
|
|
|
|
Select->getTrueValue() == SI.getFalseValue())
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Ensure the select condition is the returned flag of a cmpxchg instruction.
|
|
|
|
auto *CmpXchg = isExtractFromCmpXchg(SI.getCondition(), 1);
|
|
|
|
if (!CmpXchg)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Check the true value case: The true value of the select is the returned
|
|
|
|
// value of the same cmpxchg used by the condition, and the false value is the
|
|
|
|
// cmpxchg instruction's compare operand.
|
|
|
|
if (auto *X = isExtractFromCmpXchg(SI.getTrueValue(), 0))
|
2020-03-30 00:55:59 +08:00
|
|
|
if (X == CmpXchg && X->getCompareOperand() == SI.getFalseValue())
|
|
|
|
return SI.getFalseValue();
|
2017-10-31 20:34:02 +08:00
|
|
|
|
|
|
|
// Check the false value case: The false value of the select is the returned
|
|
|
|
// value of the same cmpxchg used by the condition, and the true value is the
|
|
|
|
// cmpxchg instruction's compare operand.
|
|
|
|
if (auto *X = isExtractFromCmpXchg(SI.getFalseValue(), 0))
|
2020-03-30 00:55:59 +08:00
|
|
|
if (X == CmpXchg && X->getCompareOperand() == SI.getTrueValue())
|
|
|
|
return SI.getFalseValue();
|
2017-10-31 20:34:02 +08:00
|
|
|
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
[InstCombine] move add after umin/umax
In the motivating cases from PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
...moving the add enables us to narrow the
min/max which eliminates zext/trunc which
enables signficantly better vectorization.
But that bug is still not completely fixed.
https://rise4fun.com/Alive/5KQ
Name: umax
Pre: C1 u>= C0
%a = add nuw i8 %x, C0
%cond = icmp ugt i8 %a, C1
%r = select i1 %cond, i8 %a, i8 C1
=>
%c2 = icmp ugt i8 %x, C1-C0
%u2 = select i1 %c2, i8 %x, i8 C1-C0
%r = add nuw i8 %u2, C0
Name: umin
Pre: C1 u>= C0
%a = add nuw i32 %x, C0
%cond = icmp ult i32 %a, C1
%r = select i1 %cond, i32 %a, i32 C1
=>
%c2 = icmp ult i32 %x, C1-C0
%u2 = select i1 %c2, i32 %x, i32 C1-C0
%r = add nuw i32 %u2, C0
llvm-svn: 355221
2019-03-02 03:42:40 +08:00
|
|
|
static Instruction *moveAddAfterMinMax(SelectPatternFlavor SPF, Value *X,
|
|
|
|
Value *Y,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
[InstCombine] move add after smin/smax
Follow-up to rL355221.
This isn't specifically called for within PR14613,
but we'll get there eventually if it's not already
requested in some other bug report.
https://rise4fun.com/Alive/5b0
Name: smax
Pre: WillNotOverflowSignedSub(C1,C0)
%a = add nsw i8 %x, C0
%cond = icmp sgt i8 %a, C1
%r = select i1 %cond, i8 %a, i8 C1
=>
%c2 = icmp sgt i8 %x, C1-C0
%u2 = select i1 %c2, i8 %x, i8 C1-C0
%r = add nsw i8 %u2, C0
Name: smin
Pre: WillNotOverflowSignedSub(C1,C0)
%a = add nsw i32 %x, C0
%cond = icmp slt i32 %a, C1
%r = select i1 %cond, i32 %a, i32 C1
=>
%c2 = icmp slt i32 %x, C1-C0
%u2 = select i1 %c2, i32 %x, i32 C1-C0
%r = add nsw i32 %u2, C0
llvm-svn: 355272
2019-03-03 00:45:10 +08:00
|
|
|
assert(SelectPatternResult::isMinOrMax(SPF) && "Expected min/max pattern");
|
[InstCombine] move add after umin/umax
In the motivating cases from PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
...moving the add enables us to narrow the
min/max which eliminates zext/trunc which
enables signficantly better vectorization.
But that bug is still not completely fixed.
https://rise4fun.com/Alive/5KQ
Name: umax
Pre: C1 u>= C0
%a = add nuw i8 %x, C0
%cond = icmp ugt i8 %a, C1
%r = select i1 %cond, i8 %a, i8 C1
=>
%c2 = icmp ugt i8 %x, C1-C0
%u2 = select i1 %c2, i8 %x, i8 C1-C0
%r = add nuw i8 %u2, C0
Name: umin
Pre: C1 u>= C0
%a = add nuw i32 %x, C0
%cond = icmp ult i32 %a, C1
%r = select i1 %cond, i32 %a, i32 C1
=>
%c2 = icmp ult i32 %x, C1-C0
%u2 = select i1 %c2, i32 %x, i32 C1-C0
%r = add nuw i32 %u2, C0
llvm-svn: 355221
2019-03-02 03:42:40 +08:00
|
|
|
bool IsUnsigned = SPF == SelectPatternFlavor::SPF_UMIN ||
|
|
|
|
SPF == SelectPatternFlavor::SPF_UMAX;
|
|
|
|
// TODO: If InstSimplify could fold all cases where C2 <= C1, we could change
|
|
|
|
// the constant value check to an assert.
|
|
|
|
Value *A;
|
|
|
|
const APInt *C1, *C2;
|
|
|
|
if (IsUnsigned && match(X, m_NUWAdd(m_Value(A), m_APInt(C1))) &&
|
|
|
|
match(Y, m_APInt(C2)) && C2->uge(*C1) && X->hasNUses(2)) {
|
|
|
|
// umin (add nuw A, C1), C2 --> add nuw (umin A, C2 - C1), C1
|
|
|
|
// umax (add nuw A, C1), C2 --> add nuw (umax A, C2 - C1), C1
|
|
|
|
Value *NewMinMax = createMinMax(Builder, SPF, A,
|
|
|
|
ConstantInt::get(X->getType(), *C2 - *C1));
|
|
|
|
return BinaryOperator::CreateNUW(BinaryOperator::Add, NewMinMax,
|
|
|
|
ConstantInt::get(X->getType(), *C1));
|
|
|
|
}
|
[InstCombine] move add after smin/smax
Follow-up to rL355221.
This isn't specifically called for within PR14613,
but we'll get there eventually if it's not already
requested in some other bug report.
https://rise4fun.com/Alive/5b0
Name: smax
Pre: WillNotOverflowSignedSub(C1,C0)
%a = add nsw i8 %x, C0
%cond = icmp sgt i8 %a, C1
%r = select i1 %cond, i8 %a, i8 C1
=>
%c2 = icmp sgt i8 %x, C1-C0
%u2 = select i1 %c2, i8 %x, i8 C1-C0
%r = add nsw i8 %u2, C0
Name: smin
Pre: WillNotOverflowSignedSub(C1,C0)
%a = add nsw i32 %x, C0
%cond = icmp slt i32 %a, C1
%r = select i1 %cond, i32 %a, i32 C1
=>
%c2 = icmp slt i32 %x, C1-C0
%u2 = select i1 %c2, i32 %x, i32 C1-C0
%r = add nsw i32 %u2, C0
llvm-svn: 355272
2019-03-03 00:45:10 +08:00
|
|
|
|
|
|
|
if (!IsUnsigned && match(X, m_NSWAdd(m_Value(A), m_APInt(C1))) &&
|
|
|
|
match(Y, m_APInt(C2)) && X->hasNUses(2)) {
|
|
|
|
bool Overflow;
|
|
|
|
APInt Diff = C2->ssub_ov(*C1, Overflow);
|
|
|
|
if (!Overflow) {
|
|
|
|
// smin (add nsw A, C1), C2 --> add nsw (smin A, C2 - C1), C1
|
|
|
|
// smax (add nsw A, C1), C2 --> add nsw (smax A, C2 - C1), C1
|
|
|
|
Value *NewMinMax = createMinMax(Builder, SPF, A,
|
|
|
|
ConstantInt::get(X->getType(), Diff));
|
|
|
|
return BinaryOperator::CreateNSW(BinaryOperator::Add, NewMinMax,
|
|
|
|
ConstantInt::get(X->getType(), *C1));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
[InstCombine] move add after umin/umax
In the motivating cases from PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
...moving the add enables us to narrow the
min/max which eliminates zext/trunc which
enables signficantly better vectorization.
But that bug is still not completely fixed.
https://rise4fun.com/Alive/5KQ
Name: umax
Pre: C1 u>= C0
%a = add nuw i8 %x, C0
%cond = icmp ugt i8 %a, C1
%r = select i1 %cond, i8 %a, i8 C1
=>
%c2 = icmp ugt i8 %x, C1-C0
%u2 = select i1 %c2, i8 %x, i8 C1-C0
%r = add nuw i8 %u2, C0
Name: umin
Pre: C1 u>= C0
%a = add nuw i32 %x, C0
%cond = icmp ult i32 %a, C1
%r = select i1 %cond, i32 %a, i32 C1
=>
%c2 = icmp ult i32 %x, C1-C0
%u2 = select i1 %c2, i32 %x, i32 C1-C0
%r = add nuw i32 %u2, C0
llvm-svn: 355221
2019-03-02 03:42:40 +08:00
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2019-10-22 23:39:47 +08:00
|
|
|
/// Match a sadd_sat or ssub_sat which is using min/max to clamp the value.
|
2020-06-03 21:56:40 +08:00
|
|
|
Instruction *InstCombinerImpl::matchSAddSubSat(SelectInst &MinMax1) {
|
2019-10-22 23:39:47 +08:00
|
|
|
Type *Ty = MinMax1.getType();
|
|
|
|
|
|
|
|
// We are looking for a tree of:
|
|
|
|
// max(INT_MIN, min(INT_MAX, add(sext(A), sext(B))))
|
|
|
|
// Where the min and max could be reversed
|
|
|
|
Instruction *MinMax2;
|
|
|
|
BinaryOperator *AddSub;
|
|
|
|
const APInt *MinValue, *MaxValue;
|
|
|
|
if (match(&MinMax1, m_SMin(m_Instruction(MinMax2), m_APInt(MaxValue)))) {
|
|
|
|
if (!match(MinMax2, m_SMax(m_BinOp(AddSub), m_APInt(MinValue))))
|
|
|
|
return nullptr;
|
|
|
|
} else if (match(&MinMax1,
|
|
|
|
m_SMax(m_Instruction(MinMax2), m_APInt(MinValue)))) {
|
|
|
|
if (!match(MinMax2, m_SMin(m_BinOp(AddSub), m_APInt(MaxValue))))
|
|
|
|
return nullptr;
|
|
|
|
} else
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Check that the constants clamp a saturate, and that the new type would be
|
|
|
|
// sensible to convert to.
|
|
|
|
if (!(*MaxValue + 1).isPowerOf2() || -*MinValue != *MaxValue + 1)
|
|
|
|
return nullptr;
|
|
|
|
// In what bitwidth can this be treated as saturating arithmetics?
|
|
|
|
unsigned NewBitWidth = (*MaxValue + 1).logBase2() + 1;
|
|
|
|
// FIXME: This isn't quite right for vectors, but using the scalar type is a
|
|
|
|
// good first approximation for what should be done there.
|
|
|
|
if (!shouldChangeType(Ty->getScalarType()->getIntegerBitWidth(), NewBitWidth))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Also make sure that the number of uses is as expected. The "3"s are for the
|
|
|
|
// the two items of min/max (the compare and the select).
|
|
|
|
if (MinMax2->hasNUsesOrMore(3) || AddSub->hasNUsesOrMore(3))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Create the new type (which can be a vector type)
|
|
|
|
Type *NewTy = Ty->getWithNewBitWidth(NewBitWidth);
|
|
|
|
// Match the two extends from the add/sub
|
|
|
|
Value *A, *B;
|
|
|
|
if(!match(AddSub, m_BinOp(m_SExt(m_Value(A)), m_SExt(m_Value(B)))))
|
|
|
|
return nullptr;
|
|
|
|
// And check the incoming values are of a type smaller than or equal to the
|
|
|
|
// size of the saturation. Otherwise the higher bits can cause different
|
|
|
|
// results.
|
|
|
|
if (A->getType()->getScalarSizeInBits() > NewBitWidth ||
|
|
|
|
B->getType()->getScalarSizeInBits() > NewBitWidth)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Intrinsic::ID IntrinsicID;
|
|
|
|
if (AddSub->getOpcode() == Instruction::Add)
|
|
|
|
IntrinsicID = Intrinsic::sadd_sat;
|
|
|
|
else if (AddSub->getOpcode() == Instruction::Sub)
|
|
|
|
IntrinsicID = Intrinsic::ssub_sat;
|
|
|
|
else
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Finally create and return the sat intrinsic, truncated to the new type
|
|
|
|
Function *F = Intrinsic::getDeclaration(MinMax1.getModule(), IntrinsicID, NewTy);
|
|
|
|
Value *AT = Builder.CreateSExt(A, NewTy);
|
|
|
|
Value *BT = Builder.CreateSExt(B, NewTy);
|
|
|
|
Value *Sat = Builder.CreateCall(F, {AT, BT});
|
|
|
|
return CastInst::Create(Instruction::SExt, Sat, Ty);
|
|
|
|
}
|
|
|
|
|
2018-01-08 23:05:34 +08:00
|
|
|
/// Reduce a sequence of min/max with a common operand.
|
|
|
|
static Instruction *factorizeMinMaxTree(SelectPatternFlavor SPF, Value *LHS,
|
|
|
|
Value *RHS,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
assert(SelectPatternResult::isMinOrMax(SPF) && "Expected a min/max");
|
|
|
|
// TODO: Allow FP min/max with nnan/nsz.
|
|
|
|
if (!LHS->getType()->isIntOrIntVectorTy())
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Match 3 of the same min/max ops. Example: umin(umin(), umin()).
|
|
|
|
Value *A, *B, *C, *D;
|
|
|
|
SelectPatternResult L = matchSelectPattern(LHS, A, B);
|
|
|
|
SelectPatternResult R = matchSelectPattern(RHS, C, D);
|
|
|
|
if (SPF != L.Flavor || L.Flavor != R.Flavor)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Look for a common operand. The use checks are different than usual because
|
|
|
|
// a min/max pattern typically has 2 uses of each op: 1 by the cmp and 1 by
|
|
|
|
// the select.
|
|
|
|
Value *MinMaxOp = nullptr;
|
|
|
|
Value *ThirdOp = nullptr;
|
2018-03-13 02:46:05 +08:00
|
|
|
if (!LHS->hasNUsesOrMore(3) && RHS->hasNUsesOrMore(3)) {
|
2018-01-08 23:05:34 +08:00
|
|
|
// If the LHS is only used in this chain and the RHS is used outside of it,
|
|
|
|
// reuse the RHS min/max because that will eliminate the LHS.
|
|
|
|
if (D == A || C == A) {
|
|
|
|
// min(min(a, b), min(c, a)) --> min(min(c, a), b)
|
|
|
|
// min(min(a, b), min(a, d)) --> min(min(a, d), b)
|
|
|
|
MinMaxOp = RHS;
|
|
|
|
ThirdOp = B;
|
|
|
|
} else if (D == B || C == B) {
|
|
|
|
// min(min(a, b), min(c, b)) --> min(min(c, b), a)
|
|
|
|
// min(min(a, b), min(b, d)) --> min(min(b, d), a)
|
|
|
|
MinMaxOp = RHS;
|
|
|
|
ThirdOp = A;
|
|
|
|
}
|
2018-03-13 02:46:05 +08:00
|
|
|
} else if (!RHS->hasNUsesOrMore(3)) {
|
2018-01-08 23:05:34 +08:00
|
|
|
// Reuse the LHS. This will eliminate the RHS.
|
|
|
|
if (D == A || D == B) {
|
|
|
|
// min(min(a, b), min(c, a)) --> min(min(a, b), c)
|
|
|
|
// min(min(a, b), min(c, b)) --> min(min(a, b), c)
|
|
|
|
MinMaxOp = LHS;
|
|
|
|
ThirdOp = C;
|
|
|
|
} else if (C == A || C == B) {
|
|
|
|
// min(min(a, b), min(b, d)) --> min(min(a, b), d)
|
|
|
|
// min(min(a, b), min(c, b)) --> min(min(a, b), d)
|
|
|
|
MinMaxOp = LHS;
|
|
|
|
ThirdOp = D;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!MinMaxOp || !ThirdOp)
|
|
|
|
return nullptr;
|
|
|
|
|
2018-03-07 00:57:55 +08:00
|
|
|
CmpInst::Predicate P = getMinMaxPred(SPF);
|
2018-01-08 23:05:34 +08:00
|
|
|
Value *CmpABC = Builder.CreateICmp(P, MinMaxOp, ThirdOp);
|
|
|
|
return SelectInst::Create(CmpABC, MinMaxOp, ThirdOp);
|
|
|
|
}
|
|
|
|
|
[InstCombine] canonicalize rotate patterns with cmp/select
The cmp+branch variant of this pattern is shown in:
https://bugs.llvm.org/show_bug.cgi?id=34924
...and as discussed there, we probably can't transform
that without a rotate intrinsic. We do have that now
via funnel shift, but we're not quite ready to
canonicalize IR to that form yet. The case with 'select'
should already be transformed though, so that's this patch.
The sequence with negation followed by masking is what we
use in the backend and partly in clang (though that part
should be updated).
https://rise4fun.com/Alive/TplC
%cmp = icmp eq i32 %shamt, 0
%sub = sub i32 32, %shamt
%shr = lshr i32 %x, %shamt
%shl = shl i32 %x, %sub
%or = or i32 %shr, %shl
%r = select i1 %cmp, i32 %x, i32 %or
=>
%neg = sub i32 0, %shamt
%masked = and i32 %shamt, 31
%maskedneg = and i32 %neg, 31
%shl2 = lshr i32 %x, %masked
%shr2 = shl i32 %x, %maskedneg
%r = or i32 %shl2, %shr2
llvm-svn: 346807
2018-11-14 06:47:24 +08:00
|
|
|
/// Try to reduce a rotate pattern that includes a compare and select into a
|
2019-01-02 05:51:39 +08:00
|
|
|
/// funnel shift intrinsic. Example:
|
[InstCombine] canonicalize rotate patterns with cmp/select
The cmp+branch variant of this pattern is shown in:
https://bugs.llvm.org/show_bug.cgi?id=34924
...and as discussed there, we probably can't transform
that without a rotate intrinsic. We do have that now
via funnel shift, but we're not quite ready to
canonicalize IR to that form yet. The case with 'select'
should already be transformed though, so that's this patch.
The sequence with negation followed by masking is what we
use in the backend and partly in clang (though that part
should be updated).
https://rise4fun.com/Alive/TplC
%cmp = icmp eq i32 %shamt, 0
%sub = sub i32 32, %shamt
%shr = lshr i32 %x, %shamt
%shl = shl i32 %x, %sub
%or = or i32 %shr, %shl
%r = select i1 %cmp, i32 %x, i32 %or
=>
%neg = sub i32 0, %shamt
%masked = and i32 %shamt, 31
%maskedneg = and i32 %neg, 31
%shl2 = lshr i32 %x, %masked
%shr2 = shl i32 %x, %maskedneg
%r = or i32 %shl2, %shr2
llvm-svn: 346807
2018-11-14 06:47:24 +08:00
|
|
|
/// rotl32(a, b) --> (b == 0 ? a : ((a >> (32 - b)) | (a << b)))
|
2019-01-02 05:51:39 +08:00
|
|
|
/// --> call llvm.fshl.i32(a, a, b)
|
[InstCombine] allow peeking through zext of shift amount to match rotate idioms (PR45701)
We might want to also allow trunc of the shift amount, but that seems less likely?
define i32 @src(i32 %x, i1 %y) {
%0:
%rem = and i1 %y, 1
%cmp = icmp eq i1 %rem, 0
%sh_prom = zext i1 %rem to i32
%sub = sub nsw nuw i1 0, %rem
%sh_prom1 = zext i1 %sub to i32
%shr = lshr i32 %x, %sh_prom1
%shl = shl i32 %x, %sh_prom
%or = or i32 %shl, %shr
%r = select i1 %cmp, i32 %x, i32 %or
ret i32 %r
}
=>
define i32 @tgt(i32 %x, i1 %y) {
%0:
%t = zext i1 %y to i32
%r = fshl i32 %x, i32 %x, i32 %t
ret i32 %r
}
Transformation seems to be correct!
https://alive2.llvm.org/ce/z/xgMvE3
http://bugs.llvm.org/PR45701
2020-07-21 03:49:01 +08:00
|
|
|
static Instruction *foldSelectRotate(SelectInst &Sel,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
[InstCombine] canonicalize rotate patterns with cmp/select
The cmp+branch variant of this pattern is shown in:
https://bugs.llvm.org/show_bug.cgi?id=34924
...and as discussed there, we probably can't transform
that without a rotate intrinsic. We do have that now
via funnel shift, but we're not quite ready to
canonicalize IR to that form yet. The case with 'select'
should already be transformed though, so that's this patch.
The sequence with negation followed by masking is what we
use in the backend and partly in clang (though that part
should be updated).
https://rise4fun.com/Alive/TplC
%cmp = icmp eq i32 %shamt, 0
%sub = sub i32 32, %shamt
%shr = lshr i32 %x, %shamt
%shl = shl i32 %x, %sub
%or = or i32 %shr, %shl
%r = select i1 %cmp, i32 %x, i32 %or
=>
%neg = sub i32 0, %shamt
%masked = and i32 %shamt, 31
%maskedneg = and i32 %neg, 31
%shl2 = lshr i32 %x, %masked
%shr2 = shl i32 %x, %maskedneg
%r = or i32 %shl2, %shr2
llvm-svn: 346807
2018-11-14 06:47:24 +08:00
|
|
|
// The false value of the select must be a rotate of the true value.
|
2020-10-16 20:18:31 +08:00
|
|
|
BinaryOperator *Or0, *Or1;
|
|
|
|
if (!match(Sel.getFalseValue(), m_OneUse(m_Or(m_BinOp(Or0), m_BinOp(Or1)))))
|
[InstCombine] canonicalize rotate patterns with cmp/select
The cmp+branch variant of this pattern is shown in:
https://bugs.llvm.org/show_bug.cgi?id=34924
...and as discussed there, we probably can't transform
that without a rotate intrinsic. We do have that now
via funnel shift, but we're not quite ready to
canonicalize IR to that form yet. The case with 'select'
should already be transformed though, so that's this patch.
The sequence with negation followed by masking is what we
use in the backend and partly in clang (though that part
should be updated).
https://rise4fun.com/Alive/TplC
%cmp = icmp eq i32 %shamt, 0
%sub = sub i32 32, %shamt
%shr = lshr i32 %x, %shamt
%shl = shl i32 %x, %sub
%or = or i32 %shr, %shl
%r = select i1 %cmp, i32 %x, i32 %or
=>
%neg = sub i32 0, %shamt
%masked = and i32 %shamt, 31
%maskedneg = and i32 %neg, 31
%shl2 = lshr i32 %x, %masked
%shr2 = shl i32 %x, %maskedneg
%r = or i32 %shl2, %shr2
llvm-svn: 346807
2018-11-14 06:47:24 +08:00
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Value *TVal = Sel.getTrueValue();
|
|
|
|
Value *SA0, *SA1;
|
[InstCombine] allow peeking through zext of shift amount to match rotate idioms (PR45701)
We might want to also allow trunc of the shift amount, but that seems less likely?
define i32 @src(i32 %x, i1 %y) {
%0:
%rem = and i1 %y, 1
%cmp = icmp eq i1 %rem, 0
%sh_prom = zext i1 %rem to i32
%sub = sub nsw nuw i1 0, %rem
%sh_prom1 = zext i1 %sub to i32
%shr = lshr i32 %x, %sh_prom1
%shl = shl i32 %x, %sh_prom
%or = or i32 %shl, %shr
%r = select i1 %cmp, i32 %x, i32 %or
ret i32 %r
}
=>
define i32 @tgt(i32 %x, i1 %y) {
%0:
%t = zext i1 %y to i32
%r = fshl i32 %x, i32 %x, i32 %t
ret i32 %r
}
Transformation seems to be correct!
https://alive2.llvm.org/ce/z/xgMvE3
http://bugs.llvm.org/PR45701
2020-07-21 03:49:01 +08:00
|
|
|
if (!match(Or0, m_OneUse(m_LogicalShift(m_Specific(TVal),
|
|
|
|
m_ZExtOrSelf(m_Value(SA0))))) ||
|
|
|
|
!match(Or1, m_OneUse(m_LogicalShift(m_Specific(TVal),
|
2020-10-16 20:18:31 +08:00
|
|
|
m_ZExtOrSelf(m_Value(SA1))))) ||
|
|
|
|
Or0->getOpcode() == Or1->getOpcode())
|
[InstCombine] canonicalize rotate patterns with cmp/select
The cmp+branch variant of this pattern is shown in:
https://bugs.llvm.org/show_bug.cgi?id=34924
...and as discussed there, we probably can't transform
that without a rotate intrinsic. We do have that now
via funnel shift, but we're not quite ready to
canonicalize IR to that form yet. The case with 'select'
should already be transformed though, so that's this patch.
The sequence with negation followed by masking is what we
use in the backend and partly in clang (though that part
should be updated).
https://rise4fun.com/Alive/TplC
%cmp = icmp eq i32 %shamt, 0
%sub = sub i32 32, %shamt
%shr = lshr i32 %x, %shamt
%shl = shl i32 %x, %sub
%or = or i32 %shr, %shl
%r = select i1 %cmp, i32 %x, i32 %or
=>
%neg = sub i32 0, %shamt
%masked = and i32 %shamt, 31
%maskedneg = and i32 %neg, 31
%shl2 = lshr i32 %x, %masked
%shr2 = shl i32 %x, %maskedneg
%r = or i32 %shl2, %shr2
llvm-svn: 346807
2018-11-14 06:47:24 +08:00
|
|
|
return nullptr;
|
|
|
|
|
2020-10-16 20:18:31 +08:00
|
|
|
// Canonicalize to or(shl(TVal, SA0), lshr(TVal, SA1)).
|
|
|
|
if (Or0->getOpcode() == BinaryOperator::LShr) {
|
|
|
|
std::swap(Or0, Or1);
|
|
|
|
std::swap(SA0, SA1);
|
|
|
|
}
|
|
|
|
assert(Or0->getOpcode() == BinaryOperator::Shl &&
|
|
|
|
Or1->getOpcode() == BinaryOperator::LShr &&
|
|
|
|
"Illegal or(shift,shift) pair");
|
[InstCombine] canonicalize rotate patterns with cmp/select
The cmp+branch variant of this pattern is shown in:
https://bugs.llvm.org/show_bug.cgi?id=34924
...and as discussed there, we probably can't transform
that without a rotate intrinsic. We do have that now
via funnel shift, but we're not quite ready to
canonicalize IR to that form yet. The case with 'select'
should already be transformed though, so that's this patch.
The sequence with negation followed by masking is what we
use in the backend and partly in clang (though that part
should be updated).
https://rise4fun.com/Alive/TplC
%cmp = icmp eq i32 %shamt, 0
%sub = sub i32 32, %shamt
%shr = lshr i32 %x, %shamt
%shl = shl i32 %x, %sub
%or = or i32 %shr, %shl
%r = select i1 %cmp, i32 %x, i32 %or
=>
%neg = sub i32 0, %shamt
%masked = and i32 %shamt, 31
%maskedneg = and i32 %neg, 31
%shl2 = lshr i32 %x, %masked
%shr2 = shl i32 %x, %maskedneg
%r = or i32 %shl2, %shr2
llvm-svn: 346807
2018-11-14 06:47:24 +08:00
|
|
|
|
2020-10-16 20:18:31 +08:00
|
|
|
// We should now have this pattern:
|
[InstCombine] canonicalize rotate patterns with cmp/select
The cmp+branch variant of this pattern is shown in:
https://bugs.llvm.org/show_bug.cgi?id=34924
...and as discussed there, we probably can't transform
that without a rotate intrinsic. We do have that now
via funnel shift, but we're not quite ready to
canonicalize IR to that form yet. The case with 'select'
should already be transformed though, so that's this patch.
The sequence with negation followed by masking is what we
use in the backend and partly in clang (though that part
should be updated).
https://rise4fun.com/Alive/TplC
%cmp = icmp eq i32 %shamt, 0
%sub = sub i32 32, %shamt
%shr = lshr i32 %x, %shamt
%shl = shl i32 %x, %sub
%or = or i32 %shr, %shl
%r = select i1 %cmp, i32 %x, i32 %or
=>
%neg = sub i32 0, %shamt
%masked = and i32 %shamt, 31
%maskedneg = and i32 %neg, 31
%shl2 = lshr i32 %x, %masked
%shr2 = shl i32 %x, %maskedneg
%r = or i32 %shl2, %shr2
llvm-svn: 346807
2018-11-14 06:47:24 +08:00
|
|
|
// select ?, TVal, (or (shl TVal, SA0), (lshr TVal, SA1))
|
|
|
|
// This must be a power-of-2 rotate for a bitmasking transform to be valid.
|
|
|
|
unsigned Width = Sel.getType()->getScalarSizeInBits();
|
|
|
|
if (!isPowerOf2_32(Width))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Check the shift amounts to see if they are an opposite pair.
|
|
|
|
Value *ShAmt;
|
|
|
|
if (match(SA1, m_OneUse(m_Sub(m_SpecificInt(Width), m_Specific(SA0)))))
|
|
|
|
ShAmt = SA0;
|
|
|
|
else if (match(SA0, m_OneUse(m_Sub(m_SpecificInt(Width), m_Specific(SA1)))))
|
|
|
|
ShAmt = SA1;
|
|
|
|
else
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// Finally, see if the select is filtering out a shift-by-zero.
|
|
|
|
Value *Cond = Sel.getCondition();
|
|
|
|
ICmpInst::Predicate Pred;
|
|
|
|
if (!match(Cond, m_OneUse(m_ICmp(Pred, m_Specific(ShAmt), m_ZeroInt()))) ||
|
|
|
|
Pred != ICmpInst::ICMP_EQ)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// This is a rotate that avoids shift-by-bitwidth UB in a suboptimal way.
|
2019-01-02 05:51:39 +08:00
|
|
|
// Convert to funnel shift intrinsic.
|
2020-10-16 20:18:31 +08:00
|
|
|
bool IsFshl = (ShAmt == SA0);
|
2019-01-02 05:51:39 +08:00
|
|
|
Intrinsic::ID IID = IsFshl ? Intrinsic::fshl : Intrinsic::fshr;
|
|
|
|
Function *F = Intrinsic::getDeclaration(Sel.getModule(), IID, Sel.getType());
|
[InstCombine] allow peeking through zext of shift amount to match rotate idioms (PR45701)
We might want to also allow trunc of the shift amount, but that seems less likely?
define i32 @src(i32 %x, i1 %y) {
%0:
%rem = and i1 %y, 1
%cmp = icmp eq i1 %rem, 0
%sh_prom = zext i1 %rem to i32
%sub = sub nsw nuw i1 0, %rem
%sh_prom1 = zext i1 %sub to i32
%shr = lshr i32 %x, %sh_prom1
%shl = shl i32 %x, %sh_prom
%or = or i32 %shl, %shr
%r = select i1 %cmp, i32 %x, i32 %or
ret i32 %r
}
=>
define i32 @tgt(i32 %x, i1 %y) {
%0:
%t = zext i1 %y to i32
%r = fshl i32 %x, i32 %x, i32 %t
ret i32 %r
}
Transformation seems to be correct!
https://alive2.llvm.org/ce/z/xgMvE3
http://bugs.llvm.org/PR45701
2020-07-21 03:49:01 +08:00
|
|
|
ShAmt = Builder.CreateZExt(ShAmt, Sel.getType());
|
2019-01-02 05:51:39 +08:00
|
|
|
return IntrinsicInst::Create(F, { TVal, TVal, ShAmt });
|
[InstCombine] canonicalize rotate patterns with cmp/select
The cmp+branch variant of this pattern is shown in:
https://bugs.llvm.org/show_bug.cgi?id=34924
...and as discussed there, we probably can't transform
that without a rotate intrinsic. We do have that now
via funnel shift, but we're not quite ready to
canonicalize IR to that form yet. The case with 'select'
should already be transformed though, so that's this patch.
The sequence with negation followed by masking is what we
use in the backend and partly in clang (though that part
should be updated).
https://rise4fun.com/Alive/TplC
%cmp = icmp eq i32 %shamt, 0
%sub = sub i32 32, %shamt
%shr = lshr i32 %x, %shamt
%shl = shl i32 %x, %sub
%or = or i32 %shr, %shl
%r = select i1 %cmp, i32 %x, i32 %or
=>
%neg = sub i32 0, %shamt
%masked = and i32 %shamt, 31
%maskedneg = and i32 %neg, 31
%shl2 = lshr i32 %x, %masked
%shr2 = shl i32 %x, %maskedneg
%r = or i32 %shl2, %shr2
llvm-svn: 346807
2018-11-14 06:47:24 +08:00
|
|
|
}
|
|
|
|
|
2020-01-20 23:25:47 +08:00
|
|
|
static Instruction *foldSelectToCopysign(SelectInst &Sel,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
Value *Cond = Sel.getCondition();
|
|
|
|
Value *TVal = Sel.getTrueValue();
|
|
|
|
Value *FVal = Sel.getFalseValue();
|
|
|
|
Type *SelType = Sel.getType();
|
|
|
|
|
|
|
|
// Match select ?, TC, FC where the constants are equal but negated.
|
|
|
|
// TODO: Generalize to handle a negated variable operand?
|
|
|
|
const APFloat *TC, *FC;
|
|
|
|
if (!match(TVal, m_APFloat(TC)) || !match(FVal, m_APFloat(FC)) ||
|
|
|
|
!abs(*TC).bitwiseIsEqual(abs(*FC)))
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
assert(TC != FC && "Expected equal select arms to simplify");
|
|
|
|
|
|
|
|
Value *X;
|
|
|
|
const APInt *C;
|
|
|
|
bool IsTrueIfSignSet;
|
|
|
|
ICmpInst::Predicate Pred;
|
|
|
|
if (!match(Cond, m_OneUse(m_ICmp(Pred, m_BitCast(m_Value(X)), m_APInt(C)))) ||
|
2020-06-03 21:56:40 +08:00
|
|
|
!InstCombiner::isSignBitCheck(Pred, *C, IsTrueIfSignSet) ||
|
|
|
|
X->getType() != SelType)
|
2020-01-20 23:25:47 +08:00
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
// If needed, negate the value that will be the sign argument of the copysign:
|
|
|
|
// (bitcast X) < 0 ? -TC : TC --> copysign(TC, X)
|
|
|
|
// (bitcast X) < 0 ? TC : -TC --> copysign(TC, -X)
|
|
|
|
// (bitcast X) >= 0 ? -TC : TC --> copysign(TC, -X)
|
|
|
|
// (bitcast X) >= 0 ? TC : -TC --> copysign(TC, X)
|
|
|
|
if (IsTrueIfSignSet ^ TC->isNegative())
|
|
|
|
X = Builder.CreateFNegFMF(X, &Sel);
|
|
|
|
|
|
|
|
// Canonicalize the magnitude argument as the positive constant since we do
|
|
|
|
// not care about its sign.
|
|
|
|
Value *MagArg = TC->isNegative() ? FVal : TVal;
|
|
|
|
Function *F = Intrinsic::getDeclaration(Sel.getModule(), Intrinsic::copysign,
|
|
|
|
Sel.getType());
|
|
|
|
Instruction *CopySign = IntrinsicInst::Create(F, { MagArg, X });
|
|
|
|
CopySign->setFastMathFlags(Sel.getFastMathFlags());
|
|
|
|
return CopySign;
|
|
|
|
}
|
|
|
|
|
2020-06-03 21:56:40 +08:00
|
|
|
Instruction *InstCombinerImpl::foldVectorSelect(SelectInst &Sel) {
|
2020-06-02 02:06:46 +08:00
|
|
|
auto *VecTy = dyn_cast<FixedVectorType>(Sel.getType());
|
|
|
|
if (!VecTy)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
unsigned NumElts = VecTy->getNumElements();
|
|
|
|
APInt UndefElts(NumElts, 0);
|
|
|
|
APInt AllOnesEltMask(APInt::getAllOnesValue(NumElts));
|
|
|
|
if (Value *V = SimplifyDemandedVectorElts(&Sel, AllOnesEltMask, UndefElts)) {
|
|
|
|
if (V != &Sel)
|
|
|
|
return replaceInstUsesWith(Sel, V);
|
|
|
|
return &Sel;
|
|
|
|
}
|
|
|
|
|
2020-06-05 02:17:59 +08:00
|
|
|
// A select of a "select shuffle" with a common operand can be rearranged
|
|
|
|
// to select followed by "select shuffle". Because of poison, this only works
|
|
|
|
// in the case of a shuffle with no undefined mask elements.
|
|
|
|
Value *Cond = Sel.getCondition();
|
|
|
|
Value *TVal = Sel.getTrueValue();
|
|
|
|
Value *FVal = Sel.getFalseValue();
|
|
|
|
Value *X, *Y;
|
|
|
|
ArrayRef<int> Mask;
|
|
|
|
if (match(TVal, m_OneUse(m_Shuffle(m_Value(X), m_Value(Y), m_Mask(Mask)))) &&
|
|
|
|
!is_contained(Mask, UndefMaskElem) &&
|
2020-06-05 05:25:22 +08:00
|
|
|
cast<ShuffleVectorInst>(TVal)->isSelect()) {
|
2020-06-05 02:17:59 +08:00
|
|
|
if (X == FVal) {
|
|
|
|
// select Cond, (shuf_sel X, Y), X --> shuf_sel X, (select Cond, Y, X)
|
|
|
|
Value *NewSel = Builder.CreateSelect(Cond, Y, X, "sel", &Sel);
|
|
|
|
return new ShuffleVectorInst(X, NewSel, Mask);
|
|
|
|
}
|
|
|
|
if (Y == FVal) {
|
|
|
|
// select Cond, (shuf_sel X, Y), Y --> shuf_sel (select Cond, X, Y), Y
|
|
|
|
Value *NewSel = Builder.CreateSelect(Cond, X, Y, "sel", &Sel);
|
|
|
|
return new ShuffleVectorInst(NewSel, Y, Mask);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (match(FVal, m_OneUse(m_Shuffle(m_Value(X), m_Value(Y), m_Mask(Mask)))) &&
|
|
|
|
!is_contained(Mask, UndefMaskElem) &&
|
2020-06-05 05:25:22 +08:00
|
|
|
cast<ShuffleVectorInst>(FVal)->isSelect()) {
|
2020-06-05 02:17:59 +08:00
|
|
|
if (X == TVal) {
|
|
|
|
// select Cond, X, (shuf_sel X, Y) --> shuf_sel X, (select Cond, X, Y)
|
|
|
|
Value *NewSel = Builder.CreateSelect(Cond, X, Y, "sel", &Sel);
|
|
|
|
return new ShuffleVectorInst(X, NewSel, Mask);
|
|
|
|
}
|
|
|
|
if (Y == TVal) {
|
|
|
|
// select Cond, Y, (shuf_sel X, Y) --> shuf_sel (select Cond, Y, X), Y
|
|
|
|
Value *NewSel = Builder.CreateSelect(Cond, Y, X, "sel", &Sel);
|
|
|
|
return new ShuffleVectorInst(NewSel, Y, Mask);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-06-02 02:06:46 +08:00
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2020-07-13 12:14:59 +08:00
|
|
|
static Instruction *foldSelectToPhiImpl(SelectInst &Sel, BasicBlock *BB,
|
|
|
|
const DominatorTree &DT,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
2020-06-23 12:46:59 +08:00
|
|
|
// Find the block's immediate dominator that ends with a conditional branch
|
|
|
|
// that matches select's condition (maybe inverted).
|
|
|
|
auto *IDomNode = DT[BB]->getIDom();
|
|
|
|
if (!IDomNode)
|
|
|
|
return nullptr;
|
|
|
|
BasicBlock *IDom = IDomNode->getBlock();
|
|
|
|
|
|
|
|
Value *Cond = Sel.getCondition();
|
|
|
|
Value *IfTrue, *IfFalse;
|
|
|
|
BasicBlock *TrueSucc, *FalseSucc;
|
|
|
|
if (match(IDom->getTerminator(),
|
|
|
|
m_Br(m_Specific(Cond), m_BasicBlock(TrueSucc),
|
|
|
|
m_BasicBlock(FalseSucc)))) {
|
|
|
|
IfTrue = Sel.getTrueValue();
|
|
|
|
IfFalse = Sel.getFalseValue();
|
|
|
|
} else if (match(IDom->getTerminator(),
|
|
|
|
m_Br(m_Not(m_Specific(Cond)), m_BasicBlock(TrueSucc),
|
|
|
|
m_BasicBlock(FalseSucc)))) {
|
|
|
|
IfTrue = Sel.getFalseValue();
|
|
|
|
IfFalse = Sel.getTrueValue();
|
|
|
|
} else
|
|
|
|
return nullptr;
|
|
|
|
|
[InstCombine] Fix replace select with Phis when branch has the same labels
```
define i32 @test(i1 %cond) {
entry:
br i1 %cond, label %exit, label %exit
exit:
%result = select i1 %cond, i32 123, i32 456
ret i32 %result
}
```
In this test, after applying transformation of replacing select with Phis,
the result will be:
```
define i32 @test(i1 %cond) {
entry:
br i1 %cond, label %exit, label %exit
exit:
%result = i32 phi [123, %exit], [123, %exit]
ret i32 %result
}
```
That is, select is transformed into an invalid Phi, which will then be
reduced to 123 and the second value will be lost. But it is worth
noting that this problem will arise only if select is in the InstCombine
worklist will be before the branch. Otherwise, InstCombine will replace
the branch condition with false and transformation will not be applied.
The fix is to check the target labels in the branch condition for equality.
Patch By: Kirill Polushin
Differential Revision: https://reviews.llvm.org/D84003
Reviewed By: mkazantsev
2020-07-17 15:01:59 +08:00
|
|
|
// Make sure the branches are actually different.
|
|
|
|
if (TrueSucc == FalseSucc)
|
|
|
|
return nullptr;
|
|
|
|
|
2020-06-25 11:42:16 +08:00
|
|
|
// We want to replace select %cond, %a, %b with a phi that takes value %a
|
|
|
|
// for all incoming edges that are dominated by condition `%cond == true`,
|
|
|
|
// and value %b for edges dominated by condition `%cond == false`. If %a
|
|
|
|
// or %b are also phis from the same basic block, we can go further and take
|
|
|
|
// their incoming values from the corresponding blocks.
|
2020-06-23 12:46:59 +08:00
|
|
|
BasicBlockEdge TrueEdge(IDom, TrueSucc);
|
|
|
|
BasicBlockEdge FalseEdge(IDom, FalseSucc);
|
|
|
|
DenseMap<BasicBlock *, Value *> Inputs;
|
|
|
|
for (auto *Pred : predecessors(BB)) {
|
|
|
|
// Check implication.
|
|
|
|
BasicBlockEdge Incoming(Pred, BB);
|
|
|
|
if (DT.dominates(TrueEdge, Incoming))
|
2020-06-25 11:42:16 +08:00
|
|
|
Inputs[Pred] = IfTrue->DoPHITranslation(BB, Pred);
|
2020-06-23 12:46:59 +08:00
|
|
|
else if (DT.dominates(FalseEdge, Incoming))
|
2020-06-25 11:42:16 +08:00
|
|
|
Inputs[Pred] = IfFalse->DoPHITranslation(BB, Pred);
|
2020-06-23 12:46:59 +08:00
|
|
|
else
|
|
|
|
return nullptr;
|
|
|
|
// Check availability.
|
|
|
|
if (auto *Insn = dyn_cast<Instruction>(Inputs[Pred]))
|
|
|
|
if (!DT.dominates(Insn, Pred->getTerminator()))
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
|
|
|
Builder.SetInsertPoint(&*BB->begin());
|
|
|
|
auto *PN = Builder.CreatePHI(Sel.getType(), Inputs.size());
|
|
|
|
for (auto *Pred : predecessors(BB))
|
|
|
|
PN->addIncoming(Inputs[Pred], Pred);
|
|
|
|
PN->takeName(&Sel);
|
|
|
|
return PN;
|
|
|
|
}
|
|
|
|
|
2020-07-13 12:14:59 +08:00
|
|
|
static Instruction *foldSelectToPhi(SelectInst &Sel, const DominatorTree &DT,
|
|
|
|
InstCombiner::BuilderTy &Builder) {
|
|
|
|
// Try to replace this select with Phi in one of these blocks.
|
|
|
|
SmallSetVector<BasicBlock *, 4> CandidateBlocks;
|
|
|
|
CandidateBlocks.insert(Sel.getParent());
|
|
|
|
for (Value *V : Sel.operands())
|
|
|
|
if (auto *I = dyn_cast<Instruction>(V))
|
|
|
|
CandidateBlocks.insert(I->getParent());
|
|
|
|
|
|
|
|
for (BasicBlock *BB : CandidateBlocks)
|
|
|
|
if (auto *PN = foldSelectToPhiImpl(Sel, BB, DT, Builder))
|
|
|
|
return PN;
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2020-08-07 20:12:52 +08:00
|
|
|
static Value *foldSelectWithFrozenICmp(SelectInst &Sel, InstCombiner::BuilderTy &Builder) {
|
|
|
|
FreezeInst *FI = dyn_cast<FreezeInst>(Sel.getCondition());
|
|
|
|
if (!FI)
|
|
|
|
return nullptr;
|
|
|
|
|
|
|
|
Value *Cond = FI->getOperand(0);
|
|
|
|
Value *TrueVal = Sel.getTrueValue(), *FalseVal = Sel.getFalseValue();
|
|
|
|
|
|
|
|
// select (freeze(x == y)), x, y --> y
|
|
|
|
// select (freeze(x != y)), x, y --> x
|
|
|
|
// The freeze should be only used by this select. Otherwise, remaining uses of
|
|
|
|
// the freeze can observe a contradictory value.
|
|
|
|
// c = freeze(x == y) ; Let's assume that y = poison & x = 42; c is 0 or 1
|
|
|
|
// a = select c, x, y ;
|
|
|
|
// f(a, c) ; f(poison, 1) cannot happen, but if a is folded
|
|
|
|
// ; to y, this can happen.
|
|
|
|
CmpInst::Predicate Pred;
|
|
|
|
if (FI->hasOneUse() &&
|
|
|
|
match(Cond, m_c_ICmp(Pred, m_Specific(TrueVal), m_Specific(FalseVal))) &&
|
|
|
|
(Pred == ICmpInst::ICMP_EQ || Pred == ICmpInst::ICMP_NE)) {
|
|
|
|
return Pred == ICmpInst::ICMP_EQ ? FalseVal : TrueVal;
|
|
|
|
}
|
|
|
|
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
|
2020-06-03 21:56:40 +08:00
|
|
|
Instruction *InstCombinerImpl::visitSelectInst(SelectInst &SI) {
|
2010-01-05 14:03:12 +08:00
|
|
|
Value *CondVal = SI.getCondition();
|
|
|
|
Value *TrueVal = SI.getTrueValue();
|
|
|
|
Value *FalseVal = SI.getFalseValue();
|
2016-07-07 23:28:17 +08:00
|
|
|
Type *SelType = SI.getType();
|
2010-01-05 14:03:12 +08:00
|
|
|
|
2017-07-26 07:37:17 +08:00
|
|
|
// FIXME: Remove this workaround when freeze related patches are done.
|
|
|
|
// For select with undef operand which feeds into an equality comparison,
|
|
|
|
// don't simplify it so loop unswitch can know the equality comparison
|
|
|
|
// may have an undef operand. This is a workaround for PR31652 caused by
|
|
|
|
// descrepancy about branch on undef between LoopUnswitch and GVN.
|
|
|
|
if (isa<UndefValue>(TrueVal) || isa<UndefValue>(FalseVal)) {
|
2017-10-25 05:24:53 +08:00
|
|
|
if (llvm::any_of(SI.users(), [&](User *U) {
|
2017-07-26 07:37:17 +08:00
|
|
|
ICmpInst *CI = dyn_cast<ICmpInst>(U);
|
|
|
|
if (CI && CI->isEquality())
|
|
|
|
return true;
|
|
|
|
return false;
|
|
|
|
})) {
|
|
|
|
return nullptr;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-06-09 11:21:29 +08:00
|
|
|
if (Value *V = SimplifySelectInst(CondVal, TrueVal, FalseVal,
|
|
|
|
SQ.getWithInstruction(&SI)))
|
2016-02-02 06:23:39 +08:00
|
|
|
return replaceInstUsesWith(SI, V);
|
2010-01-05 14:03:12 +08:00
|
|
|
|
2016-09-17 06:16:18 +08:00
|
|
|
if (Instruction *I = canonicalizeSelectToShuffle(SI))
|
|
|
|
return I;
|
|
|
|
|
2020-02-04 04:17:36 +08:00
|
|
|
if (Instruction *I = canonicalizeScalarSelectOfVecs(SI, *this))
|
[InstCombine] canonicalize a scalar-select-of-vectors to vector select
This pattern may arise more frequently with an enhancement to SLP vectorization suggested in PR42755:
https://bugs.llvm.org/show_bug.cgi?id=42755
...but we should handle this pattern to make things easier for the backend either way.
For all in-tree targets that I looked at, codegen for typical vector sizes looks better when we change
to a vector select, so this is safe to do without a cost model (in other words, as a target-independent
canonicalization).
For example, if the condition of the select is a scalar, we end up with something like this on x86:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpextrb $12, %xmm0, %eax
testb $1, %al
jne LBB0_2
## %bb.1:
vmovaps %xmm3, %xmm2
LBB0_2:
vmovaps %xmm2, %xmm0
Rather than the splat-condition variant:
vpcmpgtd %xmm0, %xmm1, %xmm0
vpshufd $255, %xmm0, %xmm0 ## xmm0 = xmm0[3,3,3,3]
vblendvps %xmm0, %xmm2, %xmm3, %xmm0
Differential Revision: https://reviews.llvm.org/D66095
llvm-svn: 369140
2019-08-17 02:51:30 +08:00
|
|
|
return I;
|
|
|
|
|
2017-06-28 01:53:22 +08:00
|
|
|
CmpInst::Predicate Pred;
|
|
|
|
|
2017-07-09 15:04:03 +08:00
|
|
|
if (SelType->isIntOrIntVectorTy(1) &&
|
2016-07-03 22:34:39 +08:00
|
|
|
TrueVal->getType() == CondVal->getType()) {
|
2016-07-07 05:01:26 +08:00
|
|
|
if (match(TrueVal, m_One())) {
|
|
|
|
// Change: A = select B, true, C --> A = or B, C
|
|
|
|
return BinaryOperator::CreateOr(CondVal, FalseVal);
|
|
|
|
}
|
|
|
|
if (match(TrueVal, m_Zero())) {
|
2010-04-20 13:32:14 +08:00
|
|
|
// Change: A = select B, false, C --> A = and !B, C
|
2017-07-08 07:16:26 +08:00
|
|
|
Value *NotCond = Builder.CreateNot(CondVal, "not." + CondVal->getName());
|
2010-04-20 13:32:14 +08:00
|
|
|
return BinaryOperator::CreateAnd(NotCond, FalseVal);
|
2013-04-19 09:18:04 +08:00
|
|
|
}
|
2016-07-07 05:01:26 +08:00
|
|
|
if (match(FalseVal, m_Zero())) {
|
|
|
|
// Change: A = select B, C, false --> A = and B, C
|
|
|
|
return BinaryOperator::CreateAnd(CondVal, TrueVal);
|
|
|
|
}
|
|
|
|
if (match(FalseVal, m_One())) {
|
2010-04-20 13:32:14 +08:00
|
|
|
// Change: A = select B, C, true --> A = or !B, C
|
2017-07-08 07:16:26 +08:00
|
|
|
Value *NotCond = Builder.CreateNot(CondVal, "not." + CondVal->getName());
|
2010-04-20 13:32:14 +08:00
|
|
|
return BinaryOperator::CreateOr(NotCond, TrueVal);
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
2011-01-08 05:33:13 +08:00
|
|
|
|
2016-07-03 22:08:19 +08:00
|
|
|
// select a, a, b -> a | b
|
|
|
|
// select a, b, a -> a & b
|
2010-01-05 14:03:12 +08:00
|
|
|
if (CondVal == TrueVal)
|
|
|
|
return BinaryOperator::CreateOr(CondVal, FalseVal);
|
2013-04-19 09:18:04 +08:00
|
|
|
if (CondVal == FalseVal)
|
2010-01-05 14:03:12 +08:00
|
|
|
return BinaryOperator::CreateAnd(CondVal, TrueVal);
|
2011-12-15 08:56:45 +08:00
|
|
|
|
2016-07-03 22:08:19 +08:00
|
|
|
// select a, ~a, b -> (~a) & b
|
|
|
|
// select a, b, ~a -> (~a) | b
|
2011-12-15 08:56:45 +08:00
|
|
|
if (match(TrueVal, m_Not(m_Specific(CondVal))))
|
|
|
|
return BinaryOperator::CreateAnd(TrueVal, FalseVal);
|
2013-04-19 09:18:04 +08:00
|
|
|
if (match(FalseVal, m_Not(m_Specific(CondVal))))
|
2011-12-15 08:56:45 +08:00
|
|
|
return BinaryOperator::CreateOr(TrueVal, FalseVal);
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
|
2016-07-07 06:23:01 +08:00
|
|
|
// Selecting between two integer or vector splat integer constants?
|
|
|
|
//
|
|
|
|
// Note that we don't handle a scalar select of vectors:
|
|
|
|
// select i1 %c, <2 x i8> <1, 1>, <2 x i8> <0, 0>
|
|
|
|
// because that may need 3 instructions to splat the condition value:
|
|
|
|
// extend, insertelement, shufflevector.
|
2017-07-09 11:25:17 +08:00
|
|
|
if (SelType->isIntOrIntVectorTy() &&
|
|
|
|
CondVal->getType()->isVectorTy() == SelType->isVectorTy()) {
|
2016-07-07 06:23:01 +08:00
|
|
|
// select C, 1, 0 -> zext C to int
|
|
|
|
if (match(TrueVal, m_One()) && match(FalseVal, m_Zero()))
|
2016-07-07 23:28:17 +08:00
|
|
|
return new ZExtInst(CondVal, SelType);
|
2016-07-07 06:23:01 +08:00
|
|
|
|
|
|
|
// select C, -1, 0 -> sext C to int
|
|
|
|
if (match(TrueVal, m_AllOnes()) && match(FalseVal, m_Zero()))
|
2016-07-07 23:28:17 +08:00
|
|
|
return new SExtInst(CondVal, SelType);
|
2016-07-07 06:23:01 +08:00
|
|
|
|
|
|
|
// select C, 0, 1 -> zext !C to int
|
|
|
|
if (match(TrueVal, m_Zero()) && match(FalseVal, m_One())) {
|
2017-07-08 07:16:26 +08:00
|
|
|
Value *NotCond = Builder.CreateNot(CondVal, "not." + CondVal->getName());
|
2016-07-07 23:28:17 +08:00
|
|
|
return new ZExtInst(NotCond, SelType);
|
2016-07-07 06:23:01 +08:00
|
|
|
}
|
2010-01-05 14:03:12 +08:00
|
|
|
|
2016-07-07 06:23:01 +08:00
|
|
|
// select C, 0, -1 -> sext !C to int
|
|
|
|
if (match(TrueVal, m_Zero()) && match(FalseVal, m_AllOnes())) {
|
2017-07-08 07:16:26 +08:00
|
|
|
Value *NotCond = Builder.CreateNot(CondVal, "not." + CondVal->getName());
|
2016-07-07 23:28:17 +08:00
|
|
|
return new SExtInst(NotCond, SelType);
|
2016-07-07 06:23:01 +08:00
|
|
|
}
|
|
|
|
}
|
2010-12-11 17:42:59 +08:00
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// See if we are selecting two values based on a comparison of the two values.
|
|
|
|
if (FCmpInst *FCI = dyn_cast<FCmpInst>(CondVal)) {
|
2019-11-01 01:10:34 +08:00
|
|
|
Value *Cmp0 = FCI->getOperand(0), *Cmp1 = FCI->getOperand(1);
|
|
|
|
if ((Cmp0 == TrueVal && Cmp1 == FalseVal) ||
|
|
|
|
(Cmp0 == FalseVal && Cmp1 == TrueVal)) {
|
2014-11-25 07:15:18 +08:00
|
|
|
// Canonicalize to use ordered comparisons by swapping the select
|
|
|
|
// operands.
|
|
|
|
//
|
|
|
|
// e.g.
|
|
|
|
// (X ugt Y) ? X : Y -> (X ole Y) ? Y : X
|
|
|
|
if (FCI->hasOneUse() && FCmpInst::isUnordered(FCI->getPredicate())) {
|
|
|
|
FCmpInst::Predicate InvPred = FCI->getInversePredicate();
|
2017-07-08 07:16:26 +08:00
|
|
|
IRBuilder<>::FastMathFlagGuard FMFG(Builder);
|
2019-11-13 23:35:34 +08:00
|
|
|
// FIXME: The FMF should propagate from the select, not the fcmp.
|
2017-07-08 07:16:26 +08:00
|
|
|
Builder.setFastMathFlags(FCI->getFastMathFlags());
|
2019-11-01 01:10:34 +08:00
|
|
|
Value *NewCond = Builder.CreateFCmp(InvPred, Cmp0, Cmp1,
|
2017-07-08 07:16:26 +08:00
|
|
|
FCI->getName() + ".inv");
|
2019-11-13 23:35:34 +08:00
|
|
|
Value *NewSel = Builder.CreateSelect(NewCond, FalseVal, TrueVal);
|
|
|
|
return replaceInstUsesWith(SI, NewSel);
|
2014-11-25 07:15:18 +08:00
|
|
|
}
|
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// NOTE: if we wanted to, this is where to detect MIN/MAX
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-06-10 22:46:36 +08:00
|
|
|
// Canonicalize select with fcmp to fabs(). -0.0 makes this tricky. We need
|
|
|
|
// fast-math-flags (nsz) or fsub with +0.0 (not fneg) for this to work. We
|
|
|
|
// also require nnan because we do not want to unintentionally change the
|
|
|
|
// sign of a NaN value.
|
|
|
|
// FIXME: These folds should test/propagate FMF from the select, not the
|
|
|
|
// fsub or fneg.
|
|
|
|
// (X <= +/-0.0) ? (0.0 - X) : X --> fabs(X)
|
|
|
|
Instruction *FSub;
|
|
|
|
if (match(CondVal, m_FCmp(Pred, m_Specific(FalseVal), m_AnyZeroFP())) &&
|
|
|
|
match(TrueVal, m_FSub(m_PosZeroFP(), m_Specific(FalseVal))) &&
|
2019-06-10 22:57:45 +08:00
|
|
|
match(TrueVal, m_Instruction(FSub)) && FSub->hasNoNaNs() &&
|
2019-06-10 23:39:00 +08:00
|
|
|
(Pred == FCmpInst::FCMP_OLE || Pred == FCmpInst::FCMP_ULE)) {
|
2019-06-10 22:46:36 +08:00
|
|
|
Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, FalseVal, FSub);
|
|
|
|
return replaceInstUsesWith(SI, Fabs);
|
|
|
|
}
|
|
|
|
// (X > +/-0.0) ? X : (0.0 - X) --> fabs(X)
|
|
|
|
if (match(CondVal, m_FCmp(Pred, m_Specific(TrueVal), m_AnyZeroFP())) &&
|
|
|
|
match(FalseVal, m_FSub(m_PosZeroFP(), m_Specific(TrueVal))) &&
|
2019-06-10 22:57:45 +08:00
|
|
|
match(FalseVal, m_Instruction(FSub)) && FSub->hasNoNaNs() &&
|
2019-06-10 23:39:00 +08:00
|
|
|
(Pred == FCmpInst::FCMP_OGT || Pred == FCmpInst::FCMP_UGT)) {
|
2019-06-10 22:46:36 +08:00
|
|
|
Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, TrueVal, FSub);
|
|
|
|
return replaceInstUsesWith(SI, Fabs);
|
|
|
|
}
|
2019-06-10 00:22:01 +08:00
|
|
|
// With nnan and nsz:
|
|
|
|
// (X < +/-0.0) ? -X : X --> fabs(X)
|
|
|
|
// (X <= +/-0.0) ? -X : X --> fabs(X)
|
|
|
|
Instruction *FNeg;
|
|
|
|
if (match(CondVal, m_FCmp(Pred, m_Specific(FalseVal), m_AnyZeroFP())) &&
|
|
|
|
match(TrueVal, m_FNeg(m_Specific(FalseVal))) &&
|
|
|
|
match(TrueVal, m_Instruction(FNeg)) &&
|
|
|
|
FNeg->hasNoNaNs() && FNeg->hasNoSignedZeros() &&
|
2019-06-10 22:14:51 +08:00
|
|
|
(Pred == FCmpInst::FCMP_OLT || Pred == FCmpInst::FCMP_OLE ||
|
|
|
|
Pred == FCmpInst::FCMP_ULT || Pred == FCmpInst::FCMP_ULE)) {
|
2019-06-10 00:22:01 +08:00
|
|
|
Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, FalseVal, FNeg);
|
|
|
|
return replaceInstUsesWith(SI, Fabs);
|
|
|
|
}
|
|
|
|
// With nnan and nsz:
|
|
|
|
// (X > +/-0.0) ? X : -X --> fabs(X)
|
|
|
|
// (X >= +/-0.0) ? X : -X --> fabs(X)
|
|
|
|
if (match(CondVal, m_FCmp(Pred, m_Specific(TrueVal), m_AnyZeroFP())) &&
|
|
|
|
match(FalseVal, m_FNeg(m_Specific(TrueVal))) &&
|
|
|
|
match(FalseVal, m_Instruction(FNeg)) &&
|
|
|
|
FNeg->hasNoNaNs() && FNeg->hasNoSignedZeros() &&
|
2019-06-10 22:14:51 +08:00
|
|
|
(Pred == FCmpInst::FCMP_OGT || Pred == FCmpInst::FCMP_OGE ||
|
|
|
|
Pred == FCmpInst::FCMP_UGT || Pred == FCmpInst::FCMP_UGE)) {
|
2019-06-10 00:22:01 +08:00
|
|
|
Value *Fabs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, TrueVal, FNeg);
|
|
|
|
return replaceInstUsesWith(SI, Fabs);
|
|
|
|
}
|
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// See if we are selecting two values based on a comparison of the two values.
|
|
|
|
if (ICmpInst *ICI = dyn_cast<ICmpInst>(CondVal))
|
2016-09-30 06:18:30 +08:00
|
|
|
if (Instruction *Result = foldSelectInstWithICmp(SI, ICI))
|
2010-01-05 14:03:12 +08:00
|
|
|
return Result;
|
|
|
|
|
2017-07-08 07:16:26 +08:00
|
|
|
if (Instruction *Add = foldAddSubSelect(SI, Builder))
|
2016-06-09 05:10:01 +08:00
|
|
|
return Add;
|
2019-10-31 20:42:36 +08:00
|
|
|
if (Instruction *Add = foldOverflowingAddSubSelect(SI, Builder))
|
|
|
|
return Add;
|
[InstCombine] use select-of-constants with set/clear bit mask patterns
Cond ? (X & ~C) : (X | C) --> (X & ~C) | (Cond ? 0 : C)
Cond ? (X | C) : (X & ~C) --> (X & ~C) | (Cond ? C : 0)
The select-of-constants form results in better codegen.
There's an existing test diff that shows a transform that
results in an extra IR instruction, but that's an existing
problem.
This is motivated by code seen in LLVM itself - see PR37581:
https://bugs.llvm.org/show_bug.cgi?id=37581
define i8 @src(i8 %x, i8 %C, i1 %b) {
%notC = xor i8 %C, -1
%and = and i8 %x, %notC
%or = or i8 %x, %C
%cond = select i1 %b, i8 %or, i8 %and
ret i8 %cond
}
define i8 @tgt(i8 %x, i8 %C, i1 %b) {
%notC = xor i8 %C, -1
%and = and i8 %x, %notC
%mul = select i1 %b, i8 %C, i8 0
%or = or i8 %mul, %and
ret i8 %or
}
http://volta.cs.utah.edu:8080/z/Vt2WVm
Differential Revision: https://reviews.llvm.org/D78880
2020-05-03 21:43:49 +08:00
|
|
|
if (Instruction *Or = foldSetClearBits(SI, Builder))
|
|
|
|
return Or;
|
2016-06-09 05:10:01 +08:00
|
|
|
|
[InstCombine] allow more than one use for vector bitcast folding with selects
The motivating example for this transform is similar to D20774 where bitcasts interfere
with a single cmp/select sequence, but in this case we have 2 uses of each bitcast to
produce min and max ops:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%bc1 = bitcast <4 x float> %a to <4 x i32>
%bc2 = bitcast <4 x float> %b to <4 x i32>
%sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2
%sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1
%bc3 = bitcast <4 x float>* %ptr1 to <4 x i32>*
store <4 x i32> %sel1, <4 x i32>* %bc3
%bc4 = bitcast <4 x float>* %ptr2 to <4 x i32>*
store <4 x i32> %sel2, <4 x i32>* %bc4
ret void
}
With this patch, we move the selects up to use the input args which allows getting rid of
all of the bitcasts:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%sel1.v = select <4 x i1> %cmp, <4 x float> %a, <4 x float> %b
%sel2.v = select <4 x i1> %cmp, <4 x float> %b, <4 x float> %a
store <4 x float> %sel1.v, <4 x float>* %ptr1, align 16
store <4 x float> %sel2.v, <4 x float>* %ptr2, align 16
ret void
}
The asm for x86 SSE then improves from:
movaps %xmm0, %xmm2
cmpltps %xmm1, %xmm2
movaps %xmm2, %xmm3
andnps %xmm1, %xmm3
movaps %xmm2, %xmm4
andnps %xmm0, %xmm4
andps %xmm2, %xmm0
orps %xmm3, %xmm0
andps %xmm1, %xmm2
orps %xmm4, %xmm2
movaps %xmm0, (%rdi)
movaps %xmm2, (%rsi)
To:
movaps %xmm0, %xmm2
minps %xmm1, %xmm2
maxps %xmm0, %xmm1
movaps %xmm2, (%rdi)
movaps %xmm1, (%rsi)
The TODO comments show that we're limiting this transform only to vectors and only to bitcasts
because we need to improve other transforms or risk creating worse codegen.
Differential Revision: http://reviews.llvm.org/D21190
llvm-svn: 273011
2016-06-18 00:46:50 +08:00
|
|
|
// Turn (select C, (op X, Y), (op X, Z)) -> (op X, (select C, Y, Z))
|
2016-06-09 04:09:04 +08:00
|
|
|
auto *TI = dyn_cast<Instruction>(TrueVal);
|
|
|
|
auto *FI = dyn_cast<Instruction>(FalseVal);
|
[InstCombine] allow more than one use for vector bitcast folding with selects
The motivating example for this transform is similar to D20774 where bitcasts interfere
with a single cmp/select sequence, but in this case we have 2 uses of each bitcast to
produce min and max ops:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%bc1 = bitcast <4 x float> %a to <4 x i32>
%bc2 = bitcast <4 x float> %b to <4 x i32>
%sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2
%sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1
%bc3 = bitcast <4 x float>* %ptr1 to <4 x i32>*
store <4 x i32> %sel1, <4 x i32>* %bc3
%bc4 = bitcast <4 x float>* %ptr2 to <4 x i32>*
store <4 x i32> %sel2, <4 x i32>* %bc4
ret void
}
With this patch, we move the selects up to use the input args which allows getting rid of
all of the bitcasts:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%sel1.v = select <4 x i1> %cmp, <4 x float> %a, <4 x float> %b
%sel2.v = select <4 x i1> %cmp, <4 x float> %b, <4 x float> %a
store <4 x float> %sel1.v, <4 x float>* %ptr1, align 16
store <4 x float> %sel2.v, <4 x float>* %ptr2, align 16
ret void
}
The asm for x86 SSE then improves from:
movaps %xmm0, %xmm2
cmpltps %xmm1, %xmm2
movaps %xmm2, %xmm3
andnps %xmm1, %xmm3
movaps %xmm2, %xmm4
andnps %xmm0, %xmm4
andps %xmm2, %xmm0
orps %xmm3, %xmm0
andps %xmm1, %xmm2
orps %xmm4, %xmm2
movaps %xmm0, (%rdi)
movaps %xmm2, (%rsi)
To:
movaps %xmm0, %xmm2
minps %xmm1, %xmm2
maxps %xmm0, %xmm1
movaps %xmm2, (%rdi)
movaps %xmm1, (%rsi)
The TODO comments show that we're limiting this transform only to vectors and only to bitcasts
because we need to improve other transforms or risk creating worse codegen.
Differential Revision: http://reviews.llvm.org/D21190
llvm-svn: 273011
2016-06-18 00:46:50 +08:00
|
|
|
if (TI && FI && TI->getOpcode() == FI->getOpcode())
|
2016-09-30 06:18:30 +08:00
|
|
|
if (Instruction *IV = foldSelectOpOp(SI, TI, FI))
|
[InstCombine] allow more than one use for vector bitcast folding with selects
The motivating example for this transform is similar to D20774 where bitcasts interfere
with a single cmp/select sequence, but in this case we have 2 uses of each bitcast to
produce min and max ops:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%bc1 = bitcast <4 x float> %a to <4 x i32>
%bc2 = bitcast <4 x float> %b to <4 x i32>
%sel1 = select <4 x i1> %cmp, <4 x i32> %bc1, <4 x i32> %bc2
%sel2 = select <4 x i1> %cmp, <4 x i32> %bc2, <4 x i32> %bc1
%bc3 = bitcast <4 x float>* %ptr1 to <4 x i32>*
store <4 x i32> %sel1, <4 x i32>* %bc3
%bc4 = bitcast <4 x float>* %ptr2 to <4 x i32>*
store <4 x i32> %sel2, <4 x i32>* %bc4
ret void
}
With this patch, we move the selects up to use the input args which allows getting rid of
all of the bitcasts:
define void @minmax_bc_store(<4 x float> %a, <4 x float> %b, <4 x float>* %ptr1, <4 x float>* %ptr2) {
%cmp = fcmp olt <4 x float> %a, %b
%sel1.v = select <4 x i1> %cmp, <4 x float> %a, <4 x float> %b
%sel2.v = select <4 x i1> %cmp, <4 x float> %b, <4 x float> %a
store <4 x float> %sel1.v, <4 x float>* %ptr1, align 16
store <4 x float> %sel2.v, <4 x float>* %ptr2, align 16
ret void
}
The asm for x86 SSE then improves from:
movaps %xmm0, %xmm2
cmpltps %xmm1, %xmm2
movaps %xmm2, %xmm3
andnps %xmm1, %xmm3
movaps %xmm2, %xmm4
andnps %xmm0, %xmm4
andps %xmm2, %xmm0
orps %xmm3, %xmm0
andps %xmm1, %xmm2
orps %xmm4, %xmm2
movaps %xmm0, (%rdi)
movaps %xmm2, (%rsi)
To:
movaps %xmm0, %xmm2
minps %xmm1, %xmm2
maxps %xmm0, %xmm1
movaps %xmm2, (%rdi)
movaps %xmm1, (%rsi)
The TODO comments show that we're limiting this transform only to vectors and only to bitcasts
because we need to improve other transforms or risk creating worse codegen.
Differential Revision: http://reviews.llvm.org/D21190
llvm-svn: 273011
2016-06-18 00:46:50 +08:00
|
|
|
return IV;
|
2010-01-05 14:03:12 +08:00
|
|
|
|
2016-10-01 03:49:22 +08:00
|
|
|
if (Instruction *I = foldSelectExtConst(SI))
|
|
|
|
return I;
|
[InstCombine] try to fold (select C, (sext A), B) into logical ops
Summary:
Turn (select C, (sext A), B) into (sext (select C, A, B')) when A is i1 and
B is a compatible constant, also for zext instead of sext. This will then be
further folded into logical operations.
The transformation would be valid for non-i1 types as well, but other parts of
InstCombine prefer to have sext from non-i1 as an operand of select.
Motivated by the shader compiler frontend in Mesa for AMDGPU, which emits i32
for boolean operations. With this change, the boolean logic is fully
recovered.
Reviewers: majnemer, spatel, tstellarAMD
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22747
llvm-svn: 277801
2016-08-05 16:22:29 +08:00
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// See if we can fold the select into one of our operands.
|
2016-07-07 23:28:17 +08:00
|
|
|
if (SelType->isIntOrIntVectorTy() || SelType->isFPOrFPVectorTy()) {
|
2016-09-30 06:18:30 +08:00
|
|
|
if (Instruction *FoldI = foldSelectIntoOp(SI, TrueVal, FalseVal))
|
2010-01-05 14:03:12 +08:00
|
|
|
return FoldI;
|
2011-01-08 05:33:13 +08:00
|
|
|
|
2018-08-20 13:35:12 +08:00
|
|
|
Value *LHS, *RHS;
|
2015-05-21 02:41:25 +08:00
|
|
|
Instruction::CastOps CastOp;
|
2015-08-11 17:12:57 +08:00
|
|
|
SelectPatternResult SPR = matchSelectPattern(&SI, LHS, RHS, &CastOp);
|
|
|
|
auto SPF = SPR.Flavor;
|
2018-09-14 00:04:06 +08:00
|
|
|
if (SPF) {
|
|
|
|
Value *LHS2, *RHS2;
|
|
|
|
if (SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor)
|
|
|
|
if (Instruction *R = foldSPFofSPF(cast<Instruction>(LHS), SPF2, LHS2,
|
|
|
|
RHS2, SI, SPF, RHS))
|
|
|
|
return R;
|
|
|
|
if (SelectPatternFlavor SPF2 = matchSelectPattern(RHS, LHS2, RHS2).Flavor)
|
|
|
|
if (Instruction *R = foldSPFofSPF(cast<Instruction>(RHS), SPF2, LHS2,
|
|
|
|
RHS2, SI, SPF, LHS))
|
|
|
|
return R;
|
|
|
|
// TODO.
|
|
|
|
// ABS(-X) -> ABS(X)
|
|
|
|
}
|
2015-02-24 08:08:41 +08:00
|
|
|
|
2015-12-06 07:44:22 +08:00
|
|
|
if (SelectPatternResult::isMinOrMax(SPF)) {
|
[InstCombine] Canonicalize clamp of float types to minmax in fast mode.
Summary:
This commit allows matchSelectPattern to recognize clamp of float
arguments in the presence of FMF the same way as already done for
integers.
This case is a little different though. With integers, given the
min/max pattern is recognized, DAGBuilder starts selecting MIN/MAX
"automatically". That is not the case for float, because for them only
full FMINNAN/FMINNUM/FMAXNAN/FMAXNUM ISD nodes exist and they do care
about NaNs. On the other hand, some backends (e.g. X86) have only
FMIN/FMAX nodes that do not care about NaNS and the former NAN/NUM
nodes are illegal thus selection is not happening. So I decided to do
such kind of transformation in IR (InstCombiner) instead of
complicating the logic in the backend.
Reviewers: spatel, jmolloy, majnemer, efriedma, craig.topper
Reviewed By: efriedma
Subscribers: hiraditya, javed.absar, n.bozhenov, llvm-commits
Patch by Andrei Elovikov <andrei.elovikov@intel.com>
Differential Revision: https://reviews.llvm.org/D33186
llvm-svn: 310054
2017-08-04 20:22:17 +08:00
|
|
|
// Canonicalize so that
|
|
|
|
// - type casts are outside select patterns.
|
|
|
|
// - float clamp is transformed to min/max pattern
|
|
|
|
|
|
|
|
bool IsCastNeeded = LHS->getType() != SelType;
|
|
|
|
Value *CmpLHS = cast<CmpInst>(CondVal)->getOperand(0);
|
|
|
|
Value *CmpRHS = cast<CmpInst>(CondVal)->getOperand(1);
|
|
|
|
if (IsCastNeeded ||
|
|
|
|
(LHS->getType()->isFPOrFPVectorTy() &&
|
|
|
|
((CmpLHS != LHS && CmpLHS != RHS) ||
|
|
|
|
(CmpRHS != LHS && CmpRHS != RHS)))) {
|
2019-08-28 22:05:38 +08:00
|
|
|
CmpInst::Predicate MinMaxPred = getMinMaxPred(SPF, SPR.Ordered);
|
2015-08-11 17:12:57 +08:00
|
|
|
|
|
|
|
Value *Cmp;
|
2019-08-28 22:05:38 +08:00
|
|
|
if (CmpInst::isIntPredicate(MinMaxPred)) {
|
|
|
|
Cmp = Builder.CreateICmp(MinMaxPred, LHS, RHS);
|
2015-08-11 17:12:57 +08:00
|
|
|
} else {
|
2017-07-08 07:16:26 +08:00
|
|
|
IRBuilder<>::FastMathFlagGuard FMFG(Builder);
|
2019-08-28 22:05:38 +08:00
|
|
|
auto FMF =
|
|
|
|
cast<FPMathOperator>(SI.getCondition())->getFastMathFlags();
|
2017-07-08 07:16:26 +08:00
|
|
|
Builder.setFastMathFlags(FMF);
|
2019-08-28 22:05:38 +08:00
|
|
|
Cmp = Builder.CreateFCmp(MinMaxPred, LHS, RHS);
|
2015-08-11 17:12:57 +08:00
|
|
|
}
|
|
|
|
|
[InstCombine] Canonicalize clamp of float types to minmax in fast mode.
Summary:
This commit allows matchSelectPattern to recognize clamp of float
arguments in the presence of FMF the same way as already done for
integers.
This case is a little different though. With integers, given the
min/max pattern is recognized, DAGBuilder starts selecting MIN/MAX
"automatically". That is not the case for float, because for them only
full FMINNAN/FMINNUM/FMAXNAN/FMAXNUM ISD nodes exist and they do care
about NaNs. On the other hand, some backends (e.g. X86) have only
FMIN/FMAX nodes that do not care about NaNS and the former NAN/NUM
nodes are illegal thus selection is not happening. So I decided to do
such kind of transformation in IR (InstCombiner) instead of
complicating the logic in the backend.
Reviewers: spatel, jmolloy, majnemer, efriedma, craig.topper
Reviewed By: efriedma
Subscribers: hiraditya, javed.absar, n.bozhenov, llvm-commits
Patch by Andrei Elovikov <andrei.elovikov@intel.com>
Differential Revision: https://reviews.llvm.org/D33186
llvm-svn: 310054
2017-08-04 20:22:17 +08:00
|
|
|
Value *NewSI = Builder.CreateSelect(Cmp, LHS, RHS, SI.getName(), &SI);
|
|
|
|
if (!IsCastNeeded)
|
|
|
|
return replaceInstUsesWith(SI, NewSI);
|
|
|
|
|
|
|
|
Value *NewCast = Builder.CreateCast(CastOp, NewSI, SelType);
|
|
|
|
return replaceInstUsesWith(SI, NewCast);
|
2015-05-21 02:41:25 +08:00
|
|
|
}
|
2018-01-06 03:01:17 +08:00
|
|
|
|
|
|
|
// MAX(~a, ~b) -> ~MIN(a, b)
|
2018-09-22 13:53:27 +08:00
|
|
|
// MAX(~a, C) -> ~MIN(a, ~C)
|
2018-01-06 03:01:17 +08:00
|
|
|
// MIN(~a, ~b) -> ~MAX(a, b)
|
2018-09-22 13:53:27 +08:00
|
|
|
// MIN(~a, C) -> ~MAX(a, ~C)
|
2018-11-15 01:55:07 +08:00
|
|
|
auto moveNotAfterMinMax = [&](Value *X, Value *Y) -> Instruction * {
|
2018-09-22 13:53:27 +08:00
|
|
|
Value *A;
|
|
|
|
if (match(X, m_Not(m_Value(A))) && !X->hasNUsesOrMore(3) &&
|
2019-08-13 20:49:16 +08:00
|
|
|
!isFreeToInvert(A, A->hasOneUse()) &&
|
2018-09-22 13:53:27 +08:00
|
|
|
// Passing false to only consider m_Not and constants.
|
2019-08-13 20:49:16 +08:00
|
|
|
isFreeToInvert(Y, false)) {
|
2018-09-22 13:53:27 +08:00
|
|
|
Value *B = Builder.CreateNot(Y);
|
|
|
|
Value *NewMinMax = createMinMax(Builder, getInverseMinMaxFlavor(SPF),
|
|
|
|
A, B);
|
|
|
|
// Copy the profile metadata.
|
|
|
|
if (MDNode *MD = SI.getMetadata(LLVMContext::MD_prof)) {
|
|
|
|
cast<SelectInst>(NewMinMax)->setMetadata(LLVMContext::MD_prof, MD);
|
|
|
|
// Swap the metadata if the operands are swapped.
|
2018-11-15 01:55:07 +08:00
|
|
|
if (X == SI.getFalseValue() && Y == SI.getTrueValue())
|
2018-09-22 13:53:27 +08:00
|
|
|
cast<SelectInst>(NewMinMax)->swapProfMetadata();
|
|
|
|
}
|
|
|
|
|
|
|
|
return BinaryOperator::CreateNot(NewMinMax);
|
|
|
|
}
|
|
|
|
|
|
|
|
return nullptr;
|
|
|
|
};
|
|
|
|
|
2018-11-15 01:55:07 +08:00
|
|
|
if (Instruction *I = moveNotAfterMinMax(LHS, RHS))
|
2018-09-22 13:53:27 +08:00
|
|
|
return I;
|
2018-11-15 01:55:07 +08:00
|
|
|
if (Instruction *I = moveNotAfterMinMax(RHS, LHS))
|
2018-09-22 13:53:27 +08:00
|
|
|
return I;
|
2018-01-08 23:05:34 +08:00
|
|
|
|
[InstCombine] move add after umin/umax
In the motivating cases from PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613
...moving the add enables us to narrow the
min/max which eliminates zext/trunc which
enables signficantly better vectorization.
But that bug is still not completely fixed.
https://rise4fun.com/Alive/5KQ
Name: umax
Pre: C1 u>= C0
%a = add nuw i8 %x, C0
%cond = icmp ugt i8 %a, C1
%r = select i1 %cond, i8 %a, i8 C1
=>
%c2 = icmp ugt i8 %x, C1-C0
%u2 = select i1 %c2, i8 %x, i8 C1-C0
%r = add nuw i8 %u2, C0
Name: umin
Pre: C1 u>= C0
%a = add nuw i32 %x, C0
%cond = icmp ult i32 %a, C1
%r = select i1 %cond, i32 %a, i32 C1
=>
%c2 = icmp ult i32 %x, C1-C0
%u2 = select i1 %c2, i32 %x, i32 C1-C0
%r = add nuw i32 %u2, C0
llvm-svn: 355221
2019-03-02 03:42:40 +08:00
|
|
|
if (Instruction *I = moveAddAfterMinMax(SPF, LHS, RHS, Builder))
|
|
|
|
return I;
|
|
|
|
|
2018-01-08 23:05:34 +08:00
|
|
|
if (Instruction *I = factorizeMinMaxTree(SPF, LHS, RHS, Builder))
|
|
|
|
return I;
|
2019-10-22 23:39:47 +08:00
|
|
|
if (Instruction *I = matchSAddSubSat(SI))
|
|
|
|
return I;
|
2015-12-06 07:44:22 +08:00
|
|
|
}
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|
|
|
|
|
2019-06-30 21:40:31 +08:00
|
|
|
// Canonicalize select of FP values where NaN and -0.0 are not valid as
|
|
|
|
// minnum/maxnum intrinsics.
|
|
|
|
if (isa<FPMathOperator>(SI) && SI.hasNoNaNs() && SI.hasNoSignedZeros()) {
|
|
|
|
Value *X, *Y;
|
|
|
|
if (match(&SI, m_OrdFMax(m_Value(X), m_Value(Y))))
|
|
|
|
return replaceInstUsesWith(
|
|
|
|
SI, Builder.CreateBinaryIntrinsic(Intrinsic::maxnum, X, Y, &SI));
|
|
|
|
|
|
|
|
if (match(&SI, m_OrdFMin(m_Value(X), m_Value(Y))))
|
|
|
|
return replaceInstUsesWith(
|
|
|
|
SI, Builder.CreateBinaryIntrinsic(Intrinsic::minnum, X, Y, &SI));
|
|
|
|
}
|
|
|
|
|
2010-01-05 14:03:12 +08:00
|
|
|
// See if we can fold the select into a phi node if the condition is a select.
|
2017-04-15 03:20:12 +08:00
|
|
|
if (auto *PN = dyn_cast<PHINode>(SI.getCondition()))
|
2010-01-05 14:03:12 +08:00
|
|
|
// The true/false values have to be live in the PHI predecessor's blocks.
|
2016-09-30 06:18:30 +08:00
|
|
|
if (canSelectOperandBeMappingIntoPredBlock(TrueVal, SI) &&
|
|
|
|
canSelectOperandBeMappingIntoPredBlock(FalseVal, SI))
|
2017-04-15 03:20:12 +08:00
|
|
|
if (Instruction *NV = foldOpIntoPhi(SI, PN))
|
2010-01-05 14:03:12 +08:00
|
|
|
return NV;
|
|
|
|
|
2011-01-28 11:28:10 +08:00
|
|
|
if (SelectInst *TrueSI = dyn_cast<SelectInst>(TrueVal)) {
|
2015-03-04 06:40:36 +08:00
|
|
|
if (TrueSI->getCondition()->getType() == CondVal->getType()) {
|
|
|
|
// select(C, select(C, a, b), c) -> select(C, a, c)
|
|
|
|
if (TrueSI->getCondition() == CondVal) {
|
|
|
|
if (SI.getTrueValue() == TrueSI->getTrueValue())
|
|
|
|
return nullptr;
|
2020-02-04 04:17:36 +08:00
|
|
|
return replaceOperand(SI, 1, TrueSI->getTrueValue());
|
2015-03-04 06:40:36 +08:00
|
|
|
}
|
|
|
|
// select(C0, select(C1, a, b), b) -> select(C0&C1, a, b)
|
2020-07-31 12:07:10 +08:00
|
|
|
// We choose this as normal form to enable folding on the And and
|
|
|
|
// shortening paths for the values (this helps getUnderlyingObjects() for
|
|
|
|
// example).
|
2015-03-04 06:40:36 +08:00
|
|
|
if (TrueSI->getFalseValue() == FalseVal && TrueSI->hasOneUse()) {
|
2017-07-08 07:16:26 +08:00
|
|
|
Value *And = Builder.CreateAnd(CondVal, TrueSI->getCondition());
|
2020-03-31 03:48:33 +08:00
|
|
|
replaceOperand(SI, 0, And);
|
|
|
|
replaceOperand(SI, 1, TrueSI->getTrueValue());
|
2015-03-04 06:40:36 +08:00
|
|
|
return &SI;
|
|
|
|
}
|
InstCombine: Combine select sequences into a single select
Normalize
select(C0, select(C1, a, b), b) -> select((C0 & C1), a, b)
select(C0, a, select(C1, a, b)) -> select((C0 | C1), a, b)
This normal form may enable further combines on the And/Or and shortens
paths for the values. Many targets prefer the other but can go back
easily in CodeGen.
Differential Revision: http://reviews.llvm.org/D7399
llvm-svn: 228409
2015-02-07 01:49:36 +08:00
|
|
|
}
|
2011-01-28 11:28:10 +08:00
|
|
|
}
|
|
|
|
if (SelectInst *FalseSI = dyn_cast<SelectInst>(FalseVal)) {
|
2015-03-04 06:40:36 +08:00
|
|
|
if (FalseSI->getCondition()->getType() == CondVal->getType()) {
|
|
|
|
// select(C, a, select(C, b, c)) -> select(C, a, c)
|
|
|
|
if (FalseSI->getCondition() == CondVal) {
|
|
|
|
if (SI.getFalseValue() == FalseSI->getFalseValue())
|
|
|
|
return nullptr;
|
2020-02-04 04:17:36 +08:00
|
|
|
return replaceOperand(SI, 2, FalseSI->getFalseValue());
|
2015-03-04 06:40:36 +08:00
|
|
|
}
|
|
|
|
// select(C0, a, select(C1, a, b)) -> select(C0|C1, a, b)
|
|
|
|
if (FalseSI->getTrueValue() == TrueVal && FalseSI->hasOneUse()) {
|
2017-07-08 07:16:26 +08:00
|
|
|
Value *Or = Builder.CreateOr(CondVal, FalseSI->getCondition());
|
2020-03-31 03:48:33 +08:00
|
|
|
replaceOperand(SI, 0, Or);
|
|
|
|
replaceOperand(SI, 2, FalseSI->getFalseValue());
|
2015-03-04 06:40:36 +08:00
|
|
|
return &SI;
|
|
|
|
}
|
InstCombine: Combine select sequences into a single select
Normalize
select(C0, select(C1, a, b), b) -> select((C0 & C1), a, b)
select(C0, a, select(C1, a, b)) -> select((C0 | C1), a, b)
This normal form may enable further combines on the And/Or and shortens
paths for the values. Many targets prefer the other but can go back
easily in CodeGen.
Differential Revision: http://reviews.llvm.org/D7399
llvm-svn: 228409
2015-02-07 01:49:36 +08:00
|
|
|
}
|
2011-01-28 11:28:10 +08:00
|
|
|
}
|
|
|
|
|
2018-02-15 02:08:33 +08:00
|
|
|
auto canMergeSelectThroughBinop = [](BinaryOperator *BO) {
|
|
|
|
// The select might be preventing a division by 0.
|
|
|
|
switch (BO->getOpcode()) {
|
|
|
|
default:
|
|
|
|
return true;
|
|
|
|
case Instruction::SRem:
|
|
|
|
case Instruction::URem:
|
|
|
|
case Instruction::SDiv:
|
|
|
|
case Instruction::UDiv:
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2017-11-15 13:23:02 +08:00
|
|
|
// Try to simplify a binop sandwiched between 2 selects with the same
|
|
|
|
// condition.
|
|
|
|
// select(C, binop(select(C, X, Y), W), Z) -> select(C, binop(X, W), Z)
|
|
|
|
BinaryOperator *TrueBO;
|
2018-02-15 02:08:33 +08:00
|
|
|
if (match(TrueVal, m_OneUse(m_BinOp(TrueBO))) &&
|
|
|
|
canMergeSelectThroughBinop(TrueBO)) {
|
2017-11-15 13:23:02 +08:00
|
|
|
if (auto *TrueBOSI = dyn_cast<SelectInst>(TrueBO->getOperand(0))) {
|
|
|
|
if (TrueBOSI->getCondition() == CondVal) {
|
2020-03-31 03:48:33 +08:00
|
|
|
replaceOperand(*TrueBO, 0, TrueBOSI->getTrueValue());
|
2020-01-31 05:32:46 +08:00
|
|
|
Worklist.push(TrueBO);
|
2017-11-15 13:23:02 +08:00
|
|
|
return &SI;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (auto *TrueBOSI = dyn_cast<SelectInst>(TrueBO->getOperand(1))) {
|
|
|
|
if (TrueBOSI->getCondition() == CondVal) {
|
2020-03-31 03:48:33 +08:00
|
|
|
replaceOperand(*TrueBO, 1, TrueBOSI->getTrueValue());
|
2020-01-31 05:32:46 +08:00
|
|
|
Worklist.push(TrueBO);
|
2017-11-15 13:23:02 +08:00
|
|
|
return &SI;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// select(C, Z, binop(select(C, X, Y), W)) -> select(C, Z, binop(Y, W))
|
|
|
|
BinaryOperator *FalseBO;
|
2018-02-15 02:08:33 +08:00
|
|
|
if (match(FalseVal, m_OneUse(m_BinOp(FalseBO))) &&
|
|
|
|
canMergeSelectThroughBinop(FalseBO)) {
|
2017-11-15 13:23:02 +08:00
|
|
|
if (auto *FalseBOSI = dyn_cast<SelectInst>(FalseBO->getOperand(0))) {
|
|
|
|
if (FalseBOSI->getCondition() == CondVal) {
|
2020-03-31 03:48:33 +08:00
|
|
|
replaceOperand(*FalseBO, 0, FalseBOSI->getFalseValue());
|
2020-01-31 05:32:46 +08:00
|
|
|
Worklist.push(FalseBO);
|
2017-11-15 13:23:02 +08:00
|
|
|
return &SI;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (auto *FalseBOSI = dyn_cast<SelectInst>(FalseBO->getOperand(1))) {
|
|
|
|
if (FalseBOSI->getCondition() == CondVal) {
|
2020-03-31 03:48:33 +08:00
|
|
|
replaceOperand(*FalseBO, 1, FalseBOSI->getFalseValue());
|
2020-01-31 05:32:46 +08:00
|
|
|
Worklist.push(FalseBO);
|
2017-11-15 13:23:02 +08:00
|
|
|
return &SI;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-10-23 23:05:12 +08:00
|
|
|
Value *NotCond;
|
|
|
|
if (match(CondVal, m_Not(m_Value(NotCond)))) {
|
2020-02-04 04:17:36 +08:00
|
|
|
replaceOperand(SI, 0, NotCond);
|
2020-02-08 23:57:28 +08:00
|
|
|
SI.swapValues();
|
2018-10-23 22:43:31 +08:00
|
|
|
SI.swapProfMetadata();
|
2010-01-05 14:03:12 +08:00
|
|
|
return &SI;
|
|
|
|
}
|
|
|
|
|
2020-06-02 02:06:46 +08:00
|
|
|
if (Instruction *I = foldVectorSelect(SI))
|
|
|
|
return I;
|
2012-07-27 07:10:24 +08:00
|
|
|
|
2017-01-14 01:02:42 +08:00
|
|
|
// If we can compute the condition, there's no need for a select.
|
|
|
|
// Like the above fold, we are attempting to reduce compile-time cost by
|
|
|
|
// putting this fold here with limitations rather than in InstSimplify.
|
|
|
|
// The motivation for this call into value tracking is to take advantage of
|
|
|
|
// the assumption cache, so make sure that is populated.
|
|
|
|
if (!CondVal->getType()->isVectorTy() && !AC.assumptions().empty()) {
|
2017-04-27 00:39:58 +08:00
|
|
|
KnownBits Known(1);
|
|
|
|
computeKnownBits(CondVal, Known, 0, &SI);
|
2017-06-07 15:40:37 +08:00
|
|
|
if (Known.One.isOneValue())
|
2017-01-14 01:02:42 +08:00
|
|
|
return replaceInstUsesWith(SI, TrueVal);
|
2017-06-07 15:40:37 +08:00
|
|
|
if (Known.Zero.isOneValue())
|
2017-01-14 01:02:42 +08:00
|
|
|
return replaceInstUsesWith(SI, FalseVal);
|
|
|
|
}
|
|
|
|
|
2017-07-08 07:16:26 +08:00
|
|
|
if (Instruction *BitCastSel = foldSelectCmpBitcasts(SI, Builder))
|
2016-10-29 23:22:04 +08:00
|
|
|
return BitCastSel;
|
|
|
|
|
2017-10-31 20:34:02 +08:00
|
|
|
// Simplify selects that test the returned flag of cmpxchg instructions.
|
2020-03-30 00:55:59 +08:00
|
|
|
if (Value *V = foldSelectCmpXchg(SI))
|
|
|
|
return replaceInstUsesWith(SI, V);
|
2017-10-31 20:34:02 +08:00
|
|
|
|
2020-02-04 04:17:36 +08:00
|
|
|
if (Instruction *Select = foldSelectBinOpIdentity(SI, TLI, *this))
|
2018-07-31 04:38:53 +08:00
|
|
|
return Select;
|
|
|
|
|
[InstCombine] allow peeking through zext of shift amount to match rotate idioms (PR45701)
We might want to also allow trunc of the shift amount, but that seems less likely?
define i32 @src(i32 %x, i1 %y) {
%0:
%rem = and i1 %y, 1
%cmp = icmp eq i1 %rem, 0
%sh_prom = zext i1 %rem to i32
%sub = sub nsw nuw i1 0, %rem
%sh_prom1 = zext i1 %sub to i32
%shr = lshr i32 %x, %sh_prom1
%shl = shl i32 %x, %sh_prom
%or = or i32 %shl, %shr
%r = select i1 %cmp, i32 %x, i32 %or
ret i32 %r
}
=>
define i32 @tgt(i32 %x, i1 %y) {
%0:
%t = zext i1 %y to i32
%r = fshl i32 %x, i32 %x, i32 %t
ret i32 %r
}
Transformation seems to be correct!
https://alive2.llvm.org/ce/z/xgMvE3
http://bugs.llvm.org/PR45701
2020-07-21 03:49:01 +08:00
|
|
|
if (Instruction *Rot = foldSelectRotate(SI, Builder))
|
[InstCombine] canonicalize rotate patterns with cmp/select
The cmp+branch variant of this pattern is shown in:
https://bugs.llvm.org/show_bug.cgi?id=34924
...and as discussed there, we probably can't transform
that without a rotate intrinsic. We do have that now
via funnel shift, but we're not quite ready to
canonicalize IR to that form yet. The case with 'select'
should already be transformed though, so that's this patch.
The sequence with negation followed by masking is what we
use in the backend and partly in clang (though that part
should be updated).
https://rise4fun.com/Alive/TplC
%cmp = icmp eq i32 %shamt, 0
%sub = sub i32 32, %shamt
%shr = lshr i32 %x, %shamt
%shl = shl i32 %x, %sub
%or = or i32 %shr, %shl
%r = select i1 %cmp, i32 %x, i32 %or
=>
%neg = sub i32 0, %shamt
%masked = and i32 %shamt, 31
%maskedneg = and i32 %neg, 31
%shl2 = lshr i32 %x, %masked
%shr2 = shl i32 %x, %maskedneg
%r = or i32 %shl2, %shr2
llvm-svn: 346807
2018-11-14 06:47:24 +08:00
|
|
|
return Rot;
|
|
|
|
|
2020-01-20 23:25:47 +08:00
|
|
|
if (Instruction *Copysign = foldSelectToCopysign(SI, Builder))
|
|
|
|
return Copysign;
|
|
|
|
|
2020-06-23 12:46:59 +08:00
|
|
|
if (Instruction *PN = foldSelectToPhi(SI, DT, Builder))
|
|
|
|
return replaceInstUsesWith(SI, PN);
|
|
|
|
|
2020-08-07 20:12:52 +08:00
|
|
|
if (Value *Fr = foldSelectWithFrozenICmp(SI, Builder))
|
|
|
|
return replaceInstUsesWith(SI, Fr);
|
|
|
|
|
2014-04-25 13:29:35 +08:00
|
|
|
return nullptr;
|
2010-01-05 14:03:12 +08:00
|
|
|
}
|