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llvm-project/llvm/test/Transforms/EarlyCSE/read-reg.ll

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Preserve the order of READ_REGISTER and WRITE_REGISTER At the present time, we don't have a way to represent general dependency relationships, so everything is represented using memory dependency. In order to preserve the data dependency of a READ_REGISTER on WRITE_REGISTER, we need to model WRITE_REGISTER as writing (which we had been doing) and model READ_REGISTER as reading (which we had not been doing). Fix this, and also the way that the chain operands were generated at the SDAG level. Patch by Nicholas Paul Johnson, thanks! Test case by me. llvm-svn: 237584
2015-05-19 00:42:10 +08:00
; RUN: opt -S -early-cse < %s | FileCheck %s
[EarlyCSE] Optionally use MemorySSA. NFC. Summary: Use MemorySSA, if requested, to do less conservative memory dependency checking. This change doesn't enable the MemorySSA enhanced EarlyCSE in the default pipelines, so should be NFC. Reviewers: dberlin, sanjoy, reames, majnemer Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D19821 llvm-svn: 280279
2016-09-01 03:24:10 +08:00
; RUN: opt -S -basicaa -early-cse-memssa < %s | FileCheck %s
Preserve the order of READ_REGISTER and WRITE_REGISTER At the present time, we don't have a way to represent general dependency relationships, so everything is represented using memory dependency. In order to preserve the data dependency of a READ_REGISTER on WRITE_REGISTER, we need to model WRITE_REGISTER as writing (which we had been doing) and model READ_REGISTER as reading (which we had not been doing). Fix this, and also the way that the chain operands were generated at the SDAG level. Patch by Nicholas Paul Johnson, thanks! Test case by me. llvm-svn: 237584
2015-05-19 00:42:10 +08:00
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
; Function Attrs: nounwind
define i64 @f(i64 %x) #0 {
entry:
%0 = call i64 @llvm.read_register.i64(metadata !0)
call void bitcast (void (...)* @foo to void ()*)()
%1 = call i64 @llvm.read_register.i64(metadata !0)
%add = add nsw i64 %0, %1
ret i64 %add
}
; CHECK-LABEL: @f
; CHECK: call i64 @llvm.read_register.i64
; CHECK: call i64 @llvm.read_register.i64
; Function Attrs: nounwind readnone
declare i64 @llvm.read_register.i64(metadata) #1
; Function Attrs: nounwind
declare void @llvm.write_register.i64(metadata, i64) #2
declare void @foo(...)
attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
attributes #2 = { nounwind }
!llvm.named.register.r1 = !{!0}
!0 = !{!"r1"}