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llvm-project/clang/test/Driver/riscv-arch.c

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[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32i -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32im -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32ima -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32imaf -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32imafd -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32ic -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32imc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32imac -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32imafc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32imafdc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32ia -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32iaf -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32iafd -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32iac -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32iafc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32iafdc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32g -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv32-unknown-elf -march=rv32gc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64i -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64im -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64ima -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64imaf -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64imafd -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64ic -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64imc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64imac -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64imafc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64imafdc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64ia -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64iaf -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64iafd -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64iac -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64iafc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64iafdc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64g -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64gc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// CHECK-NOT: error: invalid arch name '
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32 -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32 %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV32: error: invalid arch name 'rv32'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32m -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32M %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV32M: error: invalid arch name 'rv32m'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32id -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32ID %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV32ID: error: invalid arch name 'rv32id'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32l -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32L %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV32L: error: invalid arch name 'rv32l'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32imadf -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32IMADF %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV32IMADF: error: invalid arch name 'rv32imadf'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32imm -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32IMM %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV32IMM: error: invalid arch name 'rv32imm'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=RV32I -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32I-UPPER %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV32I-UPPER: error: invalid arch name 'RV32I'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv64-unknown-elf -march=rv64 -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64 %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV64: error: invalid arch name 'rv64'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv64-unknown-elf -march=rv64m -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64M %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV64M: error: invalid arch name 'rv64m'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv64-unknown-elf -march=rv64id -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64ID %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV64ID: error: invalid arch name 'rv64id'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv64-unknown-elf -march=rv64l -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64L %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV64L: error: invalid arch name 'rv64l'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv64-unknown-elf -march=rv64imadf -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64IMADF %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV64IMADF: error: invalid arch name 'rv64imadf'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv64-unknown-elf -march=rv64imm -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64IMM %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV64IMM: error: invalid arch name 'rv64imm'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv64-unknown-elf -march=RV64I -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64I-UPPER %s
[PATCH] [RISCV] Verify the input value of -march= Summary: This patch doing more check and verify the -march= string and will issue an error if it's a invalid combination. Reviewers: asb, apazos Differential Revision: https://reviews.llvm.org/D44189 Patch by Kito Cheng. llvm-svn: 328690
2018-03-28 16:29:50 +08:00
// RV64I-UPPER: error: invalid arch name 'RV64I'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// Testing specific messages and unsupported extensions.
// RUN: %clang -target riscv32-unknown-elf -march=rv32e -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32E %s
// RV32E: error: invalid arch name 'rv32e',
// RV32E: standard user-level extension 'e'
// RUN: %clang -target riscv64-unknown-elf -march=rv64e -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64E %s
// RV64E: error: invalid arch name 'rv64e',
// RV64E: standard user-level extension 'e' requires 'rv32'
// RUN: %clang -target riscv32-unknown-elf -march=rv32imC -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-LOWER %s
// RV32-LOWER: error: invalid arch name 'rv32imC',
// RV32-LOWER: string must be lowercase
[RISCV] Add support for -mcpu option. Summary: 1. gcc uses `-march` and `-mtune` flag to chose arch and pipeline model, but clang does not have `-mtune` flag, we uses `-mcpu` to chose both infos. 2. Add SiFive e31 and u54 cpu which have default march and pipeline model. 3. Specific `-mcpu` with rocket-rv[32|64] would select pipeline model only, and use the driver's arch choosing logic to get default arch. Reviewers: lenary, asb, evandro, HsiangKai Reviewed By: lenary, asb, evandro Tags: #llvm, #clang Differential Revision: https://reviews.llvm.org/D71124
2020-07-17 01:32:01 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=unknown -### %s \
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-STR %s
[RISCV] Add support for -mcpu option. Summary: 1. gcc uses `-march` and `-mtune` flag to chose arch and pipeline model, but clang does not have `-mtune` flag, we uses `-mcpu` to chose both infos. 2. Add SiFive e31 and u54 cpu which have default march and pipeline model. 3. Specific `-mcpu` with rocket-rv[32|64] would select pipeline model only, and use the driver's arch choosing logic to get default arch. Reviewers: lenary, asb, evandro, HsiangKai Reviewed By: lenary, asb, evandro Tags: #llvm, #clang Differential Revision: https://reviews.llvm.org/D71124
2020-07-17 01:32:01 +08:00
// RV32-STR: error: invalid arch name 'unknown',
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RV32-STR: string must begin with rv32{i,e,g} or rv64{i,g}
// RUN: %clang -target riscv32-unknown-elf -march=rv32q -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-LETTER %s
// RV32-LETTER: error: invalid arch name 'rv32q',
// RV32-LETTER: first letter should be 'e', 'i' or 'g'
// RUN: %clang -target riscv32-unknown-elf -march=rv32imcq -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-ORDER %s
// RV32-ORDER: error: invalid arch name 'rv32imcq',
// RV32-ORDER: standard user-level extension not given in canonical order 'q'
// RUN: %clang -target riscv32-unknown-elf -march=rv32imw -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-STD-INVAL %s
// RV32-STD-INVAL: error: invalid arch name 'rv32imw',
// RV32-STD-INVAL: invalid standard user-level extension 'w'
// RUN: %clang -target riscv32-unknown-elf -march=rv32imqc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-STD %s
// RV32-STD: error: invalid arch name 'rv32imqc',
// RV32-STD: unsupported standard user-level extension 'q'
// RUN: %clang -target riscv32-unknown-elf -march=rv32xabc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32X %s
// RV32X: error: invalid arch name 'rv32xabc',
// RV32X: first letter should be 'e', 'i' or 'g'
// RUN: %clang -target riscv32-unknown-elf -march=rv32sxabc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32SX %s
// RV32SX: error: invalid arch name 'rv32sxabc',
// RV32SX: first letter should be 'e', 'i' or 'g'
// RUN: %clang -target riscv32-unknown-elf -march=rv32sabc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32S %s
// RV32S: error: invalid arch name 'rv32sabc',
// RV32S: first letter should be 'e', 'i' or 'g'
// RUN: %clang -target riscv32-unknown-elf -march=rv32ix -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32X-NAME %s
// RV32X-NAME: error: invalid arch name 'rv32ix',
// RV32X-NAME: non-standard user-level extension name missing after 'x'
// RUN: %clang -target riscv32-unknown-elf -march=rv32isx -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32SX-NAME %s
// RV32SX-NAME: error: invalid arch name 'rv32isx',
// RV32SX-NAME: non-standard supervisor-level extension
// RV32SX-NAME: name missing after 'sx'
// RUN: %clang -target riscv32-unknown-elf -march=rv32is -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32S-NAME %s
// RV32S-NAME: error: invalid arch name 'rv32is',
// RV32S-NAME: standard supervisor-level extension
// RV32S-NAME: name missing after 's'
// RUN: %clang -target riscv32-unknown-elf -march=rv32ix_s_sx -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32ALL-NAME %s
// RV32ALL-NAME: error: invalid arch name 'rv32ix_s_sx',
// RV32ALL-NAME: non-standard user-level extension
// RV32ALL-NAME: name missing after 'x'
// RUN: %clang -target riscv32-unknown-elf -march=rv32ixabc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32X-UNS %s
// RV32X-UNS: error: invalid arch name 'rv32ixabc',
// RV32X-UNS: unsupported non-standard user-level extension 'xabc'
// RUN: %clang -target riscv32-unknown-elf -march=rv32isa -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32S-UNS %s
// RV32S-UNS: error: invalid arch name 'rv32isa',
// RV32S-UNS: unsupported standard supervisor-level extension 'sa'
// RUN: %clang -target riscv32-unknown-elf -march=rv32isxabc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32SX-UNS %s
// RV32SX-UNS: error: invalid arch name 'rv32isxabc',
// RV32SX-UNS: unsupported non-standard supervisor-level extension 'sxabc'
// RUN: %clang -target riscv32-unknown-elf -march=rv32ixabc_sp_sxlw -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32ALL %s
// RV32ALL: error: invalid arch name 'rv32ixabc_sp_sxlw',
// RV32ALL: unsupported non-standard user-level extension 'xabc'
// RUN: %clang -target riscv32-unknown-elf -march=rv32i20 -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-IVER %s
// RV32-IVER: error: invalid arch name 'rv32i20', unsupported
// RV32-IVER: version number 20 for extension 'i'
// RUN: %clang -target riscv32-unknown-elf -march=rv32imc5 -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-CVER %s
// RV32-CVER: error: invalid arch name 'rv32imc5', unsupported
// RV32-CVER: version number 5 for extension 'c'
// RUN: %clang -target riscv32-unknown-elf -march=rv32i2p -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-IMINOR-MISS %s
// RV32-IMINOR-MISS: error: invalid arch name 'rv32i2p',
// RV32-IMINOR-MISS: minor version number missing after 'p' for extension 'i'
// RUN: %clang -target riscv32-unknown-elf -march=rv32i2p0 -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-IMINOR0 %s
// RV32-IMINOR0: error: invalid arch name 'rv32i2p0',
// RV32-IMINOR0: unsupported version number 2.0 for extension 'i'
// RUN: %clang -target riscv32-unknown-elf -march=rv32i2p1 -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-IMINOR1 %s
// RV32-IMINOR1: error: invalid arch name 'rv32i2p1', unsupported
// RV32-IMINOR1: version number 2.1 for extension 'i'
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32ixt2p -### %s \
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-XMINOR-MISS %s
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RV32-XMINOR-MISS: error: invalid arch name 'rv32ixt2p',
// RV32-XMINOR-MISS: minor version number missing after 'p' for extension 'xt'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32ist2p0 -### %s \
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-SMINOR0 %s
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RV32-SMINOR0: error: invalid arch name 'rv32ist2p0',
// RV32-SMINOR0: unsupported version number 2.0 for extension 'st'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32isxt2p1 -### %s \
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-SXMINOR1 %s
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RV32-SXMINOR1: error: invalid arch name 'rv32isxt2p1', unsupported
// RV32-SXMINOR1: version number 2.1 for extension 'sxt'
[RISCV] More validations on the input value of -march= Supporting additional rules for parsing ISA string. - RISC-V ISA strings must be lowercase. E.g.: rv32IMC is not supported, rv32imc is correct. - Multi-letter extensions are to be separated by a single underscore '_'. The extension prefix counts as a letter. This means extensions that start with 's', 'sx' and 'sx' are all multi-letter. E.g.: xasb is a single non-standard extension named 'xasb' xa_sb are two extensions, the non-standard user level extension 'xa', and the supervisor level extension 'sb'. - Standard user-level extensions are specified following a canonical order, according to Table 22.1 in RISC-V User-Level ISA V2.2. - Non-standard user-level 'x' extensions, standard supervisor-level 's' extensions and non-standard supervisor-level 'sx' extensions are also specified following a canonical order according to Table 22.1 in RISC-V User-Level ISA V2.2: 'x' extensions, follwed by 's' extensions and then 'sx' extensions. - Extensions might have a version number. Underscores may be used to separate ISA subset components to improve readability and to provide disambiguation. E.g.: rv32i2_m3_a1_f2_d2 - Version numbers are divided into major and minor numbers, separated by a 'p'. If the minor version is 0, then 'p0' can be omitted. - Additional checks for dependent extensions and invalid extensions combinations. E.g.: 'e' requires rv32 'e' can't be combined with 'f' nor 'd' 'q' requires rv64 - TODO items have also been marked with comments in the code. Reviewers: asb, kito-cheng Reviewed By: asb Subscribers: edward-jones, mgrang, zzheng, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, shiva0217, cfe-commits Differential Revision: https://reviews.llvm.org/D45284 llvm-svn: 330880
2018-04-26 06:42:38 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32ixabc_ -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-XSEP %s
// RV32-XSEP: error: invalid arch name 'rv32ixabc_',
// RV32-XSEP: extension name missing after separator '_'
// RUN: %clang -target riscv32-unknown-elf -march=rv32ixabc_a -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-PREFIX %s
// RV32-PREFIX: error: invalid arch name 'rv32ixabc_a',
// RV32-PREFIX: invalid extension prefix 'a'
// RUN: %clang -target riscv32-unknown-elf -march=rv32isabc_xdef -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-X-ORDER %s
// RV32-X-ORDER: error: invalid arch name 'rv32isabc_xdef',
// RV32-X-ORDER: non-standard user-level extension not given
// RV32-X-ORDER: in canonical order 'xdef'
// RUN: %clang -target riscv32-unknown-elf -march=rv32isxabc_sdef -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-S-ORDER %s
// RV32-S-ORDER: error: invalid arch name 'rv32isxabc_sdef',
// RV32-S-ORDER: standard supervisor-level extension not given
// RV32-S-ORDER: in canonical order 'sdef'
// RUN: %clang -target riscv32-unknown-elf -march=rv32ixabc_xabc -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-XDUP %s
// RV32-XDUP: error: invalid arch name 'rv32ixabc_xabc',
// RV32-XDUP: duplicated non-standard user-level extension 'xabc'
// RUN: %clang -target riscv32-unknown-elf -march=rv32ixabc_xdef -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-X-X-INVAL %s
// RV32-X-X-INVAL: error: invalid arch name 'rv32ixabc_xdef', unsupported
// RV32-X-X-INVAL: non-standard user-level extension 'xabc'
// RUN: %clang -target riscv32-unknown-elf -march=rv32ixabc_sdef_sxghi -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-X-S-SX-INVAL %s
// RV32-X-S-SX-INVAL: error: invalid arch name 'rv32ixabc_sdef_sxghi',
// RV32-X-S-SX-INVAL: unsupported non-standard user-level extension 'xabc'
[RISCV] Set triple based on -march flag For RISC-V the value provided to -march should determine whether to compile for 32- or 64-bit RISC-V irrespective of the target provided to the Clang driver. This adds a test for this flag for RISC-V and sets the Target architecture correctly in these cases. Differential Revision: https://reviews.llvm.org/D54214
2019-11-18 18:44:13 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32i -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-TARGET %s
// RUN: %clang -target riscv64-unknown-elf -march=rv32i -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-TARGET %s
// RV32-TARGET: "-triple" "riscv32-unknown-unknown-elf"
// RUN: %clang -target riscv32-unknown-elf -march=rv64i -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s
// RUN: %clang -target riscv64-unknown-elf -march=rv64i -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s
// RV64-TARGET: "-triple" "riscv64-unknown-unknown-elf"
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32ib -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-NOFLAG %s
// RV32-EXPERIMENTAL-NOFLAG: error: invalid arch name 'rv32ib'
// RV32-EXPERIMENTAL-NOFLAG: requires '-menable-experimental-extensions'
// RUN: %clang -target riscv32-unknown-elf -march=rv32ib -menable-experimental-extensions -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-NOVERS %s
// RV32-EXPERIMENTAL-NOVERS: error: invalid arch name 'rv32ib'
// RV32-EXPERIMENTAL-NOVERS: experimental extension requires explicit version number
// RUN: %clang -target riscv32-unknown-elf -march=rv32ib0p1 -menable-experimental-extensions -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-BADVERS %s
// RV32-EXPERIMENTAL-BADVERS: error: invalid arch name 'rv32ib0p1'
// RV32-EXPERIMENTAL-BADVERS: unsupported version number 0.1 for experimental extension
[RISCV] Update B extension version to 0.93. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D95002
2021-01-23 04:24:55 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32ib0p93 -menable-experimental-extensions -### %s \
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-GOODVERS %s
// RV32-EXPERIMENTAL-GOODVERS: "-target-feature" "+experimental-b"
// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-NOFLAG %s
// RV32-EXPERIMENTAL-ZBB-NOFLAG: error: invalid arch name 'rv32izbb'
// RV32-EXPERIMENTAL-ZBB-NOFLAG: requires '-menable-experimental-extensions'
[RISCV] Update B extension version to 0.93. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D95002
2021-01-23 04:24:55 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb0p93 -menable-experimental-extensions -### %s \
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB %s
// RV32-EXPERIMENTAL-ZBB: "-target-feature" "+experimental-zbb"
[RISCV] Update B extension version to 0.93. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D95002
2021-01-23 04:24:55 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb0p93_zbp0p93 -menable-experimental-extensions -### %s \
[RISCV] Support experimental/unratified extensions This adds support for enabling experimental/unratified RISC-V ISA extensions in the -march string in the case where an explicit version number has been declared, and the -menable-experimental-extensions flag has been provided. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Since the RISC-V toolchain definition currently rejects any extension with an explicit version number, the parsing logic has been tweaked to support this, and to allow standard extensions to have their versions checked in future patches. The bitmanip 'b' extension has been added as a first use of this support, it should easily extend to other as yet unratified extensions (such as the vector 'v' extension). Differential Revision: https://reviews.llvm.org/D73891
2020-04-10 00:51:16 +08:00
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-ZBP %s
// RV32-EXPERIMENTAL-ZBB-ZBP: "-target-feature" "+experimental-zbb"
// RV32-EXPERIMENTAL-ZBB-ZBP: "-target-feature" "+experimental-zbp"
[RISCV] Support experimental v extensions. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Support for the vector 'v' extension v0.8. Differential revision: https://reviews.llvm.org/D81188
2020-06-05 03:11:52 +08:00
[RISCV] Update B extension version to 0.93. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D95002
2021-01-23 04:24:55 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32izbb0p93zbp0p93 -menable-experimental-extensions -### %s \
[RISCV] Add error checking for extensions missing separating underscores Currently if two multi-letter extensions are provided in a -march= string, the verification code checks the version of the first and consumes the second, resulting in that part of the architecture string being ignored. This adds a test that when a version number has been parsed for an extension, there are no subsequent characters. Differential Revision: https://reviews.llvm.org/D83819
2020-07-15 16:23:35 +08:00
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBB-ZBP-UNDERSCORE %s
[RISCV] Update B extension version to 0.93. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D95002
2021-01-23 04:24:55 +08:00
// RV32-EXPERIMENTAL-ZBB-ZBP-UNDERSCORE: error: invalid arch name 'rv32izbb0p93zbp0p93', multi-character extensions must be separated by underscores
[RISCV] Add error checking for extensions missing separating underscores Currently if two multi-letter extensions are provided in a -march= string, the verification code checks the version of the first and consumes the second, resulting in that part of the architecture string being ignored. This adds a test that when a version number has been parsed for an extension, there are no subsequent characters. Differential Revision: https://reviews.llvm.org/D83819
2020-07-15 16:23:35 +08:00
[RISCV] Update B extension version to 0.93. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D95002
2021-01-23 04:24:55 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32izba0p93 -menable-experimental-extensions -### %s \
[RISCV] Add Zba feature and move add.uw and slli.uw to it. Still need to add SH*ADD instructions. Reviewed By: asb, frasercrmck Differential Revision: https://reviews.llvm.org/D94617
2021-01-23 02:58:06 +08:00
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZBA %s
// RV32-EXPERIMENTAL-ZBA: "-target-feature" "+experimental-zba"
[RISCV] Support experimental v extensions. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Support for the vector 'v' extension v0.8. Differential revision: https://reviews.llvm.org/D81188
2020-06-05 03:11:52 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32iv -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-V-NOFLAG %s
// RV32-EXPERIMENTAL-V-NOFLAG: error: invalid arch name 'rv32iv'
// RV32-EXPERIMENTAL-V-NOFLAG: requires '-menable-experimental-extensions'
// RUN: %clang -target riscv32-unknown-elf -march=rv32iv -menable-experimental-extensions -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-V-NOVERS %s
// RV32-EXPERIMENTAL-V-NOVERS: error: invalid arch name 'rv32iv'
// RV32-EXPERIMENTAL-V-NOVERS: experimental extension requires explicit version number
// RUN: %clang -target riscv32-unknown-elf -march=rv32iv0p1 -menable-experimental-extensions -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-V-BADVERS %s
// RV32-EXPERIMENTAL-V-BADVERS: error: invalid arch name 'rv32iv0p1'
// RV32-EXPERIMENTAL-V-BADVERS: unsupported version number 0.1 for experimental extension
[RISCV] Update V extension to v1.0-draft 08a0b464. Differential Revision: https://reviews.llvm.org/D94583
2021-01-13 14:38:30 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32iv1p0 -menable-experimental-extensions -### %s -c 2>&1 | \
[RISCV] Support experimental v extensions. This follows the design as discussed on the mailing lists in the following RFC: http://lists.llvm.org/pipermail/llvm-dev/2020-January/138364.html Support for the vector 'v' extension v0.8. Differential revision: https://reviews.llvm.org/D81188
2020-06-05 03:11:52 +08:00
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-V-GOODVERS %s
// RV32-EXPERIMENTAL-V-GOODVERS: "-target-feature" "+experimental-v"
[RISCV] Handle zfh in the arch string. Differential Revision: https://reviews.llvm.org/D91315
2020-11-12 10:00:33 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32izfh -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZFH-NOFLAG %s
// RV32-EXPERIMENTAL-ZFH-NOFLAG: error: invalid arch name 'rv32izfh'
// RV32-EXPERIMENTAL-ZFH-NOFLAG: requires '-menable-experimental-extensions'
// RUN: %clang -target riscv32-unknown-elf -march=rv32izfh0p1 -menable-experimental-extensions -### %s \
// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV32-EXPERIMENTAL-ZFH %s
// RV32-EXPERIMENTAL-ZFH: "-target-feature" "+experimental-zfh"
[RISCV] Add support for Zvamo/Zvlsseg to driver Differential Revision: https://reviews.llvm.org/D94930
2021-01-25 06:07:33 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32izvamo -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVAMO-NOFLAG %s
// RV32-EXPERIMENTAL-ZVAMO-NOFLAG: error: invalid arch name 'rv32izvamo'
// RV32-EXPERIMENTAL-ZVAMO-NOFLAG: requires '-menable-experimental-extensions'
// RUN: %clang -target riscv32-unknown-elf -march=rv32izvamo -menable-experimental-extensions -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVAMO-NOVERS %s
// RV32-EXPERIMENTAL-ZVAMO-NOVERS: error: invalid arch name 'rv32izvamo'
// RV32-EXPERIMENTAL-ZVAMO-NOVERS: experimental extension requires explicit version number
// RUN: %clang -target riscv32-unknown-elf -march=rv32izvamo0p1 -menable-experimental-extensions -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVAMO-BADVERS %s
// RV32-EXPERIMENTAL-ZVAMO-BADVERS: error: invalid arch name 'rv32izvamo0p1'
// RV32-EXPERIMENTAL-ZVAMO-BADVERS: unsupported version number 0.1 for experimental extension
[RISCV] Update V extension to v1.0-draft 08a0b464. Differential Revision: https://reviews.llvm.org/D94583
2021-01-13 14:38:30 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32izvamo1p0 -menable-experimental-extensions -### %s -c 2>&1 | \
[RISCV] Add support for Zvamo/Zvlsseg to driver Differential Revision: https://reviews.llvm.org/D94930
2021-01-25 06:07:33 +08:00
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVAMO-GOODVERS %s
// RV32-EXPERIMENTAL-ZVAMO-GOODVERS: "-target-feature" "+experimental-zvamo"
// RUN: %clang -target riscv32-unknown-elf -march=rv32izvlsseg -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVLSSEG-NOFLAG %s
// RV32-EXPERIMENTAL-ZVLSSEG-NOFLAG: error: invalid arch name 'rv32izvlsseg'
// RV32-EXPERIMENTAL-ZVLSSEG-NOFLAG: requires '-menable-experimental-extensions'
// RUN: %clang -target riscv32-unknown-elf -march=rv32izvlsseg -menable-experimental-extensions -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVLSSEG-NOVERS %s
// RV32-EXPERIMENTAL-ZVLSSEG-NOVERS: error: invalid arch name 'rv32izvlsseg'
// RV32-EXPERIMENTAL-ZVLSSEG-NOVERS: experimental extension requires explicit version number
// RUN: %clang -target riscv32-unknown-elf -march=rv32izvlsseg0p1 -menable-experimental-extensions -### %s -c 2>&1 | \
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVLSSEG-BADVERS %s
// RV32-EXPERIMENTAL-ZVLSSEG-BADVERS: error: invalid arch name 'rv32izvlsseg0p1'
// RV32-EXPERIMENTAL-ZVLSSEG-BADVERS: unsupported version number 0.1 for experimental extension
[RISCV] Update V extension to v1.0-draft 08a0b464. Differential Revision: https://reviews.llvm.org/D94583
2021-01-13 14:38:30 +08:00
// RUN: %clang -target riscv32-unknown-elf -march=rv32izvlsseg1p0 -menable-experimental-extensions -### %s -c 2>&1 | \
[RISCV] Add support for Zvamo/Zvlsseg to driver Differential Revision: https://reviews.llvm.org/D94930
2021-01-25 06:07:33 +08:00
// RUN: FileCheck -check-prefix=RV32-EXPERIMENTAL-ZVLSSEG-GOODVERS %s
// RV32-EXPERIMENTAL-ZVLSSEG-GOODVERS: "-target-feature" "+experimental-zvlsseg"