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llvm-project/llvm/test/CodeGen/X86/zext-extract_subreg.ll

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Optimize: r1025 = s/zext r1024, 4 r1026 = extract_subreg r1025, 4 to: r1026 = copy r1024 llvm-svn: 122925
2011-01-06 07:06:49 +08:00
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define void @t() nounwind ssp {
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: t:
Optimize: r1025 = s/zext r1024, 4 r1026 = extract_subreg r1025, 4 to: r1026 = copy r1024 llvm-svn: 122925
2011-01-06 07:06:49 +08:00
entry:
br i1 undef, label %return, label %if.end.i
if.end.i: ; preds = %entry
TBAA: remove !tbaa from testing cases if not used. This will make it easier to turn on struct-path aware TBAA since the metadata format will change. llvm-svn: 180796
2013-05-01 01:52:57 +08:00
%tmp7.i = load i32* undef, align 4
Optimize: r1025 = s/zext r1024, 4 r1026 = extract_subreg r1025, 4 to: r1026 = copy r1024 llvm-svn: 122925
2011-01-06 07:06:49 +08:00
br i1 undef, label %return, label %if.end
if.end: ; preds = %if.end.i
; CHECK: %if.end
; CHECK: movl (%{{.*}}), [[REG:%[a-z]+]]
; CHECK-NOT: movl [[REG]], [[REG]]
Roll r127459 back in: Optimize trivial branches in CodeGenPrepare, which often get created from the lowering of objectsize intrinsics. Unfortunately, a number of tests were relying on llc not optimizing trivial branches, so I had to add an option to allow them to continue to test what they originally tested. This fixes <rdar://problem/8785296> and <rdar://problem/9112893>. llvm-svn: 127498
2011-03-12 05:52:04 +08:00
; CHECK-NEXT: testl [[REG]], [[REG]]
X86: use sub-register sequences for MOV*r0 operations Instead of having a bunch of separate MOV8r0, MOV16r0, ... pseudo-instructions, it's better to use a single MOV32r0 (which will expand to "xorl %reg, %reg") and obtain other sizes with EXTRACT_SUBREG and SUBREG_TO_REG. The encoding is smaller and partial register updates can sometimes be avoided. Until recently, this sequence was a barrier to rematerialization though. That should now be fixed so it's an appropriate time to make the change. llvm-svn: 182928
2013-05-30 21:19:42 +08:00
; CHECK-NEXT: xorl
Optimize: r1025 = s/zext r1024, 4 r1026 = extract_subreg r1025, 4 to: r1026 = copy r1024 llvm-svn: 122925
2011-01-06 07:06:49 +08:00
%tmp138 = select i1 undef, i32 0, i32 %tmp7.i
%tmp867 = zext i32 %tmp138 to i64
br label %while.cond
while.cond: ; preds = %while.body, %if.end
%tmp869 = sub i64 %tmp867, 0
%scale2.0 = trunc i64 %tmp869 to i32
%cmp149 = icmp eq i32 %scale2.0, 0
br i1 %cmp149, label %while.end, label %land.rhs
land.rhs: ; preds = %while.cond
br i1 undef, label %while.body, label %while.end
while.body: ; preds = %land.rhs
br label %while.cond
while.end: ; preds = %land.rhs, %while.cond
br i1 undef, label %cond.false205, label %cond.true190
cond.true190: ; preds = %while.end
br i1 undef, label %cond.false242, label %cond.true225
cond.false205: ; preds = %while.end
unreachable
cond.true225: ; preds = %cond.true190
br i1 undef, label %cond.false280, label %cond.true271
cond.false242: ; preds = %cond.true190
unreachable
cond.true271: ; preds = %cond.true225
unreachable
cond.false280: ; preds = %cond.true225
unreachable
return: ; preds = %if.end.i, %entry
ret void
}