2019-01-27 22:04:45 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
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; PR31754
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;
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; #include <x86intrin.h>
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; using u64 = unsigned long long;
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;
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; template<u64 K>
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; void test(u64& alo, u64& ahi)
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; {
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; u64 blo = K;
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; u64 bhi = 0;
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; bool cf = (alo += blo) < blo;
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; _addcarry_u64(cf, ahi, bhi, &ahi);
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; }
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;
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; template void test<0ull>(u64&, u64&);
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; template void test<1ull>(u64&, u64&);
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; template void test<2ull>(u64&, u64&);
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; template void test<3ull>(u64&, u64&);
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; template void test<4ull>(u64&, u64&);
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; template void test<0x7fffffffffffffffull>(u64&, u64&);
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; template void test<0x8000000000000000ull>(u64&, u64&);
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; template void test<0x8000000000000001ull>(u64&, u64&);
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; template void test<0xffffffff80000000ull>(u64&, u64&);
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; template void test<0xfffffffffffffffdull>(u64&, u64&);
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; template void test<0xfffffffffffffffeull>(u64&, u64&);
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; template void test<0xffffffffffffffffull>(u64&, u64&);
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define void @test_0(i64*, i64*) {
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; CHECK-LABEL: test_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: retq
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%3 = load i64, i64* %1, align 8
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%4 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 0, i64 %3, i64 0)
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%5 = extractvalue { i8, i64 } %4, 1
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store i64 %5, i64* %1, align 8
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ret void
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}
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define void @test_1(i64*, i64*) {
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; CHECK-LABEL: test_1:
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; CHECK: # %bb.0:
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2019-02-03 15:25:06 +08:00
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; CHECK-NEXT: addq $1, (%rdi)
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2019-01-27 22:04:45 +08:00
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, 1
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store i64 %4, i64* %0, align 8
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%5 = icmp eq i64 %4, 0
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_2(i64*, i64*) {
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; CHECK-LABEL: test_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addq $2, (%rdi)
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, 2
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store i64 %4, i64* %0, align 8
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%5 = icmp ult i64 %4, 2
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_3(i64*, i64*) {
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; CHECK-LABEL: test_3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addq $3, (%rdi)
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, 3
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store i64 %4, i64* %0, align 8
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%5 = icmp ult i64 %4, 3
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_4(i64*, i64*) {
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; CHECK-LABEL: test_4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addq $4, (%rdi)
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, 4
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store i64 %4, i64* %0, align 8
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%5 = icmp ult i64 %4, 4
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_9223372036854775807(i64*, i64*) {
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; CHECK-LABEL: test_9223372036854775807:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
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; CHECK-NEXT: addq %rax, (%rdi)
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, 9223372036854775807
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store i64 %4, i64* %0, align 8
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%5 = icmp ult i64 %4, 9223372036854775807
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_9223372036854775808(i64*, i64*) {
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; CHECK-LABEL: test_9223372036854775808:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: movabsq $-9223372036854775808, %rcx # imm = 0x8000000000000000
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; CHECK-NEXT: xorq %rax, %rcx
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; CHECK-NEXT: movq %rcx, (%rdi)
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; CHECK-NEXT: shrq $63, %rax
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; CHECK-NEXT: addb $-1, %al
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = xor i64 %3, -9223372036854775808
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store i64 %4, i64* %0, align 8
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%5 = lshr i64 %3, 63
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%6 = trunc i64 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_9223372036854775809(i64*, i64*) {
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; CHECK-LABEL: test_9223372036854775809:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movabsq $-9223372036854775807, %rax # imm = 0x8000000000000001
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; CHECK-NEXT: addq %rax, (%rdi)
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, -9223372036854775807
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store i64 %4, i64* %0, align 8
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%5 = icmp ult i64 %4, -9223372036854775807
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_18446744071562067968(i64*, i64*) {
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; CHECK-LABEL: test_18446744071562067968:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addq $-2147483648, (%rdi) # imm = 0x80000000
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, -2147483648
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store i64 %4, i64* %0, align 8
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%5 = icmp ult i64 %4, -2147483648
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_18446744073709551613(i64*, i64*) {
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; CHECK-LABEL: test_18446744073709551613:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addq $-3, (%rdi)
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, -3
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store i64 %4, i64* %0, align 8
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%5 = icmp ult i64 %4, -3
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_18446744073709551614(i64*, i64*) {
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; CHECK-LABEL: test_18446744073709551614:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addq $-2, (%rdi)
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, -2
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store i64 %4, i64* %0, align 8
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%5 = icmp ult i64 %4, -2
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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define void @test_18446744073709551615(i64*, i64*) {
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; CHECK-LABEL: test_18446744073709551615:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movq (%rdi), %rax
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; CHECK-NEXT: leaq -1(%rax), %rcx
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; CHECK-NEXT: movq %rcx, (%rdi)
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; CHECK-NEXT: testq %rax, %rax
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: addb $-1, %al
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; CHECK-NEXT: adcq $0, (%rsi)
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; CHECK-NEXT: retq
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%3 = load i64, i64* %0, align 8
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%4 = add i64 %3, -1
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store i64 %4, i64* %0, align 8
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%5 = icmp ne i64 %3, 0
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%6 = zext i1 %5 to i8
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%7 = load i64, i64* %1, align 8
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%8 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %6, i64 %7, i64 0)
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%9 = extractvalue { i8, i64 } %8, 1
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store i64 %9, i64* %1, align 8
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ret void
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}
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2019-02-03 22:22:43 +08:00
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define i1 @illegal_type(i17 %x, i17* %p) {
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; CHECK-LABEL: illegal_type:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addl $29, %edi
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; CHECK-NEXT: movw %di, (%rsi)
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2019-02-04 01:53:09 +08:00
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; CHECK-NEXT: andl $131071, %edi # imm = 0x1FFFF
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: shrl $16, %eax
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; CHECK-NEXT: movb %al, 2(%rsi)
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; CHECK-NEXT: cmpl $29, %edi
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; CHECK-NEXT: setb %al
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2019-02-03 22:22:43 +08:00
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; CHECK-NEXT: retq
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%a = add i17 %x, 29
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store i17 %a, i17* %p
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%ov = icmp ult i17 %a, 29
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ret i1 %ov
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}
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2019-02-23 07:19:34 +08:00
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; The overflow check may be against the input rather than the sum.
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define i1 @uaddo_i64_increment_alt(i64 %x, i64* %p) {
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; CHECK-LABEL: uaddo_i64_increment_alt:
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; CHECK: # %bb.0:
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; CHECK-NEXT: leaq 1(%rdi), %rax
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; CHECK-NEXT: movq %rax, (%rsi)
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; CHECK-NEXT: cmpq $-1, %rdi
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: retq
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%a = add i64 %x, 1
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store i64 %a, i64* %p
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%ov = icmp eq i64 %x, -1
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ret i1 %ov
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}
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; Make sure insertion is done correctly based on dominance.
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define i1 @uaddo_i64_increment_alt_dom(i64 %x, i64* %p) {
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; CHECK-LABEL: uaddo_i64_increment_alt_dom:
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; CHECK: # %bb.0:
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; CHECK-NEXT: cmpq $-1, %rdi
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: incq %rdi
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; CHECK-NEXT: movq %rdi, (%rsi)
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; CHECK-NEXT: retq
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%ov = icmp eq i64 %x, -1
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%a = add i64 %x, 1
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store i64 %a, i64* %p
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ret i1 %ov
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}
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; The overflow check may be against the input rather than the sum.
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define i1 @uaddo_i64_decrement_alt(i64 %x, i64* %p) {
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; CHECK-LABEL: uaddo_i64_decrement_alt:
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; CHECK: # %bb.0:
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; CHECK-NEXT: leaq -1(%rdi), %rax
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; CHECK-NEXT: movq %rax, (%rsi)
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; CHECK-NEXT: testq %rdi, %rdi
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: retq
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%a = add i64 %x, -1
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store i64 %a, i64* %p
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%ov = icmp ne i64 %x, 0
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ret i1 %ov
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}
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; Make sure insertion is done correctly based on dominance.
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define i1 @uaddo_i64_decrement_alt_dom(i64 %x, i64* %p) {
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; CHECK-LABEL: uaddo_i64_decrement_alt_dom:
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|
|
|
; CHECK: # %bb.0:
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|
|
|
; CHECK-NEXT: testq %rdi, %rdi
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|
; CHECK-NEXT: setne %al
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|
; CHECK-NEXT: decq %rdi
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|
; CHECK-NEXT: movq %rdi, (%rsi)
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|
; CHECK-NEXT: retq
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|
|
%ov = icmp ne i64 %x, 0
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|
|
%a = add i64 %x, -1
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|
|
|
store i64 %a, i64* %p
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|
|
|
ret i1 %ov
|
|
|
|
}
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2019-01-27 22:04:45 +08:00
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declare { i8, i64 } @llvm.x86.addcarry.64(i8, i64, i64)
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