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llvm-project/clang/test/CodeGenCXX/inalloca-vector.cpp

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Re-land "[MS] Overhaul how clang passes overaligned args on x86_32" This brings back 2af74e27ed7d0832cbdde9cb969aaca7a42e99f9 and reverts eaabaf7e04fe98990a8177a3e053346395efde1c. The changes were correct, the code that was broken contained an ODR violation that assumed that these types are passed equivalently: struct alignas(uint64_t) Wrapper { uint64_t P }; void f(uint64_t p); void f(Wrapper p); MSVC does not pass them the same way, and so clang-cl should not pass them the same way either.
2020-02-12 08:03:26 +08:00
// RUN: %clang_cc1 -w -triple i686-pc-win32 -emit-llvm -o - %s | FileCheck %s
// PR44395
// MSVC passes up to three vectors in registers, and the rest indirectly. Check
// that both are compatible with an inalloca prototype.
struct NonTrivial {
NonTrivial();
NonTrivial(const NonTrivial &o);
unsigned handle;
};
typedef float __m128 __attribute__((__vector_size__(16), __aligned__(16)));
__m128 gv128;
// nt, w, and q will be in the inalloca pack.
void receive_vec_128(NonTrivial nt, __m128 x, __m128 y, __m128 z, __m128 w, __m128 q) {
gv128 = x + y + z + w + q;
}
// CHECK-LABEL: define dso_local void @"?receive_vec_128@@YAXUNonTrivial@@T__m128@@1111@Z"
// CHECK-SAME: (<4 x float> inreg %x,
// CHECK-SAME: <4 x float> inreg %y,
// CHECK-SAME: <4 x float> inreg %z,
// CHECK-SAME: <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* inalloca %0)
void pass_vec_128() {
__m128 z = {0};
receive_vec_128(NonTrivial(), z, z, z, z, z);
}
// CHECK-LABEL: define dso_local void @"?pass_vec_128@@YAXXZ"()
// CHECK: getelementptr inbounds <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>, <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* %{{[^,]*}}, i32 0, i32 0
// CHECK: call x86_thiscallcc %struct.NonTrivial* @"??0NonTrivial@@QAE@XZ"(%struct.NonTrivial* %{{.*}})
// Store q, store temp alloca.
// CHECK: store <4 x float> %{{[^,]*}}, <4 x float>* %{{[^,]*}}, align 16
// CHECK: getelementptr inbounds <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>, <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* %{{[^,]*}}, i32 0, i32 1
// CHECK: store <4 x float>* %{{[^,]*}}, <4 x float>** %{{[^,]*}}, align 4
// Store w, store temp alloca.
// CHECK: store <4 x float> %{{[^,]*}}, <4 x float>* %{{[^,]*}}, align 16
// CHECK: getelementptr inbounds <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>, <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* %{{[^,]*}}, i32 0, i32 2
// CHECK: store <4 x float>* %{{[^,]*}}, <4 x float>** %{{[^,]*}}, align 4
// CHECK: call void @"?receive_vec_128@@YAXUNonTrivial@@T__m128@@1111@Z"
// CHECK-SAME: (<4 x float> inreg %{{[^,]*}},
// CHECK-SAME: <4 x float> inreg %{{[^,]*}},
// CHECK-SAME: <4 x float> inreg %{{[^,]*}},
// CHECK-SAME: <{ %struct.NonTrivial, <4 x float>*, <4 x float>* }>* inalloca %{{[^,]*}})
// w will be passed indirectly by register, and q will be passed indirectly, but
// the pointer will be in memory.
void __fastcall fastcall_receive_vec(__m128 x, __m128 y, __m128 z, __m128 w, int edx, __m128 q, NonTrivial nt) {
gv128 = x + y + z + w + q;
}
// CHECK-LABEL: define dso_local x86_fastcallcc void @"?fastcall_receive_vec@@Y{{[^"]*}}"
// CHECK-SAME: (<4 x float> inreg %x,
// CHECK-SAME: <4 x float> inreg %y,
// CHECK-SAME: <4 x float> inreg %z,
// CHECK-SAME: <4 x float>* inreg %0,
// CHECK-SAME: i32 inreg %edx,
// CHECK-SAME: <{ <4 x float>*, %struct.NonTrivial }>* inalloca %1)
void __vectorcall vectorcall_receive_vec(double xmm0, double xmm1, double xmm2,
__m128 x, __m128 y, __m128 z,
__m128 w, int edx, __m128 q, NonTrivial nt) {
gv128 = x + y + z + w + q;
}
// CHECK-LABEL: define dso_local x86_vectorcallcc void @"?vectorcall_receive_vec@@Y{{[^"]*}}"
[MS] Mark vectorcall FP and vector args inreg This has no effect on how LLVM passes the arguments, but it prevents rewriteWithInAlloca from thinking that these parameters should be part of the inalloca pack. Follow-up to D72114 Reviewed By: erichkeane Differential Revision: https://reviews.llvm.org/D74452
2020-02-12 09:09:06 +08:00
// CHECK-SAME: (double inreg %xmm0,
// CHECK-SAME: double inreg %xmm1,
// CHECK-SAME: double inreg %xmm2,
// CHECK-SAME: <4 x float> inreg %x,
// CHECK-SAME: <4 x float> inreg %y,
// CHECK-SAME: <4 x float> inreg %z,
// CHECK-SAME: <4 x float>* inreg %0,
// CHECK-SAME: i32 inreg %edx,
// CHECK-SAME: <{ <4 x float>*, %struct.NonTrivial }>* inalloca %1)