maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity
llvm-project/llvm/test/MC/Disassembler/Hexagon/st.txt

53 lines
1.5 KiB
Plaintext
Raw Normal View History

[Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs. llvm-svn: 224949
2014-12-30 03:42:14 +08:00
# RUN: llvm-mc --triple hexagon -disassemble < %s | FileCheck %s
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
0x28 0xd4 0xd1 0xab
# CHECK: memd(r17++#40) = r21:20
0x2b 0xf4 0xd1 0xab
# CHECK: if (p3) memd(r17++#40) = r21:20
0x2f 0xf4 0xd1 0xab
# CHECK: if (!p3) memd(r17++#40) = r21:20
0x03 0x40 0x45 0x85 0xab 0xf4 0xd1 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memd(r17++#40) = r21:20
0x03 0x40 0x45 0x85 0xaf 0xf4 0xd1 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memd(r17++#40) = r21:20
[Hexagon] Renaming old multiclass for removal. Adding post-increment store classes and instruction defs. llvm-svn: 224949
2014-12-30 03:42:14 +08:00
0x28 0xd5 0x11 0xab
# CHECK: memb(r17++#5) = r21
0x2b 0xf5 0x11 0xab
# CHECK: if (p3) memb(r17++#5) = r21
0x2f 0xf5 0x11 0xab
# CHECK: if (!p3) memb(r17++#5) = r21
0x03 0x40 0x45 0x85 0xab 0xf5 0x11 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memb(r17++#5) = r21
0x03 0x40 0x45 0x85 0xaf 0xf5 0x11 0xab
# CHECK: p3 = r5
[Hexagon] Replacing the remaining postincrement stores with versions that have encoding bits. llvm-svn: 224951
2014-12-30 04:00:43 +08:00
# CHECK-NEXT: if (!p3.new) memb(r17++#5) = r21
0x28 0xd5 0x51 0xab
# CHECK: memh(r17++#10) = r21
0x2b 0xf5 0x51 0xab
# CHECK: if (p3) memh(r17++#10) = r21
0x2f 0xf5 0x51 0xab
# CHECK: if (!p3) memh(r17++#10) = r21
0x03 0x40 0x45 0x85 0xab 0xf5 0x51 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memh(r17++#10) = r21
0x03 0x40 0x45 0x85 0xaf 0xf5 0x51 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memh(r17++#10) = r21
0x28 0xd5 0x91 0xab
# CHECK: memw(r17++#20) = r21
0x2b 0xf5 0x91 0xab
# CHECK: if (p3) memw(r17++#20) = r21
0x2f 0xf5 0x91 0xab
# CHECK: if (!p3) memw(r17++#20) = r21
0x03 0x40 0x45 0x85 0xaf 0xf5 0x91 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) memw(r17++#20) = r21
0x03 0x40 0x45 0x85 0xab 0xf5 0x91 0xab
# CHECK: p3 = r5
# CHECK-NEXT: if (p3.new) memw(r17++#20) = r21