2016-05-19 00:10:17 +08:00
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//===----- X86WinAllocaExpander.cpp - Expand WinAlloca pseudo instruction -===//
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2016-05-19 00:10:17 +08:00
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines a pass that expands WinAlloca pseudo-instructions.
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//
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// It performs a conservative analysis to determine whether each allocation
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// falls within a region of the stack that is safe to use, or whether stack
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// probes must be emitted.
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//
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//===----------------------------------------------------------------------===//
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#include "X86.h"
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#include "X86InstrBuilder.h"
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#include "X86InstrInfo.h"
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#include "X86MachineFunctionInfo.h"
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#include "X86Subtarget.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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2017-11-08 09:01:31 +08:00
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#include "llvm/CodeGen/TargetInstrInfo.h"
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2016-05-19 00:10:17 +08:00
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#include "llvm/IR/Function.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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namespace {
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class X86WinAllocaExpander : public MachineFunctionPass {
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public:
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X86WinAllocaExpander() : MachineFunctionPass(ID) {}
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bool runOnMachineFunction(MachineFunction &MF) override;
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private:
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/// Strategies for lowering a WinAlloca.
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enum Lowering { TouchAndSub, Sub, Probe };
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/// Deterministic-order map from WinAlloca instruction to desired lowering.
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typedef MapVector<MachineInstr*, Lowering> LoweringMap;
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/// Compute which lowering to use for each WinAlloca instruction.
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void computeLowerings(MachineFunction &MF, LoweringMap& Lowerings);
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/// Get the appropriate lowering based on current offset and amount.
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Lowering getLowering(int64_t CurrentOffset, int64_t AllocaAmount);
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/// Lower a WinAlloca instruction.
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void lower(MachineInstr* MI, Lowering L);
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MachineRegisterInfo *MRI;
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const X86Subtarget *STI;
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const TargetInstrInfo *TII;
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const X86RegisterInfo *TRI;
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unsigned StackPtr;
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unsigned SlotSize;
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int64_t StackProbeSize;
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2018-02-23 21:46:25 +08:00
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bool NoStackArgProbe;
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2016-05-19 00:10:17 +08:00
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2016-10-01 10:56:57 +08:00
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StringRef getPassName() const override { return "X86 WinAlloca Expander"; }
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static char ID;
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};
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char X86WinAllocaExpander::ID = 0;
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} // end anonymous namespace
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FunctionPass *llvm::createX86WinAllocaExpander() {
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return new X86WinAllocaExpander();
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}
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/// Return the allocation amount for a WinAlloca instruction, or -1 if unknown.
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static int64_t getWinAllocaAmount(MachineInstr *MI, MachineRegisterInfo *MRI) {
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assert(MI->getOpcode() == X86::WIN_ALLOCA_32 ||
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MI->getOpcode() == X86::WIN_ALLOCA_64);
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assert(MI->getOperand(0).isReg());
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unsigned AmountReg = MI->getOperand(0).getReg();
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MachineInstr *Def = MRI->getUniqueVRegDef(AmountReg);
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// Look through copies.
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while (Def && Def->isCopy() && Def->getOperand(1).isReg())
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Def = MRI->getUniqueVRegDef(Def->getOperand(1).getReg());
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if (!Def ||
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(Def->getOpcode() != X86::MOV32ri && Def->getOpcode() != X86::MOV64ri) ||
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!Def->getOperand(1).isImm())
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return -1;
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return Def->getOperand(1).getImm();
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}
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X86WinAllocaExpander::Lowering
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X86WinAllocaExpander::getLowering(int64_t CurrentOffset,
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int64_t AllocaAmount) {
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// For a non-constant amount or a large amount, we have to probe.
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if (AllocaAmount < 0 || AllocaAmount > StackProbeSize)
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return Probe;
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// If it fits within the safe region of the stack, just subtract.
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if (CurrentOffset + AllocaAmount <= StackProbeSize)
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return Sub;
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// Otherwise, touch the current tip of the stack, then subtract.
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return TouchAndSub;
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}
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static bool isPushPop(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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case X86::PUSH32i8:
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case X86::PUSH32r:
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case X86::PUSH32rmm:
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case X86::PUSH32rmr:
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case X86::PUSHi32:
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case X86::PUSH64i8:
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case X86::PUSH64r:
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case X86::PUSH64rmm:
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case X86::PUSH64rmr:
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case X86::PUSH64i32:
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case X86::POP32r:
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case X86::POP64r:
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return true;
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default:
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return false;
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}
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}
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void X86WinAllocaExpander::computeLowerings(MachineFunction &MF,
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LoweringMap &Lowerings) {
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// Do a one-pass reverse post-order walk of the CFG to conservatively estimate
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// the offset between the stack pointer and the lowest touched part of the
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// stack, and use that to decide how to lower each WinAlloca instruction.
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// Initialize OutOffset[B], the stack offset at exit from B, to something big.
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DenseMap<MachineBasicBlock *, int64_t> OutOffset;
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for (MachineBasicBlock &MBB : MF)
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OutOffset[&MBB] = INT32_MAX;
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// Note: we don't know the offset at the start of the entry block since the
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// prologue hasn't been inserted yet, and how much that will adjust the stack
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// pointer depends on register spills, which have not been computed yet.
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// Compute the reverse post-order.
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ReversePostOrderTraversal<MachineFunction*> RPO(&MF);
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for (MachineBasicBlock *MBB : RPO) {
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int64_t Offset = -1;
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for (MachineBasicBlock *Pred : MBB->predecessors())
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Offset = std::max(Offset, OutOffset[Pred]);
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if (Offset == -1) Offset = INT32_MAX;
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for (MachineInstr &MI : *MBB) {
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if (MI.getOpcode() == X86::WIN_ALLOCA_32 ||
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MI.getOpcode() == X86::WIN_ALLOCA_64) {
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// A WinAlloca moves StackPtr, and potentially touches it.
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int64_t Amount = getWinAllocaAmount(&MI, MRI);
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Lowering L = getLowering(Offset, Amount);
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Lowerings[&MI] = L;
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switch (L) {
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case Sub:
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Offset += Amount;
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break;
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case TouchAndSub:
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Offset = Amount;
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break;
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case Probe:
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Offset = 0;
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break;
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}
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} else if (MI.isCall() || isPushPop(MI)) {
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// Calls, pushes and pops touch the tip of the stack.
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Offset = 0;
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} else if (MI.getOpcode() == X86::ADJCALLSTACKUP32 ||
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MI.getOpcode() == X86::ADJCALLSTACKUP64) {
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Offset -= MI.getOperand(0).getImm();
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} else if (MI.getOpcode() == X86::ADJCALLSTACKDOWN32 ||
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MI.getOpcode() == X86::ADJCALLSTACKDOWN64) {
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Offset += MI.getOperand(0).getImm();
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} else if (MI.modifiesRegister(StackPtr, TRI)) {
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// Any other modification of SP means we've lost track of it.
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Offset = INT32_MAX;
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}
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}
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OutOffset[MBB] = Offset;
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}
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}
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static unsigned getSubOpcode(bool Is64Bit, int64_t Amount) {
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if (Is64Bit)
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return isInt<8>(Amount) ? X86::SUB64ri8 : X86::SUB64ri32;
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return isInt<8>(Amount) ? X86::SUB32ri8 : X86::SUB32ri;
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}
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void X86WinAllocaExpander::lower(MachineInstr* MI, Lowering L) {
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DebugLoc DL = MI->getDebugLoc();
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MachineBasicBlock *MBB = MI->getParent();
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MachineBasicBlock::iterator I = *MI;
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int64_t Amount = getWinAllocaAmount(MI, MRI);
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if (Amount == 0) {
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MI->eraseFromParent();
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return;
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}
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bool Is64Bit = STI->is64Bit();
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assert(SlotSize == 4 || SlotSize == 8);
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unsigned RegA = (SlotSize == 8) ? X86::RAX : X86::EAX;
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switch (L) {
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case TouchAndSub:
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assert(Amount >= SlotSize);
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// Use a push to touch the top of the stack.
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BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
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.addReg(RegA, RegState::Undef);
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Amount -= SlotSize;
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if (!Amount)
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break;
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// Fall through to make any remaining adjustment.
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2016-08-18 04:30:52 +08:00
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LLVM_FALLTHROUGH;
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2016-05-19 00:10:17 +08:00
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case Sub:
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assert(Amount > 0);
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if (Amount == SlotSize) {
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// Use push to save size.
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BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
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.addReg(RegA, RegState::Undef);
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} else {
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// Sub.
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BuildMI(*MBB, I, DL, TII->get(getSubOpcode(Is64Bit, Amount)), StackPtr)
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.addReg(StackPtr)
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.addImm(Amount);
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}
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break;
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case Probe:
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2018-02-23 21:46:25 +08:00
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if (!NoStackArgProbe) {
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// The probe lowering expects the amount in RAX/EAX.
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BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::COPY), RegA)
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.addReg(MI->getOperand(0).getReg());
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// Do the probe.
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STI->getFrameLowering()->emitStackProbe(*MBB->getParent(), *MBB, MI, DL,
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/*InPrologue=*/false);
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} else {
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// Sub
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BuildMI(*MBB, I, DL, TII->get(Is64Bit ? X86::SUB64rr : X86::SUB32rr),
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StackPtr)
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.addReg(StackPtr)
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.addReg(MI->getOperand(0).getReg());
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}
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2016-05-19 00:10:17 +08:00
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break;
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}
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unsigned AmountReg = MI->getOperand(0).getReg();
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MI->eraseFromParent();
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// Delete the definition of AmountReg, possibly walking a chain of copies.
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for (;;) {
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if (!MRI->use_empty(AmountReg))
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break;
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MachineInstr *AmountDef = MRI->getUniqueVRegDef(AmountReg);
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if (!AmountDef)
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break;
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if (AmountDef->isCopy() && AmountDef->getOperand(1).isReg())
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AmountReg = AmountDef->getOperand(1).isReg();
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AmountDef->eraseFromParent();
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break;
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}
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}
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bool X86WinAllocaExpander::runOnMachineFunction(MachineFunction &MF) {
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if (!MF.getInfo<X86MachineFunctionInfo>()->hasWinAlloca())
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return false;
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MRI = &MF.getRegInfo();
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STI = &MF.getSubtarget<X86Subtarget>();
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TII = STI->getInstrInfo();
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TRI = STI->getRegisterInfo();
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StackPtr = TRI->getStackRegister();
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SlotSize = TRI->getSlotSize();
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StackProbeSize = 4096;
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2017-12-16 06:22:58 +08:00
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if (MF.getFunction().hasFnAttribute("stack-probe-size")) {
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MF.getFunction()
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2017-12-16 06:22:58 +08:00
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.getFnAttribute("stack-probe-size")
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2016-05-19 00:10:17 +08:00
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.getValueAsString()
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.getAsInteger(0, StackProbeSize);
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}
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2018-02-23 21:46:25 +08:00
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NoStackArgProbe = MF.getFunction().hasFnAttribute("no-stack-arg-probe");
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if (NoStackArgProbe)
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StackProbeSize = INT64_MAX;
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2016-05-19 00:10:17 +08:00
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LoweringMap Lowerings;
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computeLowerings(MF, Lowerings);
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for (auto &P : Lowerings)
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lower(P.first, P.second);
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return true;
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}
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