llvm-project/llvm/lib/Target/PowerPC/Makefile

##===- lib/Target/PowerPC/Makefile -------------------------*- Makefile -*-===##
#
#                     The LLVM Compiler Infrastructure
#
# This file is distributed under the University of Illinois Open Source
# License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##

LEVEL = ../../..
LIBRARYNAME = LLVMPowerPCCodeGen
TARGET = PPC

# Make sure that tblgen is run, first thing.
BUILT_SOURCES = PPCGenRegisterInfo.inc PPCGenAsmMatcher.inc \
                PPCGenAsmWriter.inc  PPCGenCodeEmitter.inc \
                PPCGenInstrInfo.inc PPCGenDAGISel.inc \
                PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \
                PPCGenMCCodeEmitter.inc PPCGenFastISel.inc

DIRS = AsmParser InstPrinter TargetInfo MCTargetDesc

include $(LEVEL)/Makefile.common
Initial revision llvm-svn: 14283 2004-06-22 00:55:25 +08:00			`##===- lib/Target/PowerPC/Makefile -------------------------- Makefile --===##`
Removed trailing whitespace from Makefiles. llvm-svn: 61991 2009-01-10 00:44:42 +08:00			`#`
Initial revision llvm-svn: 14283 2004-06-22 00:55:25 +08:00			`# The LLVM Compiler Infrastructure`
			`#`
remove attribution from lib Makefiles. llvm-svn: 45415 2007-12-30 04:09:26 +08:00			`# This file is distributed under the University of Illinois Open Source`
			`# License. See LICENSE.TXT for details.`
Removed trailing whitespace from Makefiles. llvm-svn: 61991 2009-01-10 00:44:42 +08:00			`#`
Initial revision llvm-svn: 14283 2004-06-22 00:55:25 +08:00			`##===----------------------------------------------------------------------===##`
Stop building RTTI information for most llvm libraries. Notable missing ones are libsupport, libsystem and libvmcore. libvmcore is currently blocked on bugpoint, which uses EH. Once it stops using EH, we can switch it off. This #if 0's out 3 unit tests, because gtest requires RTTI information. Suggestions welcome on how to fix this. llvm-svn: 94164 2010-01-22 14:49:46 +08:00
Initial revision llvm-svn: 14283 2004-06-22 00:55:25 +08:00			`LEVEL = ../../..`
Use correct name for PPC codegen library llvm-svn: 54888 2008-08-17 21:54:44 +08:00			`LIBRARYNAME = LLVMPowerPCCodeGen`
Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td llvm-svn: 23738 2005-10-15 07:37:35 +08:00			`TARGET = PPC`
Simplify makefile by combining all TableGen dependencies into one variable llvm-svn: 15527 2004-08-06 02:34:15 +08:00
Initial revision llvm-svn: 14283 2004-06-22 00:55:25 +08:00			`# Make sure that tblgen is run, first thing.`
[PowerPC] Add assembler parser This adds assembler parser support to the PowerPC back end. The parser will run for any powerpc-- and powerpc64-- triples, but was tested only on 64-bit Linux. The supported syntax is intended to be compatible with the GNU assembler. The parser does not yet support all PowerPC instructions, but it does support anything that is generated by LLVM itself. There is no support for testing restricted instruction sets yet, i.e. the parser will always accept any instructions it knows, no matter what feature flags are given. Instruction operands will be checked for validity and errors generated. (Error handling in general could still be improved.) The patch adds a number of test cases to verify instruction and operand encodings. The tests currently cover all instructions from the following PowerPC ISA v2.06 Book I facilities: Branch, Fixed-point, Floating-Point, and Vector. Note that a number of these instructions are not yet supported by the back end; they are marked with FIXME. A number of follow-on check-ins will add extra features. When they are all included, LLVM passes all tests (including bootstrap) when using clang -cc1as as the system assembler. llvm-svn: 181050 2013-05-04 03:49:39 +08:00			`BUILT_SOURCES = PPCGenRegisterInfo.inc PPCGenAsmMatcher.inc \`
Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td llvm-svn: 23738 2005-10-15 07:37:35 +08:00			`PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \`
Switch PPC return lower to use an autogenerated CC description. llvm-svn: 34940 2007-03-06 08:59:59 +08:00			`PPCGenInstrInfo.inc PPCGenDAGISel.inc \`
Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. llvm-svn: 134281 2011-07-02 06:36:09 +08:00			`PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \`
[PowerPC] Skeletal FastISel support for 64-bit PowerPC ELF. This is the first of many upcoming patches for PowerPC fast instruction selection support. This patch implements the minimum necessary for a functional (but extremely limited) FastISel pass. It allows the table-generated portions of the selector to be created and used, but in most cases selection will fall back to the DAG selector. None of the block terminator instructions are implemented yet, and most interesting instructions require some special handling. Therefore there aren't any new test cases with this patch. There will be quite a few tests coming with future patches. This patch adds the make/CMake support for the new code (including tablegen -gen-fast-isel) and creates the FastISel object for PPC64 ELF only. It instantiates the necessary virtual functions (TargetSelectInstruction, TargetMaterializeConstant, TargetMaterializeAlloca, tryToFoldLoadIntoMI, and FastLowerArguments), but of these, only TargetMaterializeConstant contains any useful implementation. This is present since the table-generated code requires the ability to materialize integer constants for some instructions. This patch has been tested by building and running the projects/test-suite code with -O0. All tests passed with the exception of a couple of long-running tests that time out using -O0 code generation. llvm-svn: 187399 2013-07-30 08:50:39 +08:00			`PPCGenMCCodeEmitter.inc PPCGenFastISel.inc`
Initial revision llvm-svn: 14283 2004-06-22 00:55:25 +08:00
[PowerPC] Add assembler parser This adds assembler parser support to the PowerPC back end. The parser will run for any powerpc-- and powerpc64-- triples, but was tested only on 64-bit Linux. The supported syntax is intended to be compatible with the GNU assembler. The parser does not yet support all PowerPC instructions, but it does support anything that is generated by LLVM itself. There is no support for testing restricted instruction sets yet, i.e. the parser will always accept any instructions it knows, no matter what feature flags are given. Instruction operands will be checked for validity and errors generated. (Error handling in general could still be improved.) The patch adds a number of test cases to verify instruction and operand encodings. The tests currently cover all instructions from the following PowerPC ISA v2.06 Book I facilities: Branch, Fixed-point, Floating-Point, and Vector. Note that a number of these instructions are not yet supported by the back end; they are marked with FIXME. A number of follow-on check-ins will add extra features. When they are all included, LLVM passes all tests (including bootstrap) when using clang -cc1as as the system assembler. llvm-svn: 181050 2013-05-04 03:49:39 +08:00			`DIRS = AsmParser InstPrinter TargetInfo MCTargetDesc`
Factor out asmprinter out of ppc llvm-svn: 54887 2008-08-17 21:54:28 +08:00
Adjust to changes in Makefile.rules llvm-svn: 17167 2004-10-23 05:02:08 +08:00			`include $(LEVEL)/Makefile.common`