llvm-project/llvm/test/MC/X86/avx512-err.s

// RUN: not llvm-mc %s -triple x86_64-unknown-unknown --show-encoding -o /dev/null 2>&1 | FileCheck --check-prefix=ERR %s

// ERR: Register k0 can't be used as write mask
vpcmpd $1, %zmm24, %zmm7, %k5{%k0}

// ERR: Expected a {z} mark at this point
vfmsub213ps %zmm8, %zmm8, %zmm8{%k2} {rn-sae}

// ERR: Expected an op-mask register at this point
vfmsub213ps %zmm8, %zmm8, %zmm8 {rn-sae}

// ERR: invalid operand for instruction
cvtsd2sil  {rn-sae}, %xmm1, %eax
[X86] Remove checks for FeatureAVX512 from the X86 assembly parser. Remove mcpu/mattr from assembly test command lines. Summary: We should always be able to accept AVX512 registers and instructions in llvm-mc. The only subtarget mode that should be checked is 16-bit vs 32-bit vs 64-bit mode. I've also removed all the mattr/mcpu lines from test RUN lines to be consistent with this. Most were due to AVX512, but a few were for other features. Fixes PR36202 Reviewers: RKSimon, echristo, bkramer Reviewed By: echristo Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42824 llvm-svn: 324106 2018-02-03 01:02:58 +08:00			`// RUN: not llvm-mc %s -triple x86_64-unknown-unknown --show-encoding -o /dev/null 2>&1 \| FileCheck --check-prefix=ERR %s`
AVX-512: asm parser errors check I reverted the error check that was removed in 236416. I put the it in a separate file. llvm-svn: 237107 2015-05-12 17:47:23 +08:00
[X86][AsmParser][AVX512] Error appropriately when K0 is tried as a write-mask K0 isn't expected as a write-mask, so provide a detailed error here, instead of the more generic one (invalid op for insn) Conforms with gas Differential Revision: https://reviews.llvm.org/D36570 llvm-svn: 310789 2017-08-13 20:03:00 +08:00			`// ERR: Register k0 can't be used as write mask`
AVX-512: asm parser errors check I reverted the error check that was removed in 236416. I put the it in a separate file. llvm-svn: 237107 2015-05-12 17:47:23 +08:00			`vpcmpd $1, %zmm24, %zmm7, %k5{%k0}`

[AsmParser][AVX512]Enhance OpMask/Zero/Merge syntax check rubostness Adopt a more strict approach regarding what marks should/can appear after a destination register, when operating upon an AVX512 platform. Differential Revision: https://reviews.llvm.org/D35785 llvm-svn: 310467 2017-08-09 20:32:05 +08:00			`// ERR: Expected a {z} mark at this point`
			`vfmsub213ps %zmm8, %zmm8, %zmm8{%k2} {rn-sae}`

			`// ERR: Expected an op-mask register at this point`
			`vfmsub213ps %zmm8, %zmm8, %zmm8 {rn-sae}`
[X86] When parsing rounding mode operands, provide a proper end location so we don't crash when trying to print an error message using it. llvm-svn: 321930 2018-01-06 14:41:07 +08:00
			`// ERR: invalid operand for instruction`
			`cvtsd2sil {rn-sae}, %xmm1, %eax`