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llvm-project/llvm/test/CodeGen/AArch64/frameaddr.ll

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[FastISel][AArch64] Use the correct register class to make the MI verifier happy. This is mostly achieved by providing the correct register class manually, because getRegClassFor always returns the GPR*AllRegClass for MVT::i32 and MVT::i64. Also cleanup the code to use the FastEmitInst_* method whenever possible. This makes sure that the operands' register class is properly constrained. For all the remaining cases this adds the missing constrainOperandRegClass calls for each operand. llvm-svn: 216225
2014-08-22 04:57:57 +08:00
; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
add test cases for frameaddr and returnaddr for aarch64 llvm-svn: 193626
2013-10-30 01:01:29 +08:00
[FastISel][AArch64] Add support for frameaddress intrinsic. This commit implements the frameaddress intrinsic for the AArch64 architecture in FastISel. There were two test cases that pretty much tested the same, so I combined them to a single test case. Fixes <rdar://problem/17811834> llvm-svn: 213959
2014-07-26 01:47:14 +08:00
define i8* @test_frameaddress0() nounwind {
add test cases for frameaddr and returnaddr for aarch64 llvm-svn: 193626
2013-10-30 01:01:29 +08:00
entry:
[FastISel][AArch64] Add support for frameaddress intrinsic. This commit implements the frameaddress intrinsic for the AArch64 architecture in FastISel. There were two test cases that pretty much tested the same, so I combined them to a single test case. Fixes <rdar://problem/17811834> llvm-svn: 213959
2014-07-26 01:47:14 +08:00
; CHECK-LABEL: test_frameaddress0:
; CHECK: stp x29, x30, [sp, #-16]!
; CHECK: mov x29, sp
add test cases for frameaddr and returnaddr for aarch64 llvm-svn: 193626
2013-10-30 01:01:29 +08:00
; CHECK: mov x0, x29
[FastISel][AArch64] Add support for frameaddress intrinsic. This commit implements the frameaddress intrinsic for the AArch64 architecture in FastISel. There were two test cases that pretty much tested the same, so I combined them to a single test case. Fixes <rdar://problem/17811834> llvm-svn: 213959
2014-07-26 01:47:14 +08:00
; CHECK: ldp x29, x30, [sp], #16
; CHECK: ret
%0 = call i8* @llvm.frameaddress(i32 0)
ret i8* %0
add test cases for frameaddr and returnaddr for aarch64 llvm-svn: 193626
2013-10-30 01:01:29 +08:00
}
[FastISel][AArch64] Add support for frameaddress intrinsic. This commit implements the frameaddress intrinsic for the AArch64 architecture in FastISel. There were two test cases that pretty much tested the same, so I combined them to a single test case. Fixes <rdar://problem/17811834> llvm-svn: 213959
2014-07-26 01:47:14 +08:00
define i8* @test_frameaddress2() nounwind {
add test cases for frameaddr and returnaddr for aarch64 llvm-svn: 193626
2013-10-30 01:01:29 +08:00
entry:
[FastISel][AArch64] Add support for frameaddress intrinsic. This commit implements the frameaddress intrinsic for the AArch64 architecture in FastISel. There were two test cases that pretty much tested the same, so I combined them to a single test case. Fixes <rdar://problem/17811834> llvm-svn: 213959
2014-07-26 01:47:14 +08:00
; CHECK-LABEL: test_frameaddress2:
; CHECK: stp x29, x30, [sp, #-16]!
; CHECK: mov x29, sp
add test cases for frameaddr and returnaddr for aarch64 llvm-svn: 193626
2013-10-30 01:01:29 +08:00
; CHECK: ldr x[[reg:[0-9]+]], [x29]
[FastISel][AArch64] Add support for frameaddress intrinsic. This commit implements the frameaddress intrinsic for the AArch64 architecture in FastISel. There were two test cases that pretty much tested the same, so I combined them to a single test case. Fixes <rdar://problem/17811834> llvm-svn: 213959
2014-07-26 01:47:14 +08:00
; CHECK: ldr x0, [x[[reg]]]
; CHECK: ldp x29, x30, [sp], #16
; CHECK: ret
%0 = call i8* @llvm.frameaddress(i32 2)
ret i8* %0
add test cases for frameaddr and returnaddr for aarch64 llvm-svn: 193626
2013-10-30 01:01:29 +08:00
}
declare i8* @llvm.frameaddress(i32) nounwind readnone