2003-01-13 08:26:36 +08:00
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//===-- TargetInstrInfo.cpp - Target Instruction Information --------------===//
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2005-04-22 06:55:34 +08:00
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//
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2003-10-21 03:43:21 +08:00
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// The LLVM Compiler Infrastructure
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//
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2007-12-30 04:36:04 +08:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-04-22 06:55:34 +08:00
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//
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2003-10-21 03:43:21 +08:00
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//===----------------------------------------------------------------------===//
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2002-10-29 07:55:33 +08:00
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//
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2005-01-19 14:53:34 +08:00
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// This file implements the TargetInstrInfo class.
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2002-10-29 07:55:33 +08:00
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//
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//===----------------------------------------------------------------------===//
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2003-01-15 06:00:31 +08:00
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#include "llvm/Target/TargetInstrInfo.h"
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2009-05-05 08:30:09 +08:00
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#include "llvm/Target/TargetRegisterInfo.h"
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2010-10-06 14:27:31 +08:00
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#include "llvm/MC/MCAsmInfo.h"
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2011-06-29 09:14:12 +08:00
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#include "llvm/MC/MCInstrItineraries.h"
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2009-08-02 12:58:19 +08:00
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#include "llvm/Support/ErrorHandling.h"
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2010-12-20 04:43:38 +08:00
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#include <cctype>
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2005-01-19 14:53:34 +08:00
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using namespace llvm;
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2002-10-29 07:55:33 +08:00
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2009-08-02 13:20:37 +08:00
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//===----------------------------------------------------------------------===//
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// TargetInstrInfo
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//===----------------------------------------------------------------------===//
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2006-12-09 02:45:48 +08:00
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TargetInstrInfo::~TargetInstrInfo() {
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}
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2011-06-28 05:26:13 +08:00
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const TargetRegisterClass*
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2011-06-29 03:10:37 +08:00
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TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum,
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2012-05-08 06:10:26 +08:00
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const TargetRegisterInfo *TRI,
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const MachineFunction &MF) const {
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2011-06-29 03:10:37 +08:00
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if (OpNum >= MCID.getNumOperands())
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2011-06-28 05:26:13 +08:00
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return 0;
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2011-06-29 03:10:37 +08:00
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short RegClass = MCID.OpInfo[OpNum].RegClass;
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if (MCID.OpInfo[OpNum].isLookupPtrRegClass())
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2012-05-08 06:10:26 +08:00
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return TRI->getPointerRegClass(MF, RegClass);
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2011-06-28 05:26:13 +08:00
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// Instructions like INSERT_SUBREG do not have fixed register classes.
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if (RegClass < 0)
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return 0;
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// Otherwise just look it up normally.
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return TRI->getRegClass(RegClass);
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}
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2010-09-10 02:18:55 +08:00
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unsigned
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2010-11-03 08:45:17 +08:00
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TargetInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,
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const MachineInstr *MI) const {
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2010-09-10 09:29:16 +08:00
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if (!ItinData || ItinData->isEmpty())
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2010-09-10 02:18:55 +08:00
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return 1;
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unsigned Class = MI->getDesc().getSchedClass();
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2010-09-16 00:28:21 +08:00
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unsigned UOps = ItinData->Itineraries[Class].NumMicroOps;
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2010-09-10 02:18:55 +08:00
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if (UOps)
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return UOps;
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// The # of u-ops is dynamically determined. The specific target should
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// override this function to return the right number.
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return 1;
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}
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2010-10-06 14:27:31 +08:00
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int
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TargetInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,
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const MachineInstr *DefMI, unsigned DefIdx,
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const MachineInstr *UseMI, unsigned UseIdx) const {
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if (!ItinData || ItinData->isEmpty())
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return -1;
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unsigned DefClass = DefMI->getDesc().getSchedClass();
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unsigned UseClass = UseMI->getDesc().getSchedClass();
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return ItinData->getOperandLatency(DefClass, DefIdx, UseClass, UseIdx);
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}
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2010-11-03 08:45:17 +08:00
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int TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
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const MachineInstr *MI,
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unsigned *PredCost) const {
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if (!ItinData || ItinData->isEmpty())
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return 1;
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return ItinData->getStageLatency(MI->getDesc().getSchedClass());
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}
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2010-10-26 10:08:50 +08:00
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bool TargetInstrInfo::hasLowDefLatency(const InstrItineraryData *ItinData,
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const MachineInstr *DefMI,
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unsigned DefIdx) const {
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if (!ItinData || ItinData->isEmpty())
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return false;
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unsigned DefClass = DefMI->getDesc().getSchedClass();
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int DefCycle = ItinData->getOperandCycle(DefClass, DefIdx);
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return (DefCycle != -1 && DefCycle <= 1);
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}
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2010-10-06 14:27:31 +08:00
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2009-08-02 12:58:19 +08:00
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/// insertNoop - Insert a noop into the instruction stream at the specified
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/// point.
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2010-12-24 12:28:06 +08:00
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void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,
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2009-08-02 12:58:19 +08:00
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MachineBasicBlock::iterator MI) const {
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llvm_unreachable("Target didn't implement insertNoop!");
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}
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2009-08-02 13:20:37 +08:00
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/// Measure the specified inline asm to determine an approximation of its
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/// length.
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2011-03-25 02:46:34 +08:00
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/// Comments (which run till the next SeparatorString or newline) do not
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2009-08-02 13:20:37 +08:00
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/// count as an instruction.
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/// Any other non-whitespace text is considered an instruction, with
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2011-03-25 02:46:34 +08:00
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/// multiple instructions separated by SeparatorString or newlines.
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2009-08-02 13:20:37 +08:00
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/// Variable-length instructions are not handled here; this function
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/// may be overloaded in the target code to do that.
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unsigned TargetInstrInfo::getInlineAsmLength(const char *Str,
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2009-08-23 05:43:10 +08:00
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const MCAsmInfo &MAI) const {
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2010-12-24 12:28:06 +08:00
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2009-08-02 13:20:37 +08:00
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// Count the number of instructions in the asm.
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bool atInsnStart = true;
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unsigned Length = 0;
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for (; *Str; ++Str) {
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2011-03-25 02:46:34 +08:00
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if (*Str == '\n' || strncmp(Str, MAI.getSeparatorString(),
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strlen(MAI.getSeparatorString())) == 0)
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2009-08-02 13:20:37 +08:00
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atInsnStart = true;
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2010-12-20 04:42:43 +08:00
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if (atInsnStart && !std::isspace(*Str)) {
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2009-08-23 05:43:10 +08:00
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Length += MAI.getMaxInstLength();
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2009-08-02 13:20:37 +08:00
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atInsnStart = false;
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}
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2009-08-23 05:43:10 +08:00
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if (atInsnStart && strncmp(Str, MAI.getCommentString(),
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strlen(MAI.getCommentString())) == 0)
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2009-08-02 13:20:37 +08:00
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atInsnStart = false;
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}
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2010-12-24 12:28:06 +08:00
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2009-08-02 13:20:37 +08:00
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return Length;
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}
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