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Adding -verify-machineinstrs option to PowerPC tests Currently we have a number of tests that fail with -verify-machineinstrs. To detect this cases earlier we add the option to the testcases with the exception of tests that will currently fail with this option. PR 27456 keeps track of this failures. No code review, as discussed with Hal Finkel. llvm-svn: 277624
2016-08-04 02:17:35 +08:00
; RUN: llc -verify-machineinstrs %s -mtriple=powerpc64-unknown-linux-gnu -O2 -o - -optimize-regalloc=false -regalloc=fast | FileCheck %s
Fix Sub-register Rewriting in Aggressive Anti-Dependence Breaker Previously, HandleLastUse would delete RegRef information for sub-registers if they were dead even if their corresponding super-register were still live. If the super-register were later renamed, then the definitions of the sub-register would not be updated appropriately. This patch alters the behavior so that RegInfo information for sub-registers is only deleted when the sub-register and super-register are both dead. This resolves PR26775. This is the mirror image of Hal's r227311 commit. Author: Tom Jablin (tjablin) Reviewers: kbarton uweigand nemanjai hfinkel http://reviews.llvm.org/D18448 llvm-svn: 265097
2016-04-01 10:05:29 +08:00
declare void @func(i8*, i64, i64)
define void @test(i8* %context, i32** %elementArrayPtr, i32 %value) {
entry:
%cmp = icmp eq i32 %value, 0
br i1 %cmp, label %lreturn, label %lnext
lnext:
%elementArray = load i32*, i32** %elementArrayPtr, align 8
Revert "Reapply Revert "RegAllocFast: Rewrite and improve"" This reverts commit 55f9f87da2c2ad791b9e62cccb1c035e037444fa. Breaks following buildbots: http://lab.llvm.org:8011/builders/lldb-arm-ubuntu/builds/4306 http://lab.llvm.org:8011/builders/lldb-aarch64-ubuntu/builds/9154
2020-09-22 17:20:10 +08:00
; CHECK: lwz [[LDREG:[0-9]+]], 124(1) # 4-byte Folded Reload
Followup on Proposal to move MIR physical register namespace to '$' sigil. Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
2018-02-01 06:04:26 +08:00
; CHECK: # implicit-def: $x[[TEMPREG:[0-9]+]]
Fix Sub-register Rewriting in Aggressive Anti-Dependence Breaker Previously, HandleLastUse would delete RegRef information for sub-registers if they were dead even if their corresponding super-register were still live. If the super-register were later renamed, then the definitions of the sub-register would not be updated appropriately. This patch alters the behavior so that RegInfo information for sub-registers is only deleted when the sub-register and super-register are both dead. This resolves PR26775. This is the mirror image of Hal's r227311 commit. Author: Tom Jablin (tjablin) Reviewers: kbarton uweigand nemanjai hfinkel http://reviews.llvm.org/D18448 llvm-svn: 265097
2016-04-01 10:05:29 +08:00
%element = load i32, i32* %elementArray, align 4
; CHECK: mr [[TEMPREG]], [[LDREG]]
; CHECK: clrldi 4, [[TEMPREG]], 32
%element.ext = zext i32 %element to i64
%value.ext = zext i32 %value to i64
call void @func(i8* %context, i64 %value.ext, i64 %element.ext)
br label %lreturn
lreturn:
ret void
}