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llvm-project/llvm/test/CodeGen/X86/extract-insert.ll

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[DAGCombine] Handle out of range EXTRACT_VECTOR_ELT indices Handle this in DAGCombiner::visitEXTRACT_VECTOR_ELT the same as we already do in SelectionDAG::getNode and use APInt instead of getZExtValue. This should also fix oss-fuzz #4910 llvm-svn: 321767
2018-01-04 06:42:33 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=X64
define i32 @extractelt_undef_insertelt(i32 %x, i32 %y) {
[x86] regenerate CHECKs; NFC llvm-svn: 344301
2018-10-12 05:44:38 +08:00
; CHECK-LABEL: extractelt_undef_insertelt:
; CHECK: # %bb.0:
; CHECK-NEXT: ret{{[l|q]}}
[DAGCombine] Handle out of range EXTRACT_VECTOR_ELT indices Handle this in DAGCombiner::visitEXTRACT_VECTOR_ELT the same as we already do in SelectionDAG::getNode and use APInt instead of getZExtValue. This should also fix oss-fuzz #4910 llvm-svn: 321767
2018-01-04 06:42:33 +08:00
%b = insertelement <4 x i32> zeroinitializer, i32 %x, i64 3
%c = icmp uge i32 %y, %y
%d = extractelement <4 x i32> %b, i1 %c
ret i32 %d
}