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llvm-project/clang/test/CodeGen/atomic.c

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filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
// RUN: %clang_cc1 %s -emit-llvm -o - -triple=i686-apple-darwin9 | FileCheck %s
int atomic(void) {
Fix a use-of-undefined, IRgen expects the RValue for "void" to be a scalar RValue. llvm-svn: 72504
2009-05-28 07:45:33 +08:00
// non-sensical test for sync functions
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
int old;
int val = 1;
reimplement __sync_* builtins to be variadic and to follow the same semantic rules that gcc and icc use. This implements the variadic and concrete versions as builtins and has sema do the disambiguation. There are probably a bunch of details to finish up but this seems like a large monotonic step forward :) llvm-svn: 71212
2009-05-08 14:58:22 +08:00
char valc = 1;
Improve the representation of the atomic builtins in a few ways. First, we make their call expressions synthetically have the "deduced" types based on their first argument. We only insert conversions in the AST for arguments whose values require conversion to match the value type expected. This keeps PR7600 closed by maintaining the return type, but avoids assertions due to unexpected implicit casts making the type unsigned (test case added from Daniel). The magic is moved into the codegen for the atomic builtin which inserts the casts as needed at the IR level to raise the type to an integer suitable for the LLVM intrinsic. This shouldn't cause any real change in functionality, but now we can make the builtin be more truly polymorphic. llvm-svn: 108638
2010-07-18 15:23:17 +08:00
_Bool valb = 0;
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
unsigned int uval = 1;
int cmp = 0;
Don't try to create "store atomic" instructions of non-integer types; they aren't supported at the moment. PR12040. llvm-svn: 152891
2012-03-16 09:48:04 +08:00
int* ptrval;
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
old = __sync_fetch_and_add(&val, 1);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw add i32* %val, i32 1 seq_cst, align 4
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
reimplement __sync_* builtins to be variadic and to follow the same semantic rules that gcc and icc use. This implements the variadic and concrete versions as builtins and has sema do the disambiguation. There are probably a bunch of details to finish up but this seems like a large monotonic step forward :) llvm-svn: 71212
2009-05-08 14:58:22 +08:00
old = __sync_fetch_and_sub(&valc, 2);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw sub i8* %valc, i8 2 seq_cst, align 1
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
old = __sync_fetch_and_min(&val, 3);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw min i32* %val, i32 3 seq_cst, align 4
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
old = __sync_fetch_and_max(&val, 4);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw max i32* %val, i32 4 seq_cst, align 4
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
old = __sync_fetch_and_umin(&uval, 5u);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw umin i32* %uval, i32 5 seq_cst, align 4
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
old = __sync_fetch_and_umax(&uval, 6u);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw umax i32* %uval, i32 6 seq_cst, align 4
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
old = __sync_lock_test_and_set(&val, 7);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw xchg i32* %val, i32 7 seq_cst, align 4
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
add a __sync_swap builtin to fill out the rest of the __sync builtins. Patch by Dave Zarzycki! llvm-svn: 129189
2011-04-09 11:57:26 +08:00
old = __sync_swap(&val, 8);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw xchg i32* %val, i32 8 seq_cst, align 4
add a __sync_swap builtin to fill out the rest of the __sync builtins. Patch by Dave Zarzycki! llvm-svn: 129189
2011-04-09 11:57:26 +08:00
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
old = __sync_val_compare_and_swap(&val, 4, 1976);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* %val, i32 4, i32 1976 seq_cst seq_cst, align 4
IR-change: cmpxchg operations now return { iN, i1 }. This is a minimal fix for clang. I'll soon add support for generating weak variants when requested, but that's not really necessary for the LLVM change in isolation. llvm-svn: 210907
2014-06-13 22:24:59 +08:00
// CHECK: extractvalue { i32, i1 } [[PAIR]], 0
Implement __sync_{add,sub,and,or,xor}_and_fetch and __sync_bool_compare_and_swap. - <rdar://problem/6762223> [sema/irgen] support __sync_bool_compare_and_swap and __sync_add_and_fetch llvm-svn: 68482
2009-04-07 08:55:51 +08:00
old = __sync_bool_compare_and_swap(&val, 4, 1976);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* %val, i32 4, i32 1976 seq_cst seq_cst, align 4
IR-change: cmpxchg operations now return { iN, i1 }. This is a minimal fix for clang. I'll soon add support for generating weak variants when requested, but that's not really necessary for the LLVM change in isolation. llvm-svn: 210907
2014-06-13 22:24:59 +08:00
// CHECK: extractvalue { i32, i1 } [[PAIR]], 1
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
old = __sync_fetch_and_and(&val, 0x9);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw and i32* %val, i32 9 seq_cst, align 4
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
old = __sync_fetch_and_or(&val, 0xa);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw or i32* %val, i32 10 seq_cst, align 4
Implement __sync_{add,sub,and,or,xor}_and_fetch and __sync_bool_compare_and_swap. - <rdar://problem/6762223> [sema/irgen] support __sync_bool_compare_and_swap and __sync_add_and_fetch llvm-svn: 68482
2009-04-07 08:55:51 +08:00
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
old = __sync_fetch_and_xor(&val, 0xb);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw xor i32* %val, i32 11 seq_cst, align 4
Add __sync_fetch_and_nand (again) Prior to GCC 4.4, __sync_fetch_and_nand was implemented as: { tmp = *ptr; *ptr = ~tmp & value; return tmp; } but this was changed in GCC 4.4 to be: { tmp = *ptr; *ptr = ~(tmp & value); return tmp; } in response to this change, support for sync_fetch_and_nand (and sync_nand_and_fetch) was removed in r99522 in order to avoid miscompiling code depending on the old semantics. However, at this point: 1. Many years have passed, and the amount of code relying on the old semantics is likely smaller. 2. Through the work of many contributors, all LLVM backends have been updated such that "atomicrmw nand" provides the newer GCC 4.4+ semantics (this process was complete July of 2014 (added to the release notes in r212635). 3. The lack of this intrinsic is now a needless impediment to porting codes from GCC to Clang (I've now seen several examples of this). It is true, however, that we still set GNUC_MINOR to 2 (corresponding to GCC 4.2). To compensate for this, and to address the original concern regarding code relying on the old semantics, I've added a warning that specifically details the fact that the semantics have changed and that we provide the newer semantics. Fixes PR8842. llvm-svn: 218905
2014-10-03 04:53:50 +08:00
old = __sync_fetch_and_nand(&val, 0xc);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw nand i32* %val, i32 12 seq_cst, align 4
Add __sync_fetch_and_nand (again) Prior to GCC 4.4, __sync_fetch_and_nand was implemented as: { tmp = *ptr; *ptr = ~tmp & value; return tmp; } but this was changed in GCC 4.4 to be: { tmp = *ptr; *ptr = ~(tmp & value); return tmp; } in response to this change, support for sync_fetch_and_nand (and sync_nand_and_fetch) was removed in r99522 in order to avoid miscompiling code depending on the old semantics. However, at this point: 1. Many years have passed, and the amount of code relying on the old semantics is likely smaller. 2. Through the work of many contributors, all LLVM backends have been updated such that "atomicrmw nand" provides the newer GCC 4.4+ semantics (this process was complete July of 2014 (added to the release notes in r212635). 3. The lack of this intrinsic is now a needless impediment to porting codes from GCC to Clang (I've now seen several examples of this). It is true, however, that we still set GNUC_MINOR to 2 (corresponding to GCC 4.2). To compensate for this, and to address the original concern regarding code relying on the old semantics, I've added a warning that specifically details the fact that the semantics have changed and that we provide the newer semantics. Fixes PR8842. llvm-svn: 218905
2014-10-03 04:53:50 +08:00
Implement __sync_{add,sub,and,or,xor}_and_fetch and __sync_bool_compare_and_swap. - <rdar://problem/6762223> [sema/irgen] support __sync_bool_compare_and_swap and __sync_add_and_fetch llvm-svn: 68482
2009-04-07 08:55:51 +08:00
old = __sync_add_and_fetch(&val, 1);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw add i32* %val, i32 1 seq_cst, align 4
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Implement __sync_{add,sub,and,or,xor}_and_fetch and __sync_bool_compare_and_swap. - <rdar://problem/6762223> [sema/irgen] support __sync_bool_compare_and_swap and __sync_add_and_fetch llvm-svn: 68482
2009-04-07 08:55:51 +08:00
old = __sync_sub_and_fetch(&val, 2);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw sub i32* %val, i32 2 seq_cst, align 4
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
reimplement __sync_* builtins to be variadic and to follow the same semantic rules that gcc and icc use. This implements the variadic and concrete versions as builtins and has sema do the disambiguation. There are probably a bunch of details to finish up but this seems like a large monotonic step forward :) llvm-svn: 71212
2009-05-08 14:58:22 +08:00
old = __sync_and_and_fetch(&valc, 3);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw and i8* %valc, i8 3 seq_cst, align 1
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
reimplement __sync_* builtins to be variadic and to follow the same semantic rules that gcc and icc use. This implements the variadic and concrete versions as builtins and has sema do the disambiguation. There are probably a bunch of details to finish up but this seems like a large monotonic step forward :) llvm-svn: 71212
2009-05-08 14:58:22 +08:00
old = __sync_or_and_fetch(&valc, 4);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw or i8* %valc, i8 4 seq_cst, align 1
Implement __sync_{add,sub,and,or,xor}_and_fetch and __sync_bool_compare_and_swap. - <rdar://problem/6762223> [sema/irgen] support __sync_bool_compare_and_swap and __sync_add_and_fetch llvm-svn: 68482
2009-04-07 08:55:51 +08:00
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
old = __sync_xor_and_fetch(&valc, 5);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw xor i8* %valc, i8 5 seq_cst, align 1
Add __sync_fetch_and_nand (again) Prior to GCC 4.4, __sync_fetch_and_nand was implemented as: { tmp = *ptr; *ptr = ~tmp & value; return tmp; } but this was changed in GCC 4.4 to be: { tmp = *ptr; *ptr = ~(tmp & value); return tmp; } in response to this change, support for sync_fetch_and_nand (and sync_nand_and_fetch) was removed in r99522 in order to avoid miscompiling code depending on the old semantics. However, at this point: 1. Many years have passed, and the amount of code relying on the old semantics is likely smaller. 2. Through the work of many contributors, all LLVM backends have been updated such that "atomicrmw nand" provides the newer GCC 4.4+ semantics (this process was complete July of 2014 (added to the release notes in r212635). 3. The lack of this intrinsic is now a needless impediment to porting codes from GCC to Clang (I've now seen several examples of this). It is true, however, that we still set GNUC_MINOR to 2 (corresponding to GCC 4.2). To compensate for this, and to address the original concern regarding code relying on the old semantics, I've added a warning that specifically details the fact that the semantics have changed and that we provide the newer semantics. Fixes PR8842. llvm-svn: 218905
2014-10-03 04:53:50 +08:00
old = __sync_nand_and_fetch(&valc, 6);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw nand i8* %valc, i8 6 seq_cst, align 1
Add __sync_fetch_and_nand (again) Prior to GCC 4.4, __sync_fetch_and_nand was implemented as: { tmp = *ptr; *ptr = ~tmp & value; return tmp; } but this was changed in GCC 4.4 to be: { tmp = *ptr; *ptr = ~(tmp & value); return tmp; } in response to this change, support for sync_fetch_and_nand (and sync_nand_and_fetch) was removed in r99522 in order to avoid miscompiling code depending on the old semantics. However, at this point: 1. Many years have passed, and the amount of code relying on the old semantics is likely smaller. 2. Through the work of many contributors, all LLVM backends have been updated such that "atomicrmw nand" provides the newer GCC 4.4+ semantics (this process was complete July of 2014 (added to the release notes in r212635). 3. The lack of this intrinsic is now a needless impediment to porting codes from GCC to Clang (I've now seen several examples of this). It is true, however, that we still set GNUC_MINOR to 2 (corresponding to GCC 4.2). To compensate for this, and to address the original concern regarding code relying on the old semantics, I've added a warning that specifically details the fact that the semantics have changed and that we provide the newer semantics. Fixes PR8842. llvm-svn: 218905
2014-10-03 04:53:50 +08:00
Fix the atomics sema code to convert operands to the argument types of the underlying _N builtin, not the the type of the pointee of the actual type. This ensures that atomics involving pointers end up using the correct integer type when they are resolved, avoiding aborts in codegen. llvm-svn: 71218
2009-05-08 23:36:58 +08:00
__sync_val_compare_and_swap((void **)0, (void *)0, (void *)0);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i32* null, i32 0, i32 0 seq_cst seq_cst, align 4
IR-change: cmpxchg operations now return { iN, i1 }. This is a minimal fix for clang. I'll soon add support for generating weak variants when requested, but that's not really necessary for the LLVM change in isolation. llvm-svn: 210907
2014-06-13 22:24:59 +08:00
// CHECK: extractvalue { i32, i1 } [[PAIR]], 0
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Improve the representation of the atomic builtins in a few ways. First, we make their call expressions synthetically have the "deduced" types based on their first argument. We only insert conversions in the AST for arguments whose values require conversion to match the value type expected. This keeps PR7600 closed by maintaining the return type, but avoids assertions due to unexpected implicit casts making the type unsigned (test case added from Daniel). The magic is moved into the codegen for the atomic builtin which inserts the casts as needed at the IR level to raise the type to an integer suitable for the LLVM intrinsic. This shouldn't cause any real change in functionality, but now we can make the builtin be more truly polymorphic. llvm-svn: 108638
2010-07-18 15:23:17 +08:00
if ( __sync_val_compare_and_swap(&valb, 0, 1)) {
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: [[PAIR:%[a-z0-9_.]+]] = cmpxchg i8* %valb, i8 0, i8 1 seq_cst seq_cst, align 1
IR-change: cmpxchg operations now return { iN, i1 }. This is a minimal fix for clang. I'll soon add support for generating weak variants when requested, but that's not really necessary for the LLVM change in isolation. llvm-svn: 210907
2014-06-13 22:24:59 +08:00
// CHECK: [[VAL:%[a-z0-9_.]+]] = extractvalue { i8, i1 } [[PAIR]], 0
// CHECK: trunc i8 [[VAL]] to i1
Improve the representation of the atomic builtins in a few ways. First, we make their call expressions synthetically have the "deduced" types based on their first argument. We only insert conversions in the AST for arguments whose values require conversion to match the value type expected. This keeps PR7600 closed by maintaining the return type, but avoids assertions due to unexpected implicit casts making the type unsigned (test case added from Daniel). The magic is moved into the codegen for the atomic builtin which inserts the casts as needed at the IR level to raise the type to an integer suitable for the LLVM intrinsic. This shouldn't cause any real change in functionality, but now we can make the builtin be more truly polymorphic. llvm-svn: 108638
2010-07-18 15:23:17 +08:00
old = 42;
}
filecheckize. llvm-svn: 114497
2010-09-22 07:22:41 +08:00
Fix a goof in my previous patch -- not all of the builtins return a value, some fixed return types. llvm-svn: 108657
2010-07-19 04:54:12 +08:00
__sync_bool_compare_and_swap((void **)0, (void *)0, (void *)0);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: cmpxchg i32* null, i32 0, i32 0 seq_cst seq_cst, align 4
implement __sync_synchronize and __sync_lock_release, rdar://6880573 llvm-svn: 71637
2009-05-13 12:46:13 +08:00
__sync_lock_release(&val);
Don't try to create "store atomic" instructions of non-integer types; they aren't supported at the moment. PR12040. llvm-svn: 152891
2012-03-16 09:48:04 +08:00
// CHECK: store atomic i32 0, {{.*}} release, align 4
__sync_lock_release(&ptrval);
// CHECK: store atomic i32 0, {{.*}} release, align 4
implement __sync_synchronize and __sync_lock_release, rdar://6880573 llvm-svn: 71637
2009-05-13 12:46:13 +08:00
__sync_synchronize ();
Switch clang over to using fence/atomicrmw/cmpxchg instead of the intrinsics (which will go away). LLVM CodeGen does almost exactly the same thing with these and the old intrinsics, so I'm reasonably confident this will not break anything. There are still a few issues which need to be resolved with code generation for atomic load and store, so I'm not converting the places which need those for now. I'm not entirely sure what to do about __builtin_llvm_memory_barrier: the fence instruction doesn't expose all the possibilities which can be expressed by __builtin_llvm_memory_barrier. I would appreciate hearing from anyone who is using this intrinsic. llvm-svn: 139216
2011-09-07 09:41:24 +08:00
// CHECK: fence seq_cst
implement __sync_synchronize and __sync_lock_release, rdar://6880573 llvm-svn: 71637
2009-05-13 12:46:13 +08:00
Added support to generate some atomic operators (add, sub, and, or etc..) llvm-svn: 50919
2008-05-10 06:40:52 +08:00
return old;
}
Fix a goof in my previous patch -- not all of the builtins return a value, some fixed return types. llvm-svn: 108657
2010-07-19 04:54:12 +08:00
fix __sync_bool_compare_and_swap to work with address-space qualified types. llvm-svn: 114498
2010-09-22 07:24:52 +08:00
// CHECK: @release_return
Fix a goof in my previous patch -- not all of the builtins return a value, some fixed return types. llvm-svn: 108657
2010-07-19 04:54:12 +08:00
void release_return(int *lock) {
// Ensure this is actually returning void all the way through.
return __sync_lock_release(lock);
Re-commit r139643. Make clang use Acquire loads and Release stores where necessary. llvm-svn: 139650
2011-09-14 06:21:56 +08:00
// CHECK: store atomic {{.*}} release, align 4
Fix a goof in my previous patch -- not all of the builtins return a value, some fixed return types. llvm-svn: 108657
2010-07-19 04:54:12 +08:00
}
fix __sync_bool_compare_and_swap to work with address-space qualified types. llvm-svn: 114498
2010-09-22 07:24:52 +08:00
fix the rest of rdar://8461279 - clang miscompiles address-space qualified atomics llvm-svn: 114503
2010-09-22 07:40:48 +08:00
// rdar://8461279 - Atomics with address spaces.
fix __sync_bool_compare_and_swap to work with address-space qualified types. llvm-svn: 114498
2010-09-22 07:24:52 +08:00
// CHECK: @addrspace
void addrspace(int __attribute__((address_space(256))) * P) {
__sync_bool_compare_and_swap(P, 0, 1);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst seq_cst, align 4
Switch clang over to using fence/atomicrmw/cmpxchg instead of the intrinsics (which will go away). LLVM CodeGen does almost exactly the same thing with these and the old intrinsics, so I'm reasonably confident this will not break anything. There are still a few issues which need to be resolved with code generation for atomic load and store, so I'm not converting the places which need those for now. I'm not entirely sure what to do about __builtin_llvm_memory_barrier: the fence instruction doesn't expose all the possibilities which can be expressed by __builtin_llvm_memory_barrier. I would appreciate hearing from anyone who is using this intrinsic. llvm-svn: 139216
2011-09-07 09:41:24 +08:00
same bug as before, this time with __sync_val_compare_and_swap. llvm-svn: 114502
2010-09-22 07:35:30 +08:00
__sync_val_compare_and_swap(P, 0, 1);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst seq_cst, align 4
Switch clang over to using fence/atomicrmw/cmpxchg instead of the intrinsics (which will go away). LLVM CodeGen does almost exactly the same thing with these and the old intrinsics, so I'm reasonably confident this will not break anything. There are still a few issues which need to be resolved with code generation for atomic load and store, so I'm not converting the places which need those for now. I'm not entirely sure what to do about __builtin_llvm_memory_barrier: the fence instruction doesn't expose all the possibilities which can be expressed by __builtin_llvm_memory_barrier. I would appreciate hearing from anyone who is using this intrinsic. llvm-svn: 139216
2011-09-07 09:41:24 +08:00
fix the rest of rdar://8461279 - clang miscompiles address-space qualified atomics llvm-svn: 114503
2010-09-22 07:40:48 +08:00
__sync_xor_and_fetch(P, 123);
NFC: update clang tests to check ordering and alignment for atomicrmw/cmpxchg. The ability to specify alignment was recently added, and it's an important property which we should ensure is set as expected by Clang. (Especially before making further changes to Clang's code in this area.) But, because it's on the end of the lines, the existing tests all ignore it. Therefore, update all the tests to also verify the expected alignment for atomicrmw and cmpxchg. While I was in there, I also updated uses of 'load atomic' and 'store atomic', and added the memory ordering, where that was missing.
2021-02-12 06:33:43 +08:00
// CHECK: atomicrmw xor i32 addrspace(256)*{{.*}}, i32 123 seq_cst, align 4
fix __sync_bool_compare_and_swap to work with address-space qualified types. llvm-svn: 114498
2010-09-22 07:24:52 +08:00
}