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llvm-project/llvm/test/CodeGen/Thumb2/thumb2-sbc.ll

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ARM: yet another round of ARM test clean ups llvm-svn: 205586
2014-04-04 07:47:24 +08:00
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
Shrink ADDS, ADC, RSB, and SUBS. llvm-svn: 78776
2009-08-12 09:49:45 +08:00
define i64 @f1(i64 %a, i64 %b) {
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
; CHECK: f1
Shrink ADDS, ADC, RSB, and SUBS. llvm-svn: 78776
2009-08-12 09:49:45 +08:00
; CHECK: subs r0, r0, r2
%tmp = sub i64 %a, %b
ret i64 %tmp
}
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
; 734439407618 = 0x000000ab00000002
define i64 @f2(i64 %a) {
; CHECK: f2
; CHECK: subs r0, #2
; CHECK: sbc r1, r1, #171
%tmp = sub i64 %a, 734439407618
ret i64 %tmp
}
; 5066626890203138 = 0x0012001200000002
define i64 @f3(i64 %a) {
; CHECK: f3
; CHECK: subs r0, #2
; CHECK: sbc r1, r1, #1179666
%tmp = sub i64 %a, 5066626890203138
ret i64 %tmp
}
; 3747052064576897026 = 0x3400340000000002
define i64 @f4(i64 %a) {
; CHECK: f4
; CHECK: subs r0, #2
; CHECK: sbc r1, r1, #872428544
%tmp = sub i64 %a, 3747052064576897026
ret i64 %tmp
}
; 6221254862626095106 = 0x5656565600000002
define i64 @f5(i64 %a) {
; CHECK: f5
; CHECK: subs r0, #2
; CHECK: adc r1, r1, #-1448498775
whitespace llvm-svn: 130046
2011-04-23 11:24:11 +08:00
%tmp = sub i64 %a, 6221254862626095106
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
ret i64 %tmp
}
; 287104476244869122 = 0x03fc000000000002
define i64 @f6(i64 %a) {
; CHECK: f6
; CHECK: subs r0, #2
; CHECK: sbc r1, r1, #66846720
whitespace llvm-svn: 130046
2011-04-23 11:24:11 +08:00
%tmp = sub i64 %a, 287104476244869122
Improve 64-subtraction of immediates when parts of the immediate can fit in the literal field of an instruction. E.g., long long foo(long long a) { return a - 734439407618LL; } rdar://7038284 llvm-svn: 108339
2010-07-15 01:45:16 +08:00
ret i64 %tmp
}
Thumb2 and ARM add/subtract with carry fixes. Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). llvm-svn: 130048
2011-04-23 11:55:32 +08:00
; Example from numerics code that manually computes wider-than-64 values.
;
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done llvm-svn: 186280
2013-07-14 14:24:09 +08:00
; CHECK-LABEL: livecarry:
Thumb2 and ARM add/subtract with carry fixes. Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>. t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the assembly printer correctly prints the 's' suffix. Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags. Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS. Fixes ARM SBC lowering to check for live carry (potential bug). llvm-svn: 130048
2011-04-23 11:55:32 +08:00
; CHECK: adds
; CHECK: adc
define i64 @livecarry(i64 %carry, i32 %digit) nounwind {
%ch = lshr i64 %carry, 32
%cl = and i64 %carry, 4294967295
%truncdigit = zext i32 %digit to i64
%prod = add i64 %cl, %truncdigit
%ph = lshr i64 %prod, 32
%carryresult = add i64 %ch, %ph
ret i64 %carryresult
}