forked from OSchip/llvm-project
60 lines
1.9 KiB
LLVM
60 lines
1.9 KiB
LLVM
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; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; FUNC-LABEL: @fneg_f64
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; SI: V_XOR_B32
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define void @fneg_f64(double addrspace(1)* %out, double %in) {
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%fneg = fsub double -0.000000e+00, %in
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store double %fneg, double addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @fneg_v2f64
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; SI: V_XOR_B32
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; SI: V_XOR_B32
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define void @fneg_v2f64(<2 x double> addrspace(1)* nocapture %out, <2 x double> %in) {
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%fneg = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %in
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store <2 x double> %fneg, <2 x double> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: @fneg_v4f64
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; R600: -PV
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; R600: -T
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; R600: -PV
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; R600: -PV
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; SI: V_XOR_B32
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; SI: V_XOR_B32
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; SI: V_XOR_B32
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; SI: V_XOR_B32
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define void @fneg_v4f64(<4 x double> addrspace(1)* nocapture %out, <4 x double> %in) {
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%fneg = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %in
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store <4 x double> %fneg, <4 x double> addrspace(1)* %out
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ret void
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}
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; DAGCombiner will transform:
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; (fneg (f64 bitcast (i64 a))) => (f64 bitcast (xor (i64 a), 0x80000000))
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; unless the target returns true for isNegFree()
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; FUNC-LABEL: @fneg_free_f64
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; FIXME: Unnecessary copy to VGPRs
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; SI: V_ADD_F64 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, -{{v\[[0-9]+:[0-9]+\]}}, 0, 0
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define void @fneg_free_f64(double addrspace(1)* %out, i64 %in) {
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%bc = bitcast i64 %in to double
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%fsub = fsub double 0.0, %bc
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store double %fsub, double addrspace(1)* %out
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ret void
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}
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; SI-LABEL: @fneg_fold
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; SI: S_LOAD_DWORDX2 [[NEG_VALUE:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
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; SI-NOT: XOR
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; SI: V_MUL_F64 {{v\[[0-9]+:[0-9]+\]}}, -[[NEG_VALUE]], {{v\[[0-9]+:[0-9]+\]}}
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define void @fneg_fold_f64(double addrspace(1)* %out, double %in) {
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%fsub = fsub double -0.0, %in
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%fmul = fmul double %fsub, %in
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store double %fmul, double addrspace(1)* %out
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ret void
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}
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