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llvm-project/clang/test/CodeGen/lzcnt-builtins.c

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[X86] Remove the mm_malloc.h include guard hack from the X86 builtins tests The X86 clang/test/CodeGen/*builtins.c tests define the mm_malloc.h include guard as a hack for avoiding its inclusion (mm_malloc.h requires a hosted environment since it expects stdlib.h to be available - which is not the case in these internal clang codegen tests). This patch removes this hack and instead passes -ffreestanding to clang cc1. Differential Revision: https://reviews.llvm.org/D24825 llvm-svn: 282581
2016-09-28 19:59:09 +08:00
// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +lzcnt -emit-llvm -o - | FileCheck %s
Add intrinsics for lzcnt and tzcnt instructions. llvm-svn: 147263
2011-12-25 14:25:37 +08:00
[X86] NFC Include immintrin.h in CodeGen tests Following r333110: "Move all Intel defined intrinsic includes into immintrin.h" llvm-svn: 333160
2018-05-24 15:09:08 +08:00
#include <immintrin.h>
Add intrinsics for lzcnt and tzcnt instructions. llvm-svn: 147263
2011-12-25 14:25:37 +08:00
unsigned short test__lzcnt16(unsigned short __X)
{
[X86] For lzcnt/tzcnt intrinsics use cttz/ctlz intrinsics with zero_undef flag set to false. Previously we used a select and the zero_undef=true intrinsic. In -O2 this pattern will get optimized to zero_undef=false. But in -O0 this optimization won't happen. This results in a compare and cmov being wrapped around a tzcnt/lzcnt instruction. By using the zero_undef=false intrinsic directly without the select, we can improve the -O0 codegen to just an lzcnt/tzcnt instruction. Differential Revision: https://reviews.llvm.org/D52392 llvm-svn: 343126
2018-09-27 01:01:44 +08:00
// CHECK: @llvm.ctlz.i16(i16 %{{.*}}, i1 false)
Add intrinsics for lzcnt and tzcnt instructions. llvm-svn: 147263
2011-12-25 14:25:37 +08:00
return __lzcnt16(__X);
}
unsigned int test_lzcnt32(unsigned int __X)
{
[X86] For lzcnt/tzcnt intrinsics use cttz/ctlz intrinsics with zero_undef flag set to false. Previously we used a select and the zero_undef=true intrinsic. In -O2 this pattern will get optimized to zero_undef=false. But in -O0 this optimization won't happen. This results in a compare and cmov being wrapped around a tzcnt/lzcnt instruction. By using the zero_undef=false intrinsic directly without the select, we can improve the -O0 codegen to just an lzcnt/tzcnt instruction. Differential Revision: https://reviews.llvm.org/D52392 llvm-svn: 343126
2018-09-27 01:01:44 +08:00
// CHECK: @llvm.ctlz.i32(i32 %{{.*}}, i1 false)
Add intrinsics for lzcnt and tzcnt instructions. llvm-svn: 147263
2011-12-25 14:25:37 +08:00
return __lzcnt32(__X);
}
unsigned long long test__lzcnt64(unsigned long long __X)
{
[X86] For lzcnt/tzcnt intrinsics use cttz/ctlz intrinsics with zero_undef flag set to false. Previously we used a select and the zero_undef=true intrinsic. In -O2 this pattern will get optimized to zero_undef=false. But in -O0 this optimization won't happen. This results in a compare and cmov being wrapped around a tzcnt/lzcnt instruction. By using the zero_undef=false intrinsic directly without the select, we can improve the -O0 codegen to just an lzcnt/tzcnt instruction. Differential Revision: https://reviews.llvm.org/D52392 llvm-svn: 343126
2018-09-27 01:01:44 +08:00
// CHECK: @llvm.ctlz.i64(i64 %{{.*}}, i1 false)
Add intrinsics for lzcnt and tzcnt instructions. llvm-svn: 147263
2011-12-25 14:25:37 +08:00
return __lzcnt64(__X);
}
Add _lzcnt_u32 and _lzcnt_u64 to lzcntintrin.h to match Intel documentation names for these intrinsics. llvm-svn: 221066
2014-11-02 06:50:57 +08:00
unsigned int test_lzcnt_u32(unsigned int __X)
{
[X86] For lzcnt/tzcnt intrinsics use cttz/ctlz intrinsics with zero_undef flag set to false. Previously we used a select and the zero_undef=true intrinsic. In -O2 this pattern will get optimized to zero_undef=false. But in -O0 this optimization won't happen. This results in a compare and cmov being wrapped around a tzcnt/lzcnt instruction. By using the zero_undef=false intrinsic directly without the select, we can improve the -O0 codegen to just an lzcnt/tzcnt instruction. Differential Revision: https://reviews.llvm.org/D52392 llvm-svn: 343126
2018-09-27 01:01:44 +08:00
// CHECK: @llvm.ctlz.i32(i32 %{{.*}}, i1 false)
Add _lzcnt_u32 and _lzcnt_u64 to lzcntintrin.h to match Intel documentation names for these intrinsics. llvm-svn: 221066
2014-11-02 06:50:57 +08:00
return _lzcnt_u32(__X);
}
unsigned long long test__lzcnt_u64(unsigned long long __X)
{
[X86] For lzcnt/tzcnt intrinsics use cttz/ctlz intrinsics with zero_undef flag set to false. Previously we used a select and the zero_undef=true intrinsic. In -O2 this pattern will get optimized to zero_undef=false. But in -O0 this optimization won't happen. This results in a compare and cmov being wrapped around a tzcnt/lzcnt instruction. By using the zero_undef=false intrinsic directly without the select, we can improve the -O0 codegen to just an lzcnt/tzcnt instruction. Differential Revision: https://reviews.llvm.org/D52392 llvm-svn: 343126
2018-09-27 01:01:44 +08:00
// CHECK: @llvm.ctlz.i64(i64 %{{.*}}, i1 false)
Add _lzcnt_u32 and _lzcnt_u64 to lzcntintrin.h to match Intel documentation names for these intrinsics. llvm-svn: 221066
2014-11-02 06:50:57 +08:00
return _lzcnt_u64(__X);
}