2005-02-05 10:24:26 +08:00
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//===- Alpha.td - Describe the Alpha Target Machine --------*- tablegen -*-===//
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2005-01-23 07:41:55 +08:00
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//
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// The LLVM Compiler Infrastructure
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//
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2007-12-30 04:36:04 +08:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-01-23 07:41:55 +08:00
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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// Get the target-independent interfaces which we are implementing...
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//
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include "../Target.td"
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//Alpha is little endian
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2005-10-24 06:08:45 +08:00
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//===----------------------------------------------------------------------===//
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// Subtarget Features
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//===----------------------------------------------------------------------===//
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2007-04-16 22:06:19 +08:00
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def FeatureCIX : SubtargetFeature<"cix", "HasCT", "true",
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2005-10-27 01:28:23 +08:00
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"Enable CIX extentions">;
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2005-10-24 06:08:45 +08:00
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2005-01-23 07:41:55 +08:00
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//===----------------------------------------------------------------------===//
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// Register File Description
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//===----------------------------------------------------------------------===//
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include "AlphaRegisterInfo.td"
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2006-03-10 01:16:45 +08:00
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//===----------------------------------------------------------------------===//
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// Schedule Description
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//===----------------------------------------------------------------------===//
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include "AlphaSchedule.td"
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2005-01-23 07:41:55 +08:00
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//===----------------------------------------------------------------------===//
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// Instruction Descriptions
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//===----------------------------------------------------------------------===//
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include "AlphaInstrInfo.td"
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def AlphaInstrInfo : InstrInfo {
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// Define how we want to layout our target-specific information field.
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// let TSFlagsFields = [];
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// let TSFlagsShifts = [];
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}
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2005-10-24 06:08:45 +08:00
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//===----------------------------------------------------------------------===//
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// Alpha Processor Definitions
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//===----------------------------------------------------------------------===//
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2006-03-10 01:16:45 +08:00
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def : Processor<"generic", Alpha21264Itineraries, []>;
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2007-01-25 05:09:16 +08:00
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def : Processor<"ev6" , Alpha21264Itineraries, []>;
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def : Processor<"ev67" , Alpha21264Itineraries, [FeatureCIX]>;
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2005-10-24 06:08:45 +08:00
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//===----------------------------------------------------------------------===//
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// The Alpha Target
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//===----------------------------------------------------------------------===//
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2005-01-23 07:41:55 +08:00
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def Alpha : Target {
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// Pull in Instruction Info:
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let InstructionSet = AlphaInstrInfo;
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}
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