2018-11-30 09:01:52 +08:00
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//===- X86DiscriminateMemOps.cpp - Unique IDs for Mem Ops -----------------===//
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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2018-11-30 09:01:52 +08:00
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//
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//===----------------------------------------------------------------------===//
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///
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/// This pass aids profile-driven cache prefetch insertion by ensuring all
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/// instructions that have a memory operand are distinguishible from each other.
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///
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//===----------------------------------------------------------------------===//
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#include "X86.h"
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#include "X86InstrBuilder.h"
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#include "X86InstrInfo.h"
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#include "X86MachineFunctionInfo.h"
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#include "X86Subtarget.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/IR/DebugInfoMetadata.h"
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#include "llvm/ProfileData/SampleProf.h"
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#include "llvm/ProfileData/SampleProfReader.h"
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2018-12-22 06:48:50 +08:00
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#include "llvm/Support/Debug.h"
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2018-11-30 09:01:52 +08:00
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#include "llvm/Transforms/IPO/SampleProfile.h"
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using namespace llvm;
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2018-12-14 03:40:59 +08:00
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#define DEBUG_TYPE "x86-discriminate-memops"
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2018-11-30 09:01:52 +08:00
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namespace {
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using Location = std::pair<StringRef, unsigned>;
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Location diToLocation(const DILocation *Loc) {
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return std::make_pair(Loc->getFilename(), Loc->getLine());
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}
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/// Ensure each instruction having a memory operand has a distinct <LineNumber,
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/// Discriminator> pair.
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void updateDebugInfo(MachineInstr *MI, const DILocation *Loc) {
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DebugLoc DL(Loc);
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MI->setDebugLoc(DL);
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}
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class X86DiscriminateMemOps : public MachineFunctionPass {
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bool runOnMachineFunction(MachineFunction &MF) override;
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StringRef getPassName() const override {
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return "X86 Discriminate Memory Operands";
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}
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public:
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static char ID;
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/// Default construct and initialize the pass.
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X86DiscriminateMemOps();
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};
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} // end anonymous namespace
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//===----------------------------------------------------------------------===//
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// Implementation
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//===----------------------------------------------------------------------===//
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char X86DiscriminateMemOps::ID = 0;
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/// Default construct and initialize the pass.
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X86DiscriminateMemOps::X86DiscriminateMemOps() : MachineFunctionPass(ID) {}
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bool X86DiscriminateMemOps::runOnMachineFunction(MachineFunction &MF) {
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DISubprogram *FDI = MF.getFunction().getSubprogram();
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if (!FDI || !FDI->getUnit()->getDebugInfoForProfiling())
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return false;
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// Have a default DILocation, if we find instructions with memops that don't
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// have any debug info.
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const DILocation *ReferenceDI =
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DILocation::get(FDI->getContext(), FDI->getLine(), 0, FDI);
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DenseMap<Location, unsigned> MemOpDiscriminators;
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MemOpDiscriminators[diToLocation(ReferenceDI)] = 0;
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// Figure out the largest discriminator issued for each Location. When we
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// issue new discriminators, we can thus avoid issuing discriminators
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// belonging to instructions that don't have memops. This isn't a requirement
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// for the goals of this pass, however, it avoids unnecessary ambiguity.
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for (auto &MBB : MF) {
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for (auto &MI : MBB) {
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const auto &DI = MI.getDebugLoc();
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if (!DI)
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continue;
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Location Loc = diToLocation(DI);
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MemOpDiscriminators[Loc] =
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std::max(MemOpDiscriminators[Loc], DI->getBaseDiscriminator());
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}
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}
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// Keep track of the discriminators seen at each Location. If an instruction's
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// DebugInfo has a Location and discriminator we've already seen, replace its
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// discriminator with a new one, to guarantee uniqueness.
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DenseMap<Location, DenseSet<unsigned>> Seen;
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bool Changed = false;
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for (auto &MBB : MF) {
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for (auto &MI : MBB) {
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if (X86II::getMemoryOperandNo(MI.getDesc().TSFlags) < 0)
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continue;
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const DILocation *DI = MI.getDebugLoc();
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if (!DI) {
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DI = ReferenceDI;
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}
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2018-12-22 06:48:50 +08:00
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Location L = diToLocation(DI);
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DenseSet<unsigned> &Set = Seen[L];
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2018-11-30 09:01:52 +08:00
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const std::pair<DenseSet<unsigned>::iterator, bool> TryInsert =
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Set.insert(DI->getBaseDiscriminator());
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if (!TryInsert.second) {
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2018-12-22 06:48:50 +08:00
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unsigned BF, DF, CI = 0;
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DILocation::decodeDiscriminator(DI->getDiscriminator(), BF, DF, CI);
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Optional<unsigned> EncodedDiscriminator = DILocation::encodeDiscriminator(
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MemOpDiscriminators[L] + 1, DF, CI);
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if (!EncodedDiscriminator) {
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// FIXME(mtrofin): The assumption is that this scenario is infrequent/OK
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// not to support. If evidence points otherwise, we can explore synthesizeing
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// unique DIs by adding fake line numbers, or by constructing 64 bit
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// discriminators.
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LLVM_DEBUG(dbgs() << "Unable to create a unique discriminator "
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"for instruction with memory operand in: "
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2018-12-14 03:40:59 +08:00
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<< DI->getFilename() << " Line: " << DI->getLine()
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<< " Column: " << DI->getColumn()
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2018-12-22 06:48:50 +08:00
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<< ". This is likely due to a large macro expansion. \n");
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continue;
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2018-12-14 03:40:59 +08:00
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}
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2018-12-22 06:48:50 +08:00
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// Since we were able to encode, bump the MemOpDiscriminators.
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++MemOpDiscriminators[L];
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DI = DI->cloneWithDiscriminator(EncodedDiscriminator.getValue());
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updateDebugInfo(&MI, DI);
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Changed = true;
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std::pair<DenseSet<unsigned>::iterator, bool> MustInsert =
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Set.insert(DI->getBaseDiscriminator());
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2018-12-22 07:02:10 +08:00
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(void)MustInsert; // Silence warning in release build.
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2018-12-22 06:48:50 +08:00
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assert(MustInsert.second && "New discriminator shouldn't be present in set");
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2018-11-30 09:01:52 +08:00
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}
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// Bump the reference DI to avoid cramming discriminators on line 0.
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// FIXME(mtrofin): pin ReferenceDI on blocks or first instruction with DI
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// in a block. It's more consistent than just relying on the last memop
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// instruction we happened to see.
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ReferenceDI = DI;
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}
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}
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return Changed;
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}
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FunctionPass *llvm::createX86DiscriminateMemOpsPass() {
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return new X86DiscriminateMemOps();
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}
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