forked from OSchip/llvm-project
29 lines
1.1 KiB
LLVM
29 lines
1.1 KiB
LLVM
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; RUN: llc < %s -march=mips -mcpu=mips32r5 -mattr=+fp64,+msa | FileCheck %s
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; Test that fexup[rl].w don't crash LLVM during type legalization.
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@g = local_unnamed_addr global <8 x half> <half 0xH5BF8, half 0xH5BF8, half 0xH5BF8, half 0xH5BF8, half 0xH73C0, half 0xH73C0, half 0xH73C0, half 0xH73C0>, align 16
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@i = local_unnamed_addr global <4 x float> zeroinitializer, align 16
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@j = local_unnamed_addr global <4 x float> zeroinitializer, align 16
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define i32 @test() local_unnamed_addr {
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entry:
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%0 = load <8 x half>, <8 x half>* @g, align 16
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%1 = tail call <4 x float> @llvm.mips.fexupl.w(<8 x half> %0)
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store <4 x float> %1, <4 x float>* @i, align 16
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; CHECK: ld.h $w[[W0:[0-9]+]], 0(${{[0-9]+}})
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; CHECK: fexupl.w $w[[W1:[0-9]+]], $w[[W0]]
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; CHECK: st.w $w[[W1]], 0(${{[0-9]+}})
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%2 = tail call <4 x float> @llvm.mips.fexupr.w(<8 x half> %0)
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store <4 x float> %2, <4 x float>* @j, align 16
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; CHECK: fexupr.w $w[[W2:[0-9]+]], $w[[W0]]
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; CHECK: st.w $w[[W2]], 0(${{[0-9]+}})
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ret i32 0
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}
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declare <4 x float> @llvm.mips.fexupl.w(<8 x half>)
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declare <4 x float> @llvm.mips.fexupr.w(<8 x half>)
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