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llvm-project/llvm/test/CodeGen/Mips/gprestore.ll

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[mips] UnXFAIL gprestore.ll test. Repurpose this previously XFAIL'd test to check that jalr uses $25 as per ABI requirements for PIC code. llvm-svn: 324729
2018-02-09 18:46:16 +08:00
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
[mips] Emit .reloc R_{MICRO}MIPS_JALR along with j(al)r(c) $25 The callee address is added as an optional operand (MCSymbol) in AdjustInstrPostInstrSelection() and then used by asm printer to insert: '.reloc tmplabel, R_MIPS_JALR, symbol tmplabel:'. Controlled with '-mips-jalr-reloc', default is true. Differential revision: https://reviews.llvm.org/D56694 llvm-svn: 351485
2019-01-18 05:50:37 +08:00
; RUN: llc -mtriple=mips-mti-linux-gnu < %s -relocation-model=pic -mips-jalr-reloc=false | FileCheck %s --check-prefix=O32
; RUN: llc -mtriple=mips64-mti-linux-gnu < %s -relocation-model=pic -mips-jalr-reloc=false | FileCheck %s --check-prefix=N64
; RUN: llc -mtriple=mips64-mti-linux-gnu < %s -relocation-model=pic -target-abi n32 -mips-jalr-reloc=false | FileCheck %s --check-prefix=N32
; RUN: llc -mtriple=mips-mti-linux-gnu < %s -relocation-model=pic -O3 -mips-jalr-reloc=false | FileCheck %s --check-prefix=O3O32
; RUN: llc -mtriple=mips64-mti-linux-gnu < %s -relocation-model=pic -O3 -mips-jalr-reloc=false | FileCheck %s --check-prefix=O3N64
; RUN: llc -mtriple=mips64-mti-linux-gnu < %s -relocation-model=pic -target-abi n32 -O3 -mips-jalr-reloc=false | FileCheck %s --check-prefix=O3N32
[mips] UnXFAIL gprestore.ll test. Repurpose this previously XFAIL'd test to check that jalr uses $25 as per ABI requirements for PIC code. llvm-svn: 324729
2018-02-09 18:46:16 +08:00
; Test that PIC calls use the $25 register. This is an ABI requirement.
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. llvm-svn: 130847
2011-05-05 01:54:27 +08:00
@p = external global i32
@q = external global i32
@r = external global i32
define void @f0() nounwind {
[mips] UnXFAIL gprestore.ll test. Repurpose this previously XFAIL'd test to check that jalr uses $25 as per ABI requirements for PIC code. llvm-svn: 324729
2018-02-09 18:46:16 +08:00
; O32-LABEL: f0:
; O32: # %bb.0: # %entry
; O32-NEXT: lui $2, %hi(_gp_disp)
; O32-NEXT: addiu $2, $2, %lo(_gp_disp)
; O32-NEXT: addiu $sp, $sp, -32
; O32-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill
; O32-NEXT: sw $17, 24($sp) # 4-byte Folded Spill
; O32-NEXT: sw $16, 20($sp) # 4-byte Folded Spill
; O32-NEXT: addu $16, $2, $25
; O32-NEXT: lw $25, %call16(f1)($16)
; O32-NEXT: jalr $25
; O32-NEXT: move $gp, $16
; O32-NEXT: lw $1, %got(p)($16)
; O32-NEXT: lw $4, 0($1)
; O32-NEXT: lw $25, %call16(f2)($16)
; O32-NEXT: jalr $25
; O32-NEXT: move $gp, $16
; O32-NEXT: lw $1, %got(q)($16)
; O32-NEXT: lw $17, 0($1)
; O32-NEXT: lw $25, %call16(f2)($16)
; O32-NEXT: jalr $25
; O32-NEXT: move $4, $17
; O32-NEXT: lw $1, %got(r)($16)
; O32-NEXT: lw $5, 0($1)
; O32-NEXT: lw $25, %call16(f3)($16)
; O32-NEXT: move $4, $17
; O32-NEXT: jalr $25
; O32-NEXT: move $gp, $16
; O32-NEXT: lw $16, 20($sp) # 4-byte Folded Reload
; O32-NEXT: lw $17, 24($sp) # 4-byte Folded Reload
; O32-NEXT: lw $ra, 28($sp) # 4-byte Folded Reload
; O32-NEXT: jr $ra
; O32-NEXT: addiu $sp, $sp, 32
;
; N64-LABEL: f0:
; N64: # %bb.0: # %entry
; N64-NEXT: daddiu $sp, $sp, -32
; N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
; N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
; N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
; N64-NEXT: lui $1, %hi(%neg(%gp_rel(f0)))
; N64-NEXT: daddu $1, $1, $25
; N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(f0)))
; N64-NEXT: ld $25, %call16(f1)($gp)
; N64-NEXT: jalr $25
; N64-NEXT: nop
; N64-NEXT: ld $1, %got_disp(p)($gp)
; N64-NEXT: ld $25, %call16(f2)($gp)
; N64-NEXT: jalr $25
; N64-NEXT: lw $4, 0($1)
; N64-NEXT: ld $1, %got_disp(q)($gp)
; N64-NEXT: lw $16, 0($1)
; N64-NEXT: ld $25, %call16(f2)($gp)
; N64-NEXT: jalr $25
; N64-NEXT: move $4, $16
; N64-NEXT: ld $1, %got_disp(r)($gp)
; N64-NEXT: lw $5, 0($1)
; N64-NEXT: ld $25, %call16(f3)($gp)
; N64-NEXT: jalr $25
; N64-NEXT: move $4, $16
; N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
; N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
; N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
; N64-NEXT: jr $ra
; N64-NEXT: daddiu $sp, $sp, 32
;
; N32-LABEL: f0:
; N32: # %bb.0: # %entry
; N32-NEXT: addiu $sp, $sp, -32
; N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
; N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
; N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
; N32-NEXT: lui $1, %hi(%neg(%gp_rel(f0)))
; N32-NEXT: addu $1, $1, $25
; N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(f0)))
; N32-NEXT: lw $25, %call16(f1)($gp)
; N32-NEXT: jalr $25
; N32-NEXT: nop
; N32-NEXT: lw $1, %got_disp(p)($gp)
; N32-NEXT: lw $25, %call16(f2)($gp)
; N32-NEXT: jalr $25
; N32-NEXT: lw $4, 0($1)
; N32-NEXT: lw $1, %got_disp(q)($gp)
; N32-NEXT: lw $16, 0($1)
; N32-NEXT: lw $25, %call16(f2)($gp)
; N32-NEXT: jalr $25
; N32-NEXT: move $4, $16
; N32-NEXT: lw $1, %got_disp(r)($gp)
; N32-NEXT: lw $5, 0($1)
; N32-NEXT: lw $25, %call16(f3)($gp)
; N32-NEXT: jalr $25
; N32-NEXT: move $4, $16
; N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
; N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
; N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
; N32-NEXT: jr $ra
; N32-NEXT: addiu $sp, $sp, 32
;
; O3O32-LABEL: f0:
; O3O32: # %bb.0: # %entry
; O3O32-NEXT: lui $2, %hi(_gp_disp)
; O3O32-NEXT: addiu $2, $2, %lo(_gp_disp)
; O3O32-NEXT: addiu $sp, $sp, -32
; O3O32-NEXT: sw $ra, 28($sp) # 4-byte Folded Spill
; O3O32-NEXT: sw $17, 24($sp) # 4-byte Folded Spill
; O3O32-NEXT: sw $16, 20($sp) # 4-byte Folded Spill
; O3O32-NEXT: addu $16, $2, $25
; O3O32-NEXT: lw $25, %call16(f1)($16)
; O3O32-NEXT: jalr $25
; O3O32-NEXT: move $gp, $16
; O3O32-NEXT: lw $1, %got(p)($16)
; O3O32-NEXT: lw $25, %call16(f2)($16)
; O3O32-NEXT: move $gp, $16
; O3O32-NEXT: jalr $25
; O3O32-NEXT: lw $4, 0($1)
; O3O32-NEXT: lw $1, %got(q)($16)
; O3O32-NEXT: lw $25, %call16(f2)($16)
; O3O32-NEXT: lw $17, 0($1)
; O3O32-NEXT: jalr $25
; O3O32-NEXT: move $4, $17
; O3O32-NEXT: lw $1, %got(r)($16)
; O3O32-NEXT: lw $25, %call16(f3)($16)
; O3O32-NEXT: move $4, $17
; O3O32-NEXT: move $gp, $16
; O3O32-NEXT: jalr $25
; O3O32-NEXT: lw $5, 0($1)
; O3O32-NEXT: lw $16, 20($sp) # 4-byte Folded Reload
; O3O32-NEXT: lw $17, 24($sp) # 4-byte Folded Reload
; O3O32-NEXT: lw $ra, 28($sp) # 4-byte Folded Reload
; O3O32-NEXT: jr $ra
; O3O32-NEXT: addiu $sp, $sp, 32
;
; O3N64-LABEL: f0:
; O3N64: # %bb.0: # %entry
; O3N64-NEXT: daddiu $sp, $sp, -32
; O3N64-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
; O3N64-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
; O3N64-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
; O3N64-NEXT: lui $1, %hi(%neg(%gp_rel(f0)))
; O3N64-NEXT: daddu $1, $1, $25
; O3N64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(f0)))
; O3N64-NEXT: ld $25, %call16(f1)($gp)
; O3N64-NEXT: jalr $25
; O3N64-NEXT: nop
; O3N64-NEXT: ld $1, %got_disp(p)($gp)
; O3N64-NEXT: ld $25, %call16(f2)($gp)
; O3N64-NEXT: jalr $25
; O3N64-NEXT: lw $4, 0($1)
; O3N64-NEXT: ld $1, %got_disp(q)($gp)
; O3N64-NEXT: ld $25, %call16(f2)($gp)
; O3N64-NEXT: lw $16, 0($1)
; O3N64-NEXT: jalr $25
; O3N64-NEXT: move $4, $16
; O3N64-NEXT: ld $1, %got_disp(r)($gp)
; O3N64-NEXT: ld $25, %call16(f3)($gp)
; O3N64-NEXT: move $4, $16
; O3N64-NEXT: jalr $25
; O3N64-NEXT: lw $5, 0($1)
; O3N64-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
; O3N64-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
; O3N64-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
; O3N64-NEXT: jr $ra
; O3N64-NEXT: daddiu $sp, $sp, 32
;
; O3N32-LABEL: f0:
; O3N32: # %bb.0: # %entry
; O3N32-NEXT: addiu $sp, $sp, -32
; O3N32-NEXT: sd $ra, 24($sp) # 8-byte Folded Spill
; O3N32-NEXT: sd $gp, 16($sp) # 8-byte Folded Spill
; O3N32-NEXT: sd $16, 8($sp) # 8-byte Folded Spill
; O3N32-NEXT: lui $1, %hi(%neg(%gp_rel(f0)))
; O3N32-NEXT: addu $1, $1, $25
; O3N32-NEXT: addiu $gp, $1, %lo(%neg(%gp_rel(f0)))
; O3N32-NEXT: lw $25, %call16(f1)($gp)
; O3N32-NEXT: jalr $25
; O3N32-NEXT: nop
; O3N32-NEXT: lw $1, %got_disp(p)($gp)
; O3N32-NEXT: lw $25, %call16(f2)($gp)
; O3N32-NEXT: jalr $25
; O3N32-NEXT: lw $4, 0($1)
; O3N32-NEXT: lw $1, %got_disp(q)($gp)
; O3N32-NEXT: lw $25, %call16(f2)($gp)
; O3N32-NEXT: lw $16, 0($1)
; O3N32-NEXT: jalr $25
; O3N32-NEXT: move $4, $16
; O3N32-NEXT: lw $1, %got_disp(r)($gp)
; O3N32-NEXT: lw $25, %call16(f3)($gp)
; O3N32-NEXT: move $4, $16
; O3N32-NEXT: jalr $25
; O3N32-NEXT: lw $5, 0($1)
; O3N32-NEXT: ld $16, 8($sp) # 8-byte Folded Reload
; O3N32-NEXT: ld $gp, 16($sp) # 8-byte Folded Reload
; O3N32-NEXT: ld $ra, 24($sp) # 8-byte Folded Reload
; O3N32-NEXT: jr $ra
; O3N32-NEXT: addiu $sp, $sp, 32
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. llvm-svn: 130847
2011-05-05 01:54:27 +08:00
entry:
[mips] UnXFAIL gprestore.ll test. Repurpose this previously XFAIL'd test to check that jalr uses $25 as per ABI requirements for PIC code. llvm-svn: 324729
2018-02-09 18:46:16 +08:00
tail call void @f1() nounwind
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp = load i32, i32* @p, align 4
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. llvm-svn: 130847
2011-05-05 01:54:27 +08:00
tail call void @f2(i32 %tmp) nounwind
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp1 = load i32, i32* @q, align 4
[mips] UnXFAIL gprestore.ll test. Repurpose this previously XFAIL'd test to check that jalr uses $25 as per ABI requirements for PIC code. llvm-svn: 324729
2018-02-09 18:46:16 +08:00
tail call void @f2(i32 %tmp1) nounwind
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 llvm-svn: 230794
2015-02-28 05:17:42 +08:00
%tmp2 = load i32, i32* @r, align 4
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. llvm-svn: 130847
2011-05-05 01:54:27 +08:00
tail call void @f3(i32 %tmp1, i32 %tmp2) nounwind
ret void
}
[mips] UnXFAIL gprestore.ll test. Repurpose this previously XFAIL'd test to check that jalr uses $25 as per ABI requirements for PIC code. llvm-svn: 324729
2018-02-09 18:46:16 +08:00
declare void @f1()
Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp. llvm-svn: 130847
2011-05-05 01:54:27 +08:00
declare void @f2(i32)
declare void @f3(i32, i32)