forked from OSchip/llvm-project
76 lines
3.1 KiB
LLVM
76 lines
3.1 KiB
LLVM
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; RUN: llc -O2 -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s
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; Rely on the comments generated by llc. Check that "if.then" was predicated.
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; CHECK: while.body13
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; CHECK: if{{.*}}memd
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; CHECK: while.end
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%struct.1 = type { i32, i32 }
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%struct.2 = type { [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [24 x i32], [3 x i32], [24 x i32], [8 x %struct.1], [5 x i32] }
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@A1 = global i64 zeroinitializer
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@A2 = global i64 zeroinitializer
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@B1 = global i32 zeroinitializer
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@B2 = global i32 zeroinitializer
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@C1 = global i8 zeroinitializer
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declare i32 @llvm.hexagon.S2.cl0(i32) nounwind readnone
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declare i32 @llvm.hexagon.S2.setbit.r(i32, i32) nounwind readnone
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declare i64 @llvm.hexagon.M2.vmpy2s.s0(i32, i32) nounwind readnone
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declare i64 @llvm.hexagon.M2.vmac2s.s0(i64, i32, i32) nounwind readnone
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declare i64 @llvm.hexagon.A2.vaddws(i64, i64) nounwind readnone
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declare i64 @llvm.hexagon.A2.vsubws(i64, i64) nounwind readnone
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declare i32 @llvm.hexagon.A4.modwrapu(i32, i32) nounwind readnone
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define void @foo(i32 %n, i64* %ptr) nounwind {
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entry:
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br label %while.body
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while.body:
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%count = phi i32 [ 0, %entry ], [ %next, %while.end ]
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%idx = phi i32 [ 0, %entry ], [ %15, %while.end ]
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%0 = load i32, i32* @B1, align 4
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%1 = load i32, i32* @B2, align 8
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%2 = and i32 %1, %0
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br label %while.body13
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while.body13: ; preds = %while.body, %if.end
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%3 = phi i64 [ %13, %if.end ], [ 0, %while.body ]
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%4 = phi i64 [ %14, %if.end ], [ 0, %while.body ]
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%m = phi i32 [ %6, %if.end ], [ %2, %while.body ]
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%5 = tail call i32 @llvm.hexagon.S2.cl0(i32 %m)
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%6 = tail call i32 @llvm.hexagon.S2.setbit.r(i32 %m, i32 %5)
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%cgep85 = getelementptr [10 x %struct.2], [10 x %struct.2]* inttoptr (i32 -121502345 to [10 x %struct.2]*), i32 0, i32 %idx
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%cgep90 = getelementptr %struct.2, %struct.2* %cgep85, i32 0, i32 12, i32 %5
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%7 = load i32, i32* %cgep90, align 4
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%8 = tail call i64 @llvm.hexagon.M2.vmpy2s.s0(i32 %7, i32 %7)
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%cgep91 = getelementptr %struct.2, %struct.2* %cgep85, i32 0, i32 13, i32 %5
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%9 = load i32, i32* %cgep91, align 4
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%10 = tail call i64 @llvm.hexagon.M2.vmac2s.s0(i64 %8, i32 %9, i32 %9)
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%11 = load i8, i8* @C1, align 1
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%and24 = and i8 %11, 1
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%cmp = icmp eq i8 %and24, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %while.body13
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%12 = tail call i64 @llvm.hexagon.A2.vaddws(i64 %3, i64 %10)
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store i64 %12, i64* %ptr, align 8
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br label %if.end
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if.end: ; preds = %if.then, %while.body13
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%13 = phi i64 [ %12, %if.then ], [ %3, %while.body13 ]
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%14 = tail call i64 @llvm.hexagon.A2.vsubws(i64 %4, i64 %10)
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%tobool12 = icmp eq i32 %6, 0
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br i1 %tobool12, label %while.end, label %while.body13
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while.end:
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%add40 = add i32 %idx, 1
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%15 = tail call i32 @llvm.hexagon.A4.modwrapu(i32 %add40, i32 10) nounwind
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%next = add i32 %count, 1
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%cc = icmp eq i32 %next, %n
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br i1 %cc, label %end, label %while.body
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end:
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store i64 %10, i64* @A2, align 8
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ret void
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}
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