2012-07-10 02:34:21 +08:00
|
|
|
// REQUIRES: arm-registered-target
|
2013-09-17 02:07:35 +08:00
|
|
|
// RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-feature +neon -target-abi apcs-gnu -emit-llvm -w -o - %s | FileCheck -check-prefix=APCS-GNU %s
|
|
|
|
// RUN: %clang_cc1 -triple armv7-apple-darwin9 -target-feature +neon -target-abi aapcs -emit-llvm -w -o - %s | FileCheck -check-prefix=AAPCS %s
|
2009-09-14 08:56:55 +08:00
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define signext i8 @f0()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc signext i8 @f0()
|
2009-09-14 08:56:55 +08:00
|
|
|
char f0(void) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i8 @f1()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i8 @f1()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s1 { char f0; };
|
|
|
|
struct s1 f1(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i16 @f2()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i16 @f2()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s2 { short f0; };
|
|
|
|
struct s2 f2(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i32 @f3()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f3()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s3 { int f0; };
|
|
|
|
struct s3 f3(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i32 @f4()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f4()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s4 { struct s4_0 { int f0; } f0; };
|
|
|
|
struct s4 f4(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f5(
|
2013-02-01 07:17:12 +08:00
|
|
|
// APCS-GNU: struct.s5* noalias sret
|
2013-08-15 14:47:53 +08:00
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f5()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s5 { struct { } f0; int f1; };
|
|
|
|
struct s5 f5(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f6(
|
2013-02-01 07:17:12 +08:00
|
|
|
// APCS-GNU: struct.s6* noalias sret
|
2013-08-15 14:47:53 +08:00
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f6()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s6 { int f0[1]; };
|
|
|
|
struct s6 f6(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f7()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc void @f7()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s7 { struct { int : 0; } f0; };
|
|
|
|
struct s7 f7(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f8(
|
2013-02-01 07:17:12 +08:00
|
|
|
// APCS-GNU: struct.s8* noalias sret
|
2013-08-15 14:47:53 +08:00
|
|
|
// AAPCS-LABEL: define arm_aapcscc void @f8()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s8 { struct { int : 0; } f0[1]; };
|
|
|
|
struct s8 f8(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i32 @f9()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f9()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s9 { int f0; int : 0; };
|
|
|
|
struct s9 f9(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i32 @f10()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f10()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s10 { int f0; int : 0; int : 0; };
|
|
|
|
struct s10 f10(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f11(
|
2013-02-01 07:17:12 +08:00
|
|
|
// APCS-GNU: struct.s11* noalias sret
|
2013-08-15 14:47:53 +08:00
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f11()
|
2009-09-14 08:56:55 +08:00
|
|
|
struct s11 { int : 0; int f0; };
|
|
|
|
struct s11 f11(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i32 @f12()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f12()
|
2009-09-14 08:56:55 +08:00
|
|
|
union u12 { char f0; short f1; int f2; };
|
|
|
|
union u12 f12(void) {}
|
2009-09-14 10:20:34 +08:00
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f13(
|
2013-02-01 07:17:12 +08:00
|
|
|
// APCS-GNU: struct.s13* noalias sret
|
2009-09-14 10:20:34 +08:00
|
|
|
|
|
|
|
// FIXME: This should return a float.
|
2010-06-17 01:49:52 +08:00
|
|
|
// AAPCS-FIXME: darm_aapcscc efine float @f13()
|
2009-09-14 10:20:34 +08:00
|
|
|
struct s13 { float f0; };
|
|
|
|
struct s13 f13(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f14(
|
2013-02-01 07:17:12 +08:00
|
|
|
// APCS-GNU: union.u14* noalias sret
|
2013-08-15 14:47:53 +08:00
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f14()
|
2009-09-14 10:20:34 +08:00
|
|
|
union u14 { float f0; };
|
|
|
|
union u14 f14(void) {}
|
2009-09-15 05:54:03 +08:00
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f15()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc void @f15()
|
2009-09-15 05:54:03 +08:00
|
|
|
void f15(struct s7 a0) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f16()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc void @f16()
|
2009-09-15 05:54:03 +08:00
|
|
|
void f16(struct s8 a0) {}
|
2010-01-29 11:22:29 +08:00
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i32 @f17()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f17()
|
2010-01-29 11:22:29 +08:00
|
|
|
struct s17 { short f0 : 13; char f1 : 4; };
|
|
|
|
struct s17 f17(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i32 @f18()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f18()
|
2010-01-29 11:22:29 +08:00
|
|
|
struct s18 { short f0; char f1 : 4; };
|
|
|
|
struct s18 f18(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f19(
|
2013-02-01 07:17:12 +08:00
|
|
|
// APCS-GNU: struct.s19* noalias sret
|
2013-08-15 14:47:53 +08:00
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f19()
|
2010-01-29 11:22:29 +08:00
|
|
|
struct s19 { int f0; struct s8 f1; };
|
|
|
|
struct s19 f19(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f20(
|
2013-02-01 07:17:12 +08:00
|
|
|
// APCS-GNU: struct.s20* noalias sret
|
2013-08-15 14:47:53 +08:00
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f20()
|
2010-01-29 11:22:29 +08:00
|
|
|
struct s20 { struct s8 f1; int f0; };
|
|
|
|
struct s20 f20(void) {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i8 @f21()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f21()
|
2010-01-29 11:22:29 +08:00
|
|
|
struct s21 { struct {} f1; int f0 : 4; };
|
|
|
|
struct s21 f21(void) {}
|
2010-02-02 07:31:19 +08:00
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i16 @f22()
|
|
|
|
// APCS-GNU-LABEL: define i32 @f23()
|
|
|
|
// APCS-GNU-LABEL: define i64 @f24()
|
|
|
|
// APCS-GNU-LABEL: define i128 @f25()
|
|
|
|
// APCS-GNU-LABEL: define i64 @f26()
|
|
|
|
// APCS-GNU-LABEL: define i128 @f27()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i16 @f22()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f23()
|
2013-02-01 07:17:12 +08:00
|
|
|
// AAPCS: define arm_aapcscc void @f24({{.*}} noalias sret
|
|
|
|
// AAPCS: define arm_aapcscc void @f25({{.*}} noalias sret
|
|
|
|
// AAPCS: define arm_aapcscc void @f26({{.*}} noalias sret
|
|
|
|
// AAPCS: define arm_aapcscc void @f27({{.*}} noalias sret
|
2010-02-02 07:31:19 +08:00
|
|
|
_Complex char f22(void) {}
|
|
|
|
_Complex short f23(void) {}
|
|
|
|
_Complex int f24(void) {}
|
|
|
|
_Complex long long f25(void) {}
|
|
|
|
_Complex float f26(void) {}
|
|
|
|
_Complex double f27(void) {}
|
2010-02-02 07:31:26 +08:00
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i16 @f28()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i16 @f28()
|
2010-02-02 07:31:26 +08:00
|
|
|
struct s28 { _Complex char f0; };
|
|
|
|
struct s28 f28() {}
|
|
|
|
|
2013-08-15 14:47:53 +08:00
|
|
|
// APCS-GNU-LABEL: define i32 @f29()
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc i32 @f29()
|
2010-02-02 07:31:26 +08:00
|
|
|
struct s29 { _Complex short f0; };
|
|
|
|
struct s29 f29() {}
|
|
|
|
|
2013-02-01 07:17:12 +08:00
|
|
|
// APCS-GNU: define void @f30({{.*}} noalias sret
|
|
|
|
// AAPCS: define arm_aapcscc void @f30({{.*}} noalias sret
|
2010-02-02 07:31:26 +08:00
|
|
|
struct s30 { _Complex int f0; };
|
|
|
|
struct s30 f30() {}
|
2012-02-10 17:30:15 +08:00
|
|
|
|
|
|
|
// PR11905
|
|
|
|
struct s31 { char x; };
|
|
|
|
void f31(struct s31 s) { }
|
|
|
|
// AAPCS: @f31([1 x i32] %s.coerce)
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// AAPCS: %s = alloca %struct.s31, align 1
|
|
|
|
// AAPCS: [[TEMP:%.*]] = alloca [1 x i32], align 4
|
|
|
|
// AAPCS: store [1 x i32] %s.coerce, [1 x i32]* [[TEMP]], align 4
|
2012-02-10 17:30:15 +08:00
|
|
|
// APCS-GNU: @f31([1 x i32] %s.coerce)
|
Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment. Introduce APIs on CGBuilderTy to work with Address
values. Change core APIs on CGF/CGM to traffic in Address where
appropriate. Require alignments to be non-zero. Update a ton
of code to compute and propagate alignment information.
As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.
The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned. Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay. I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.
Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.
We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment. In particular,
field access now uses alignmentAtOffset instead of min.
Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs. For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint. That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.
ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments. In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments. That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.
I partially punted on applying this work to CGBuiltin. Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.
llvm-svn: 246985
2015-09-08 16:05:57 +08:00
|
|
|
// APCS-GNU: %s = alloca %struct.s31, align 1
|
|
|
|
// APCS-GNU: [[TEMP:%.*]] = alloca [1 x i32], align 4
|
|
|
|
// APCS-GNU: store [1 x i32] %s.coerce, [1 x i32]* [[TEMP]], align 4
|
2012-08-09 08:31:40 +08:00
|
|
|
|
|
|
|
// PR13562
|
|
|
|
struct s32 { double x; };
|
|
|
|
void f32(struct s32 s) { }
|
|
|
|
// AAPCS: @f32([1 x i64] %s.coerce)
|
|
|
|
// APCS-GNU: @f32([2 x i32] %s.coerce)
|
2012-08-11 04:42:31 +08:00
|
|
|
|
|
|
|
// PR13350
|
|
|
|
struct s33 { char buf[32*32]; };
|
|
|
|
void f33(struct s33 s) { }
|
2015-03-10 05:40:42 +08:00
|
|
|
// APCS-GNU-LABEL: define void @f33(%struct.s33* byval align 4 %s)
|
|
|
|
// AAPCS-LABEL: define arm_aapcscc void @f33(%struct.s33* byval align 4 %s)
|
2012-10-10 19:29:08 +08:00
|
|
|
|
|
|
|
// PR14048
|
|
|
|
struct s34 { char c; };
|
|
|
|
void f34(struct s34 s);
|
|
|
|
void g34(struct s34 *s) { f34(*s); }
|
|
|
|
// AAPCS: @g34(%struct.s34* %s)
|
2014-11-08 06:30:50 +08:00
|
|
|
// AAPCS: %[[a:.*]] = alloca [1 x i32]
|
2015-02-28 05:19:58 +08:00
|
|
|
// AAPCS: load [1 x i32], [1 x i32]* %[[a]]
|
2012-11-06 12:58:01 +08:00
|
|
|
|
|
|
|
// rdar://12596507
|
|
|
|
struct s35
|
|
|
|
{
|
|
|
|
float v[18]; //make sure byval is on.
|
|
|
|
} __attribute__((aligned(16)));
|
|
|
|
typedef struct s35 s35_with_align;
|
|
|
|
|
|
|
|
typedef __attribute__((neon_vector_type(4))) float float32x4_t;
|
|
|
|
static __attribute__((__always_inline__, __nodebug__)) float32x4_t vaddq_f32(
|
|
|
|
float32x4_t __a, float32x4_t __b) {
|
|
|
|
return __a + __b;
|
|
|
|
}
|
|
|
|
float32x4_t f35(int i, s35_with_align s1, s35_with_align s2) {
|
|
|
|
float32x4_t v = vaddq_f32(*(float32x4_t *)&s1,
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*(float32x4_t *)&s2);
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return v;
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}
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2015-03-10 05:40:42 +08:00
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// APCS-GNU-LABEL: define <4 x float> @f35(i32 %i, %struct.s35* byval align 4, %struct.s35* byval align 4)
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2012-11-06 12:58:01 +08:00
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// APCS-GNU: %[[a:.*]] = alloca %struct.s35, align 16
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// APCS-GNU: %[[b:.*]] = bitcast %struct.s35* %[[a]] to i8*
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// APCS-GNU: %[[c:.*]] = bitcast %struct.s35* %0 to i8*
|
Change memcpy/memove/memset to have dest and source alignment attributes (Step 1).
Summary:
Upstream LLVM is changing the the prototypes of the @llvm.memcpy/memmove/memset
intrinsics. This change updates the Clang tests for this change.
The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument
which is required to be a constant integer. It represents the alignment of the
dest (and source), and so must be the minimum of the actual alignment of the
two.
This change removes the alignment argument in favour of placing the alignment
attribute on the source and destination pointers of the memory intrinsic call.
For example, code which used to read:
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false)
will now read
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false)
At this time the source and destination alignments must be the same (Step 1).
Step 2 of the change, to be landed shortly, will relax that contraint and allow
the source and destination to have different alignments.
llvm-svn: 322964
2018-01-20 01:12:54 +08:00
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// APCS-GNU: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align {{[0-9]+}} %[[b]], i8* align {{[0-9]+}} %[[c]]
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2012-11-06 12:58:01 +08:00
|
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// APCS-GNU: %[[d:.*]] = bitcast %struct.s35* %[[a]] to <4 x float>*
|
2015-02-28 05:19:58 +08:00
|
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// APCS-GNU: load <4 x float>, <4 x float>* %[[d]], align 16
|
2015-03-10 05:40:42 +08:00
|
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// AAPCS-LABEL: define arm_aapcscc <4 x float> @f35(i32 %i, %struct.s35* byval align 8, %struct.s35* byval align 8)
|
2012-11-06 12:58:01 +08:00
|
|
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// AAPCS: %[[a:.*]] = alloca %struct.s35, align 16
|
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|
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// AAPCS: %[[b:.*]] = bitcast %struct.s35* %[[a]] to i8*
|
|
|
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// AAPCS: %[[c:.*]] = bitcast %struct.s35* %0 to i8*
|
Change memcpy/memove/memset to have dest and source alignment attributes.
Summary:
This change is step three in the series of changes to remove alignment argument from
memcpy/memmove/memset in favour of alignment attributes. Steps:
Step 1) Remove alignment parameter and create alignment parameter attributes for
memcpy/memmove/memset. ( rL322965, rC322964, rL322963 )
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
source and dest alignments. ( rL323597 )
Step 3) Update Clang to use the new IRBuilder API.
Step 4) Update Polly to use the new IRBuilder API.
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
and those that use use MemIntrinsicInst::[get|set]Alignment() to use getDestAlignment()
and getSourceAlignment() instead.
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
MemIntrinsicInst::[get|set]Alignment() methods.
Reference
http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html
Reviewers: rjmccall
Subscribers: jyknight, nemanjai, nhaehnle, javed.absar, sbc100, aheejin, kbarton, fedor.sergeev, cfe-commits
Differential Revision: https://reviews.llvm.org/D41677
llvm-svn: 323617
2018-01-29 01:27:45 +08:00
|
|
|
// AAPCS: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 16 %[[b]], i8* align 8 %[[c]]
|
2012-11-06 12:58:01 +08:00
|
|
|
// AAPCS: %[[d:.*]] = bitcast %struct.s35* %[[a]] to <4 x float>*
|
2015-02-28 05:19:58 +08:00
|
|
|
// AAPCS: load <4 x float>, <4 x float>* %[[d]], align 16
|