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llvm-project/llvm/test/CodeGen/ARM/atomic-cmpxchg.ll

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Replace the result usages while legalizing cmpxchg. We should update the usages to all of the results; otherwise, we might get assertion failure or SEGV during the type legalization of ATOMIC_CMP_SWAP_WITH_SUCCESS with two or more illegal types. For example, in the following sequence, both i8 and i1 might be illegal in some target, e.g. armv5, mipsel, mips64el, %0 = cmpxchg i8* %ptr, i8 %desire, i8 %new monotonic monotonic %1 = extractvalue { i8, i1 } %0, 1 Since both i8 and i1 should be legalized, the corresponding ATOMIC_CMP_SWAP_WITH_SUCCESS dag will be checked/replaced/updated twice. If we don't update the usage to *ALL* of the results in the first round, the DAG for extractvalue might be processed earlier. The GetPromotedInteger() will result in assertion failure, because its operand (i.e. the success bit of cmpxchg) is not promoted beforehand. llvm-svn: 213569
2014-07-22 01:33:44 +08:00
; RUN: llc < %s -mtriple=arm-linux-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-ARM
; RUN: llc < %s -mtriple=thumb-linux-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-THUMB
; RUN: llc < %s -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-ARMV7
; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-THUMBV7
define zeroext i1 @test_cmpxchg_res_i8(i8* %addr, i8 %desired, i8 zeroext %new) {
entry:
%0 = cmpxchg i8* %addr, i8 %desired, i8 %new monotonic monotonic
%1 = extractvalue { i8, i1 } %0, 1
ret i1 %1
}
; CHECK-ARM-LABEL: test_cmpxchg_res_i8
; CHECK-ARM: bl __sync_val_compare_and_swap_1
; CHECK-ARM: mov [[REG:r[0-9]+]], #0
; CHECK-ARM: cmp r0, {{r[0-9]+}}
; CHECK-ARM: moveq [[REG]], #1
; CHECK-ARM: mov r0, [[REG]]
; CHECK-THUMB-LABEL: test_cmpxchg_res_i8
; CHECK-THUMB: bl __sync_val_compare_and_swap_1
; CHECK-THUMB: mov [[R1:r[0-9]+]], r0
; CHECK-THUMB: movs r0, #1
; CHECK-THUMB: movs [[R2:r[0-9]+]], #0
; CHECK-THUMB: cmp [[R1]], {{r[0-9]+}}
; CHECK-THU<B: beq
; CHECK-THUMB: mov r0, [[R2]]
; CHECK-ARMV7-LABEL: test_cmpxchg_res_i8
; CHECK-ARMV7: ldrexb [[R3:r[0-9]+]], [r0]
; CHECK-ARMV7: mov [[R1:r[0-9]+]], #0
; CHECK-ARMV7: cmp [[R3]], {{r[0-9]+}}
; CHECK-ARMV7: bne
; CHECK-ARMV7: strexb [[R3]], {{r[0-9]+}}, [{{r[0-9]+}}]
; CHECK-ARMV7: mov [[R1]], #1
; CHECK-ARMV7: cmp [[R3]], #0
; CHECK-ARMV7: bne
; CHECK-ARMV7: mov r0, [[R1]]
; CHECK-THUMBV7-LABEL: test_cmpxchg_res_i8
; CHECK-THUMBV7: ldrexb [[R3:r[0-9]+]], [r0]
; CHECK-THUMBV7: cmp [[R3]], {{r[0-9]+}}
; CHECK-THUMBV7: movne r0, #0
; CHECK-THUMBV7: bxne lr
; CHECK-THUMBV7: strexb [[R3]], {{r[0-9]+}}, [{{r[0-9]+}}]
; CHECK-THUMBV7: cmp [[R3]], #0
; CHECK-THUMBV7: itt eq
; CHECK-THUMBV7: moveq r0, #1
; CHECK-THUMBV7: bxeq lr