2017-10-19 07:18:12 +08:00
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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AMDGPU/GlobalISel: Mark 32-bit G_SELECT as legal
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D33949
llvm-svn: 304910
2017-06-07 21:54:51 +08:00
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# RUN: llc -O0 -march=amdgcn -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s
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--- |
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define void @test_select() { ret void }
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...
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---
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name: test_select
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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body: |
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bb.0:
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liveins: %vgpr0
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2017-10-19 07:18:12 +08:00
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; CHECK-LABEL: name: test_select
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; CHECK: [[C:%[0-9]+]](s32) = G_CONSTANT i32 0
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; CHECK: [[COPY:%[0-9]+]](s32) = COPY %vgpr0
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; CHECK: [[ICMP:%[0-9]+]](s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
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; CHECK: [[C1:%[0-9]+]](s32) = G_CONSTANT i32 1
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; CHECK: [[C2:%[0-9]+]](s32) = G_CONSTANT i32 2
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; CHECK: [[SELECT:%[0-9]+]](s32) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
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AMDGPU/GlobalISel: Mark 32-bit G_SELECT as legal
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D33949
llvm-svn: 304910
2017-06-07 21:54:51 +08:00
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%0(s32) = G_CONSTANT i32 0
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%1(s32) = COPY %vgpr0
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%2(s1) = G_ICMP intpred(ne), %0, %1
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%3(s32) = G_CONSTANT i32 1
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%4(s32) = G_CONSTANT i32 2
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%5(s32) = G_SELECT %2, %3, %4
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...
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