2006-05-15 06:18:28 +08:00
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//===-- ARM.h - Top-level interface for ARM representation---- --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the "Instituto Nokia de Tecnologia" and
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// is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// ARM back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_ARM_H
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#define TARGET_ARM_H
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#include <iosfwd>
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#include <cassert>
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namespace llvm {
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2006-08-25 00:13:15 +08:00
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// Enums corresponding to ARM condition codes
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namespace ARMCC {
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enum CondCodes {
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2006-08-25 01:19:08 +08:00
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NE,
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EQ
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2006-08-25 00:13:15 +08:00
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};
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}
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static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
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switch (CC) {
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default: assert(0 && "Unknown condition code");
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case ARMCC::NE: return "ne";
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2006-08-25 01:19:08 +08:00
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case ARMCC::EQ: return "eq";
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2006-08-25 00:13:15 +08:00
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}
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}
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2006-05-15 06:18:28 +08:00
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class FunctionPass;
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class TargetMachine;
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FunctionPass *createARMISelDag(TargetMachine &TM);
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FunctionPass *createARMCodePrinterPass(std::ostream &OS, TargetMachine &TM);
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} // end namespace llvm;
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// Defines symbolic names for ARM registers. This defines a mapping from
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// register name to register number.
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//
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#include "ARMGenRegisterNames.inc"
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// Defines symbolic names for the ARM instructions.
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//
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#include "ARMGenInstrNames.inc"
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#endif
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