2010-01-05 15:44:46 +08:00
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//===- InstCombineShifts.cpp ----------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the visitShl, visitLShr, and visitAShr functions.
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//
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//===----------------------------------------------------------------------===//
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#include "InstCombine.h"
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2010-01-24 02:49:30 +08:00
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#include "llvm/IntrinsicInst.h"
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2011-07-21 05:57:23 +08:00
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#include "llvm/Analysis/ConstantFolding.h"
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2011-01-14 08:37:45 +08:00
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#include "llvm/Analysis/InstructionSimplify.h"
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2010-01-05 15:44:46 +08:00
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#include "llvm/Support/PatternMatch.h"
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using namespace llvm;
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using namespace PatternMatch;
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Instruction *InstCombiner::commonShiftTransforms(BinaryOperator &I) {
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assert(I.getOperand(1)->getType() == I.getOperand(0)->getType());
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Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
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// See if we can fold away this shift.
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if (SimplifyDemandedInstructionBits(I))
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return &I;
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// Try to fold constant and into select arguments.
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if (isa<Constant>(Op0))
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if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
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if (Instruction *R = FoldOpIntoSelect(I, SI))
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return R;
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if (ConstantInt *CUI = dyn_cast<ConstantInt>(Op1))
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if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
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return Res;
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2010-11-24 02:52:42 +08:00
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2010-11-24 04:33:57 +08:00
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// X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
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2011-02-10 13:36:31 +08:00
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// Because shifts by negative values (which could occur if A were negative)
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// are undefined.
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Value *A; const APInt *B;
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if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
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// FIXME: Should this get moved into SimplifyDemandedBits by saying we don't
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// demand the sign bit (and many others) here??
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Value *Rem = Builder->CreateAnd(A, ConstantInt::get(I.getType(), *B-1),
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Op1->getName());
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I.setOperand(1, Rem);
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return &I;
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}
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2010-01-05 15:44:46 +08:00
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return 0;
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}
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2010-08-28 06:24:38 +08:00
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/// CanEvaluateShifted - See if we can compute the specified value, but shifted
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/// logically to the left or right by some number of bits. This should return
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/// true if the expression can be computed for the same cost as the current
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/// expression tree. This is used to eliminate extraneous shifting from things
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/// like:
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/// %C = shl i128 %A, 64
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/// %D = shl i128 %B, 96
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/// %E = or i128 %C, %D
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/// %F = lshr i128 %E, 64
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/// where the client will ask if E can be computed shifted right by 64-bits. If
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/// this succeeds, the GetShiftedValue function will be called to produce the
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/// value.
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static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool isLeftShift,
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InstCombiner &IC) {
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// We can always evaluate constants shifted.
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if (isa<Constant>(V))
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return true;
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Instruction *I = dyn_cast<Instruction>(V);
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if (!I) return false;
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// If this is the opposite shift, we can directly reuse the input of the shift
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// if the needed bits are already zero in the input. This allows us to reuse
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// the value which means that we don't care if the shift has multiple uses.
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// TODO: Handle opposite shift by exact value.
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2011-01-24 01:05:06 +08:00
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ConstantInt *CI = 0;
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2010-08-28 06:24:38 +08:00
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if ((isLeftShift && match(I, m_LShr(m_Value(), m_ConstantInt(CI)))) ||
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(!isLeftShift && match(I, m_Shl(m_Value(), m_ConstantInt(CI))))) {
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if (CI->getZExtValue() == NumBits) {
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// TODO: Check that the input bits are already zero with MaskedValueIsZero
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#if 0
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// If this is a truncate of a logical shr, we can truncate it to a smaller
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// lshr iff we know that the bits we would otherwise be shifting in are
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// already zeros.
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uint32_t OrigBitWidth = OrigTy->getScalarSizeInBits();
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uint32_t BitWidth = Ty->getScalarSizeInBits();
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if (MaskedValueIsZero(I->getOperand(0),
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APInt::getHighBitsSet(OrigBitWidth, OrigBitWidth-BitWidth)) &&
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CI->getLimitedValue(BitWidth) < BitWidth) {
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return CanEvaluateTruncated(I->getOperand(0), Ty);
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}
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#endif
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}
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}
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// We can't mutate something that has multiple uses: doing so would
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// require duplicating the instruction in general, which isn't profitable.
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if (!I->hasOneUse()) return false;
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switch (I->getOpcode()) {
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default: return false;
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor:
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// Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
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return CanEvaluateShifted(I->getOperand(0), NumBits, isLeftShift, IC) &&
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CanEvaluateShifted(I->getOperand(1), NumBits, isLeftShift, IC);
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2010-08-28 06:53:44 +08:00
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case Instruction::Shl: {
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2010-08-28 06:24:38 +08:00
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// We can often fold the shift into shifts-by-a-constant.
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CI = dyn_cast<ConstantInt>(I->getOperand(1));
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if (CI == 0) return false;
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// We can always fold shl(c1)+shl(c2) -> shl(c1+c2).
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if (isLeftShift) return true;
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// We can always turn shl(c)+shr(c) -> and(c2).
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if (CI->getValue() == NumBits) return true;
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2010-08-28 06:53:44 +08:00
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unsigned TypeWidth = I->getType()->getScalarSizeInBits();
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// We can turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but it isn't
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2010-08-28 06:24:38 +08:00
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// profitable unless we know the and'd out bits are already zero.
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2010-08-28 06:53:44 +08:00
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if (CI->getZExtValue() > NumBits) {
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2010-11-10 09:30:56 +08:00
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unsigned LowBits = TypeWidth - CI->getZExtValue();
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2010-08-28 06:53:44 +08:00
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if (MaskedValueIsZero(I->getOperand(0),
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2010-11-10 09:30:56 +08:00
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APInt::getLowBitsSet(TypeWidth, NumBits) << LowBits))
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2010-08-28 06:53:44 +08:00
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return true;
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}
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2010-08-28 06:24:38 +08:00
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return false;
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2010-08-28 06:53:44 +08:00
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}
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case Instruction::LShr: {
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2010-08-28 06:24:38 +08:00
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// We can often fold the shift into shifts-by-a-constant.
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CI = dyn_cast<ConstantInt>(I->getOperand(1));
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if (CI == 0) return false;
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// We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2).
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if (!isLeftShift) return true;
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// We can always turn lshr(c)+shl(c) -> and(c2).
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if (CI->getValue() == NumBits) return true;
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2010-08-28 06:53:44 +08:00
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unsigned TypeWidth = I->getType()->getScalarSizeInBits();
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2010-08-28 06:24:38 +08:00
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// We can always turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but it isn't
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// profitable unless we know the and'd out bits are already zero.
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2012-05-28 06:03:32 +08:00
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if (CI->getValue().ult(TypeWidth) && CI->getZExtValue() > NumBits) {
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2010-12-24 07:56:24 +08:00
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unsigned LowBits = CI->getZExtValue() - NumBits;
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2010-08-28 06:53:44 +08:00
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if (MaskedValueIsZero(I->getOperand(0),
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2010-12-24 07:56:24 +08:00
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APInt::getLowBitsSet(TypeWidth, NumBits) << LowBits))
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2010-08-28 06:53:44 +08:00
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return true;
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}
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2010-08-28 06:24:38 +08:00
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2010-08-28 06:53:44 +08:00
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return false;
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}
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2010-08-28 06:24:38 +08:00
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case Instruction::Select: {
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SelectInst *SI = cast<SelectInst>(I);
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return CanEvaluateShifted(SI->getTrueValue(), NumBits, isLeftShift, IC) &&
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CanEvaluateShifted(SI->getFalseValue(), NumBits, isLeftShift, IC);
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}
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case Instruction::PHI: {
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// We can change a phi if we can change all operands. Note that we never
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// get into trouble with cyclic PHIs here because we only consider
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// instructions with a single use.
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PHINode *PN = cast<PHINode>(I);
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for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
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if (!CanEvaluateShifted(PN->getIncomingValue(i), NumBits, isLeftShift,IC))
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return false;
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return true;
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}
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}
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}
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/// GetShiftedValue - When CanEvaluateShifted returned true for an expression,
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/// this value inserts the new computation that produces the shifted value.
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static Value *GetShiftedValue(Value *V, unsigned NumBits, bool isLeftShift,
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InstCombiner &IC) {
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// We can always evaluate constants shifted.
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if (Constant *C = dyn_cast<Constant>(V)) {
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if (isLeftShift)
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V = IC.Builder->CreateShl(C, NumBits);
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else
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V = IC.Builder->CreateLShr(C, NumBits);
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// If we got a constantexpr back, try to simplify it with TD info.
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if (ConstantExpr *CE = dyn_cast<ConstantExpr>(V))
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2011-12-02 09:26:24 +08:00
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V = ConstantFoldConstantExpression(CE, IC.getTargetData(),
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IC.getTargetLibraryInfo());
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2010-08-28 06:24:38 +08:00
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return V;
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}
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Instruction *I = cast<Instruction>(V);
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IC.Worklist.Add(I);
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switch (I->getOpcode()) {
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2012-02-07 13:05:23 +08:00
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default: llvm_unreachable("Inconsistency with CanEvaluateShifted");
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2010-08-28 06:24:38 +08:00
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Xor:
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// Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
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I->setOperand(0, GetShiftedValue(I->getOperand(0), NumBits,isLeftShift,IC));
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I->setOperand(1, GetShiftedValue(I->getOperand(1), NumBits,isLeftShift,IC));
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return I;
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case Instruction::Shl: {
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2011-07-29 08:18:19 +08:00
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BinaryOperator *BO = cast<BinaryOperator>(I);
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unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
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2010-08-28 06:24:38 +08:00
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// We only accept shifts-by-a-constant in CanEvaluateShifted.
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2011-07-29 08:18:19 +08:00
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ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
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2010-08-28 06:24:38 +08:00
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// We can always fold shl(c1)+shl(c2) -> shl(c1+c2).
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if (isLeftShift) {
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// If this is oversized composite shift, then unsigned shifts get 0.
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unsigned NewShAmt = NumBits+CI->getZExtValue();
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if (NewShAmt >= TypeWidth)
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return Constant::getNullValue(I->getType());
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2011-07-29 08:18:19 +08:00
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BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
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BO->setHasNoUnsignedWrap(false);
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BO->setHasNoSignedWrap(false);
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2010-08-28 06:24:38 +08:00
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return I;
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}
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// We turn shl(c)+lshr(c) -> and(c2) if the input doesn't already have
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// zeros.
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2010-08-28 06:53:44 +08:00
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if (CI->getValue() == NumBits) {
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APInt Mask(APInt::getLowBitsSet(TypeWidth, TypeWidth - NumBits));
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2011-07-29 08:18:19 +08:00
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V = IC.Builder->CreateAnd(BO->getOperand(0),
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ConstantInt::get(BO->getContext(), Mask));
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2010-08-28 06:53:44 +08:00
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if (Instruction *VI = dyn_cast<Instruction>(V)) {
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2011-07-29 08:18:19 +08:00
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VI->moveBefore(BO);
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VI->takeName(BO);
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2010-08-28 06:53:44 +08:00
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}
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return V;
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2010-08-28 06:24:38 +08:00
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}
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2010-08-28 06:53:44 +08:00
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// We turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but only when we know that
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// the and won't be needed.
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assert(CI->getZExtValue() > NumBits);
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2011-07-29 08:18:19 +08:00
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BO->setOperand(1, ConstantInt::get(BO->getType(),
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CI->getZExtValue() - NumBits));
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BO->setHasNoUnsignedWrap(false);
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BO->setHasNoSignedWrap(false);
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return BO;
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2010-08-28 06:24:38 +08:00
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}
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case Instruction::LShr: {
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2011-07-29 08:18:19 +08:00
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BinaryOperator *BO = cast<BinaryOperator>(I);
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unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
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2010-08-28 06:24:38 +08:00
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// We only accept shifts-by-a-constant in CanEvaluateShifted.
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2011-07-29 08:18:19 +08:00
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ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
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2010-08-28 06:24:38 +08:00
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// We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2).
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if (!isLeftShift) {
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// If this is oversized composite shift, then unsigned shifts get 0.
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unsigned NewShAmt = NumBits+CI->getZExtValue();
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if (NewShAmt >= TypeWidth)
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2011-07-29 08:18:19 +08:00
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return Constant::getNullValue(BO->getType());
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2010-08-28 06:24:38 +08:00
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2011-07-29 08:18:19 +08:00
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BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
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BO->setIsExact(false);
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2010-08-28 06:24:38 +08:00
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return I;
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}
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// We turn lshr(c)+shl(c) -> and(c2) if the input doesn't already have
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// zeros.
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2010-08-28 06:53:44 +08:00
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if (CI->getValue() == NumBits) {
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APInt Mask(APInt::getHighBitsSet(TypeWidth, TypeWidth - NumBits));
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V = IC.Builder->CreateAnd(I->getOperand(0),
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2011-07-29 08:18:19 +08:00
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ConstantInt::get(BO->getContext(), Mask));
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2010-08-28 06:53:44 +08:00
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if (Instruction *VI = dyn_cast<Instruction>(V)) {
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VI->moveBefore(I);
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VI->takeName(I);
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}
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return V;
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2010-08-28 06:24:38 +08:00
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}
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2010-08-28 06:53:44 +08:00
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// We turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but only when we know that
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// the and won't be needed.
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assert(CI->getZExtValue() > NumBits);
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2011-07-29 08:18:19 +08:00
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BO->setOperand(1, ConstantInt::get(BO->getType(),
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CI->getZExtValue() - NumBits));
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BO->setIsExact(false);
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return BO;
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2010-08-28 06:24:38 +08:00
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}
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case Instruction::Select:
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I->setOperand(1, GetShiftedValue(I->getOperand(1), NumBits,isLeftShift,IC));
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|
I->setOperand(2, GetShiftedValue(I->getOperand(2), NumBits,isLeftShift,IC));
|
|
|
|
return I;
|
|
|
|
case Instruction::PHI: {
|
|
|
|
// We can change a phi if we can change all operands. Note that we never
|
|
|
|
// get into trouble with cyclic PHIs here because we only consider
|
|
|
|
// instructions with a single use.
|
|
|
|
PHINode *PN = cast<PHINode>(I);
|
|
|
|
for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
|
|
|
|
PN->setIncomingValue(i, GetShiftedValue(PN->getIncomingValue(i),
|
|
|
|
NumBits, isLeftShift, IC));
|
|
|
|
return PN;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
2010-01-05 15:44:46 +08:00
|
|
|
Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, ConstantInt *Op1,
|
|
|
|
BinaryOperator &I) {
|
|
|
|
bool isLeftShift = I.getOpcode() == Instruction::Shl;
|
2010-08-28 05:04:34 +08:00
|
|
|
|
2010-08-28 06:24:38 +08:00
|
|
|
|
|
|
|
// See if we can propagate this shift into the input, this covers the trivial
|
|
|
|
// cast of lshr(shl(x,c1),c2) as well as other more complex cases.
|
|
|
|
if (I.getOpcode() != Instruction::AShr &&
|
|
|
|
CanEvaluateShifted(Op0, Op1->getZExtValue(), isLeftShift, *this)) {
|
optimize bitcasts from large integers to vector into vector
element insertion from the pieces that feed into the vector.
This handles a pattern that occurs frequently due to code
generated for the x86-64 abi. We now compile something like
this:
struct S { float A, B, C, D; };
struct S g;
struct S bar() {
struct S A = g;
++A.A;
++A.C;
return A;
}
into all nice vector operations:
_bar: ## @bar
## BB#0: ## %entry
movq _g@GOTPCREL(%rip), %rax
movss LCPI1_0(%rip), %xmm1
movss (%rax), %xmm0
addss %xmm1, %xmm0
pshufd $16, %xmm0, %xmm0
movss 4(%rax), %xmm2
movss 12(%rax), %xmm3
pshufd $16, %xmm2, %xmm2
unpcklps %xmm2, %xmm0
addss 8(%rax), %xmm1
pshufd $16, %xmm1, %xmm1
pshufd $16, %xmm3, %xmm2
unpcklps %xmm2, %xmm1
ret
instead of icky integer operations:
_bar: ## @bar
movq _g@GOTPCREL(%rip), %rax
movss LCPI1_0(%rip), %xmm1
movss (%rax), %xmm0
addss %xmm1, %xmm0
movd %xmm0, %ecx
movl 4(%rax), %edx
movl 12(%rax), %esi
shlq $32, %rdx
addq %rcx, %rdx
movd %rdx, %xmm0
addss 8(%rax), %xmm1
movd %xmm1, %eax
shlq $32, %rsi
addq %rax, %rsi
movd %rsi, %xmm1
ret
This resolves rdar://8360454
llvm-svn: 112343
2010-08-28 09:20:38 +08:00
|
|
|
DEBUG(dbgs() << "ICE: GetShiftedValue propagating shift through expression"
|
|
|
|
" to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n");
|
2010-08-28 06:24:38 +08:00
|
|
|
|
|
|
|
return ReplaceInstUsesWith(I,
|
|
|
|
GetShiftedValue(Op0, Op1->getZExtValue(), isLeftShift, *this));
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2010-01-05 15:44:46 +08:00
|
|
|
// See if we can simplify any instructions used by the instruction whose sole
|
|
|
|
// purpose is to compute bits we don't care about.
|
|
|
|
uint32_t TypeBits = Op0->getType()->getScalarSizeInBits();
|
|
|
|
|
|
|
|
// shl i32 X, 32 = 0 and srl i8 Y, 9 = 0, ... just don't eliminate
|
|
|
|
// a signed shift.
|
|
|
|
//
|
|
|
|
if (Op1->uge(TypeBits)) {
|
|
|
|
if (I.getOpcode() != Instruction::AShr)
|
|
|
|
return ReplaceInstUsesWith(I, Constant::getNullValue(Op0->getType()));
|
2010-01-24 02:49:30 +08:00
|
|
|
// ashr i32 X, 32 --> ashr i32 X, 31
|
|
|
|
I.setOperand(1, ConstantInt::get(I.getType(), TypeBits-1));
|
|
|
|
return &I;
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// ((X*C1) << C2) == (X * (C1 << C2))
|
|
|
|
if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0))
|
|
|
|
if (BO->getOpcode() == Instruction::Mul && isLeftShift)
|
|
|
|
if (Constant *BOOp = dyn_cast<Constant>(BO->getOperand(1)))
|
|
|
|
return BinaryOperator::CreateMul(BO->getOperand(0),
|
|
|
|
ConstantExpr::getShl(BOOp, Op1));
|
|
|
|
|
|
|
|
// Try to fold constant and into select arguments.
|
|
|
|
if (SelectInst *SI = dyn_cast<SelectInst>(Op0))
|
|
|
|
if (Instruction *R = FoldOpIntoSelect(I, SI))
|
|
|
|
return R;
|
|
|
|
if (isa<PHINode>(Op0))
|
|
|
|
if (Instruction *NV = FoldOpIntoPhi(I))
|
|
|
|
return NV;
|
|
|
|
|
|
|
|
// Fold shift2(trunc(shift1(x,c1)), c2) -> trunc(shift2(shift1(x,c1),c2))
|
|
|
|
if (TruncInst *TI = dyn_cast<TruncInst>(Op0)) {
|
|
|
|
Instruction *TrOp = dyn_cast<Instruction>(TI->getOperand(0));
|
|
|
|
// If 'shift2' is an ashr, we would have to get the sign bit into a funny
|
|
|
|
// place. Don't try to do this transformation in this case. Also, we
|
|
|
|
// require that the input operand is a shift-by-constant so that we have
|
|
|
|
// confidence that the shifts will get folded together. We could do this
|
|
|
|
// xform in more cases, but it is unlikely to be profitable.
|
|
|
|
if (TrOp && I.isLogicalShift() && TrOp->isShift() &&
|
|
|
|
isa<ConstantInt>(TrOp->getOperand(1))) {
|
|
|
|
// Okay, we'll do this xform. Make the shift of shift.
|
|
|
|
Constant *ShAmt = ConstantExpr::getZExt(Op1, TrOp->getType());
|
|
|
|
// (shift2 (shift1 & 0x00FF), c2)
|
|
|
|
Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName());
|
|
|
|
|
|
|
|
// For logical shifts, the truncation has the effect of making the high
|
|
|
|
// part of the register be zeros. Emulate this by inserting an AND to
|
|
|
|
// clear the top bits as needed. This 'and' will usually be zapped by
|
|
|
|
// other xforms later if dead.
|
|
|
|
unsigned SrcSize = TrOp->getType()->getScalarSizeInBits();
|
|
|
|
unsigned DstSize = TI->getType()->getScalarSizeInBits();
|
|
|
|
APInt MaskV(APInt::getLowBitsSet(SrcSize, DstSize));
|
|
|
|
|
|
|
|
// The mask we constructed says what the trunc would do if occurring
|
|
|
|
// between the shifts. We want to know the effect *after* the second
|
|
|
|
// shift. We know that it is a logical shift by a constant, so adjust the
|
|
|
|
// mask as appropriate.
|
|
|
|
if (I.getOpcode() == Instruction::Shl)
|
|
|
|
MaskV <<= Op1->getZExtValue();
|
|
|
|
else {
|
|
|
|
assert(I.getOpcode() == Instruction::LShr && "Unknown logical shift");
|
|
|
|
MaskV = MaskV.lshr(Op1->getZExtValue());
|
|
|
|
}
|
|
|
|
|
|
|
|
// shift1 & 0x00FF
|
|
|
|
Value *And = Builder->CreateAnd(NSh,
|
|
|
|
ConstantInt::get(I.getContext(), MaskV),
|
|
|
|
TI->getName());
|
|
|
|
|
|
|
|
// Return the value truncated to the interesting size.
|
|
|
|
return new TruncInst(And, I.getType());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Op0->hasOneUse()) {
|
|
|
|
if (BinaryOperator *Op0BO = dyn_cast<BinaryOperator>(Op0)) {
|
|
|
|
// Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
|
|
|
|
Value *V1, *V2;
|
|
|
|
ConstantInt *CC;
|
|
|
|
switch (Op0BO->getOpcode()) {
|
2010-01-10 14:59:55 +08:00
|
|
|
default: break;
|
|
|
|
case Instruction::Add:
|
|
|
|
case Instruction::And:
|
|
|
|
case Instruction::Or:
|
|
|
|
case Instruction::Xor: {
|
|
|
|
// These operators commute.
|
|
|
|
// Turn (Y + (X >> C)) << C -> (X + (Y << C)) & (~0 << C)
|
|
|
|
if (isLeftShift && Op0BO->getOperand(1)->hasOneUse() &&
|
|
|
|
match(Op0BO->getOperand(1), m_Shr(m_Value(V1),
|
|
|
|
m_Specific(Op1)))) {
|
|
|
|
Value *YS = // (Y << C)
|
|
|
|
Builder->CreateShl(Op0BO->getOperand(0), Op1, Op0BO->getName());
|
|
|
|
// (X + (Y << C))
|
|
|
|
Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), YS, V1,
|
|
|
|
Op0BO->getOperand(1)->getName());
|
|
|
|
uint32_t Op1Val = Op1->getLimitedValue(TypeBits);
|
|
|
|
return BinaryOperator::CreateAnd(X, ConstantInt::get(I.getContext(),
|
|
|
|
APInt::getHighBitsSet(TypeBits, TypeBits-Op1Val)));
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
2010-01-10 14:59:55 +08:00
|
|
|
|
|
|
|
// Turn (Y + ((X >> C) & CC)) << C -> ((X & (CC << C)) + (Y << C))
|
|
|
|
Value *Op0BOOp1 = Op0BO->getOperand(1);
|
|
|
|
if (isLeftShift && Op0BOOp1->hasOneUse() &&
|
|
|
|
match(Op0BOOp1,
|
|
|
|
m_And(m_Shr(m_Value(V1), m_Specific(Op1)),
|
|
|
|
m_ConstantInt(CC))) &&
|
|
|
|
cast<BinaryOperator>(Op0BOOp1)->getOperand(0)->hasOneUse()) {
|
|
|
|
Value *YS = // (Y << C)
|
|
|
|
Builder->CreateShl(Op0BO->getOperand(0), Op1,
|
|
|
|
Op0BO->getName());
|
|
|
|
// X & (CC << C)
|
|
|
|
Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
|
|
|
|
V1->getName()+".mask");
|
|
|
|
return BinaryOperator::Create(Op0BO->getOpcode(), YS, XM);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// FALL THROUGH.
|
|
|
|
case Instruction::Sub: {
|
|
|
|
// Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
|
|
|
|
if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
|
|
|
|
match(Op0BO->getOperand(0), m_Shr(m_Value(V1),
|
|
|
|
m_Specific(Op1)))) {
|
|
|
|
Value *YS = // (Y << C)
|
|
|
|
Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
|
|
|
|
// (X + (Y << C))
|
|
|
|
Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), V1, YS,
|
|
|
|
Op0BO->getOperand(0)->getName());
|
|
|
|
uint32_t Op1Val = Op1->getLimitedValue(TypeBits);
|
|
|
|
return BinaryOperator::CreateAnd(X, ConstantInt::get(I.getContext(),
|
|
|
|
APInt::getHighBitsSet(TypeBits, TypeBits-Op1Val)));
|
|
|
|
}
|
|
|
|
|
|
|
|
// Turn (((X >> C)&CC) + Y) << C -> (X + (Y << C)) & (CC << C)
|
|
|
|
if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
|
|
|
|
match(Op0BO->getOperand(0),
|
|
|
|
m_And(m_Shr(m_Value(V1), m_Value(V2)),
|
|
|
|
m_ConstantInt(CC))) && V2 == Op1 &&
|
|
|
|
cast<BinaryOperator>(Op0BO->getOperand(0))
|
|
|
|
->getOperand(0)->hasOneUse()) {
|
|
|
|
Value *YS = // (Y << C)
|
|
|
|
Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
|
|
|
|
// X & (CC << C)
|
|
|
|
Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
|
|
|
|
V1->getName()+".mask");
|
2010-01-05 15:44:46 +08:00
|
|
|
|
2010-01-10 14:59:55 +08:00
|
|
|
return BinaryOperator::Create(Op0BO->getOpcode(), XM, YS);
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
2010-01-10 14:59:55 +08:00
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
// If the operand is an bitwise operator with a constant RHS, and the
|
|
|
|
// shift is the only use, we can pull it out of the shift.
|
|
|
|
if (ConstantInt *Op0C = dyn_cast<ConstantInt>(Op0BO->getOperand(1))) {
|
|
|
|
bool isValid = true; // Valid only for And, Or, Xor
|
|
|
|
bool highBitSet = false; // Transform if high bit of constant set?
|
|
|
|
|
|
|
|
switch (Op0BO->getOpcode()) {
|
2010-01-10 14:59:55 +08:00
|
|
|
default: isValid = false; break; // Do not perform transform!
|
|
|
|
case Instruction::Add:
|
|
|
|
isValid = isLeftShift;
|
|
|
|
break;
|
|
|
|
case Instruction::Or:
|
|
|
|
case Instruction::Xor:
|
|
|
|
highBitSet = false;
|
|
|
|
break;
|
|
|
|
case Instruction::And:
|
|
|
|
highBitSet = true;
|
|
|
|
break;
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
// If this is a signed shift right, and the high bit is modified
|
|
|
|
// by the logical operation, do not perform the transformation.
|
|
|
|
// The highBitSet boolean indicates the value of the high bit of
|
|
|
|
// the constant which would cause it to be modified for this
|
|
|
|
// operation.
|
|
|
|
//
|
|
|
|
if (isValid && I.getOpcode() == Instruction::AShr)
|
|
|
|
isValid = Op0C->getValue()[TypeBits-1] == highBitSet;
|
|
|
|
|
|
|
|
if (isValid) {
|
|
|
|
Constant *NewRHS = ConstantExpr::get(I.getOpcode(), Op0C, Op1);
|
|
|
|
|
|
|
|
Value *NewShift =
|
|
|
|
Builder->CreateBinOp(I.getOpcode(), Op0BO->getOperand(0), Op1);
|
|
|
|
NewShift->takeName(Op0BO);
|
|
|
|
|
|
|
|
return BinaryOperator::Create(Op0BO->getOpcode(), NewShift,
|
|
|
|
NewRHS);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Find out if this is a shift of a shift by a constant.
|
|
|
|
BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0);
|
|
|
|
if (ShiftOp && !ShiftOp->isShift())
|
|
|
|
ShiftOp = 0;
|
|
|
|
|
|
|
|
if (ShiftOp && isa<ConstantInt>(ShiftOp->getOperand(1))) {
|
Reapply r155136 after fixing PR12599.
Original commit message:
Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.
Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.
These transformations are deferred:
(X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses)
(X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1)
(X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2)
The corresponding exact transformations are preserved, just like
div-exact + mul:
(X >>?,exact C) << C --> X
(X >>?,exact C1) << C2 --> X << (C2-C1)
(X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)
The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.
llvm-svn: 155362
2012-04-24 01:39:52 +08:00
|
|
|
|
|
|
|
// This is a constant shift of a constant shift. Be careful about hiding
|
|
|
|
// shl instructions behind bit masks. They are used to represent multiplies
|
|
|
|
// by a constant, and it is important that simple arithmetic expressions
|
|
|
|
// are still recognizable by scalar evolution.
|
|
|
|
//
|
|
|
|
// The transforms applied to shl are very similar to the transforms applied
|
|
|
|
// to mul by constant. We can be more aggressive about optimizing right
|
|
|
|
// shifts.
|
|
|
|
//
|
|
|
|
// Combinations of right and left shifts will still be optimized in
|
|
|
|
// DAGCombine where scalar evolution no longer applies.
|
|
|
|
|
2010-01-05 15:44:46 +08:00
|
|
|
ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
|
|
|
|
uint32_t ShiftAmt1 = ShiftAmt1C->getLimitedValue(TypeBits);
|
|
|
|
uint32_t ShiftAmt2 = Op1->getLimitedValue(TypeBits);
|
|
|
|
assert(ShiftAmt2 != 0 && "Should have been simplified earlier");
|
|
|
|
if (ShiftAmt1 == 0) return 0; // Will be simplified in the future.
|
|
|
|
Value *X = ShiftOp->getOperand(0);
|
|
|
|
|
2011-07-18 12:54:35 +08:00
|
|
|
IntegerType *Ty = cast<IntegerType>(I.getType());
|
2010-01-05 15:44:46 +08:00
|
|
|
|
|
|
|
// Check for (X << c1) << c2 and (X >> c1) >> c2
|
|
|
|
if (I.getOpcode() == ShiftOp->getOpcode()) {
|
2012-01-01 05:30:22 +08:00
|
|
|
uint32_t AmtSum = ShiftAmt1+ShiftAmt2; // Fold into one big shift.
|
2010-01-05 15:44:46 +08:00
|
|
|
// If this is oversized composite shift, then unsigned shifts get 0, ashr
|
|
|
|
// saturates.
|
|
|
|
if (AmtSum >= TypeBits) {
|
|
|
|
if (I.getOpcode() != Instruction::AShr)
|
|
|
|
return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));
|
|
|
|
AmtSum = TypeBits-1; // Saturate to 31 for i32 ashr.
|
|
|
|
}
|
|
|
|
|
|
|
|
return BinaryOperator::Create(I.getOpcode(), X,
|
|
|
|
ConstantInt::get(Ty, AmtSum));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ShiftAmt1 == ShiftAmt2) {
|
|
|
|
// If we have ((X << C) >>u C), turn this into X & (-1 >>u C).
|
2010-08-28 05:04:34 +08:00
|
|
|
if (I.getOpcode() == Instruction::LShr &&
|
|
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
2010-01-05 15:44:46 +08:00
|
|
|
APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt1));
|
|
|
|
return BinaryOperator::CreateAnd(X,
|
|
|
|
ConstantInt::get(I.getContext(), Mask));
|
|
|
|
}
|
|
|
|
} else if (ShiftAmt1 < ShiftAmt2) {
|
|
|
|
uint32_t ShiftDiff = ShiftAmt2-ShiftAmt1;
|
Reapply r155136 after fixing PR12599.
Original commit message:
Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.
Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.
These transformations are deferred:
(X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses)
(X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1)
(X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2)
The corresponding exact transformations are preserved, just like
div-exact + mul:
(X >>?,exact C) << C --> X
(X >>?,exact C1) << C2 --> X << (C2-C1)
(X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)
The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.
llvm-svn: 155362
2012-04-24 01:39:52 +08:00
|
|
|
|
|
|
|
// (X >>?,exact C1) << C2 --> X << (C2-C1)
|
|
|
|
// The inexact version is deferred to DAGCombine so we don't hide shl
|
|
|
|
// behind a bit mask.
|
2010-08-28 05:04:34 +08:00
|
|
|
if (I.getOpcode() == Instruction::Shl &&
|
Reapply r155136 after fixing PR12599.
Original commit message:
Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.
Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.
These transformations are deferred:
(X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses)
(X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1)
(X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2)
The corresponding exact transformations are preserved, just like
div-exact + mul:
(X >>?,exact C) << C --> X
(X >>?,exact C1) << C2 --> X << (C2-C1)
(X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)
The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.
llvm-svn: 155362
2012-04-24 01:39:52 +08:00
|
|
|
ShiftOp->getOpcode() != Instruction::Shl &&
|
|
|
|
ShiftOp->isExact()) {
|
2010-01-05 15:44:46 +08:00
|
|
|
assert(ShiftOp->getOpcode() == Instruction::LShr ||
|
|
|
|
ShiftOp->getOpcode() == Instruction::AShr);
|
2012-01-04 17:28:29 +08:00
|
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
Reapply r155136 after fixing PR12599.
Original commit message:
Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.
Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.
These transformations are deferred:
(X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses)
(X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1)
(X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2)
The corresponding exact transformations are preserved, just like
div-exact + mul:
(X >>?,exact C) << C --> X
(X >>?,exact C1) << C2 --> X << (C2-C1)
(X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)
The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.
llvm-svn: 155362
2012-04-24 01:39:52 +08:00
|
|
|
BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
|
|
|
|
X, ShiftDiffCst);
|
|
|
|
NewShl->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
|
|
|
|
NewShl->setHasNoSignedWrap(I.hasNoSignedWrap());
|
|
|
|
return NewShl;
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
Reapply r155136 after fixing PR12599.
Original commit message:
Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.
Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.
These transformations are deferred:
(X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses)
(X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1)
(X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2)
The corresponding exact transformations are preserved, just like
div-exact + mul:
(X >>?,exact C) << C --> X
(X >>?,exact C1) << C2 --> X << (C2-C1)
(X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)
The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.
llvm-svn: 155362
2012-04-24 01:39:52 +08:00
|
|
|
|
2010-01-05 15:44:46 +08:00
|
|
|
// (X << C1) >>u C2 --> X >>u (C2-C1) & (-1 >> C2)
|
2010-08-28 05:04:34 +08:00
|
|
|
if (I.getOpcode() == Instruction::LShr &&
|
|
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
2012-01-04 17:28:29 +08:00
|
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
|
|
// (X <<nuw C1) >>u C2 --> X >>u (C2-C1)
|
|
|
|
if (ShiftOp->hasNoUnsignedWrap()) {
|
|
|
|
BinaryOperator *NewLShr = BinaryOperator::Create(Instruction::LShr,
|
|
|
|
X, ShiftDiffCst);
|
|
|
|
NewLShr->setIsExact(I.isExact());
|
|
|
|
return NewLShr;
|
|
|
|
}
|
|
|
|
Value *Shift = Builder->CreateLShr(X, ShiftDiffCst);
|
2010-01-05 15:44:46 +08:00
|
|
|
|
|
|
|
APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
|
|
|
|
return BinaryOperator::CreateAnd(Shift,
|
|
|
|
ConstantInt::get(I.getContext(),Mask));
|
|
|
|
}
|
2012-01-04 17:28:29 +08:00
|
|
|
|
|
|
|
// We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
|
|
|
|
// we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
|
|
|
|
if (I.getOpcode() == Instruction::AShr &&
|
|
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
|
|
|
if (ShiftOp->hasNoSignedWrap()) {
|
|
|
|
// (X <<nsw C1) >>s C2 --> X >>s (C2-C1)
|
|
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
|
|
BinaryOperator *NewAShr = BinaryOperator::Create(Instruction::AShr,
|
|
|
|
X, ShiftDiffCst);
|
|
|
|
NewAShr->setIsExact(I.isExact());
|
|
|
|
return NewAShr;
|
|
|
|
}
|
|
|
|
}
|
2010-01-05 15:44:46 +08:00
|
|
|
} else {
|
|
|
|
assert(ShiftAmt2 < ShiftAmt1);
|
|
|
|
uint32_t ShiftDiff = ShiftAmt1-ShiftAmt2;
|
|
|
|
|
Reapply r155136 after fixing PR12599.
Original commit message:
Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.
Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.
These transformations are deferred:
(X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses)
(X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1)
(X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2)
The corresponding exact transformations are preserved, just like
div-exact + mul:
(X >>?,exact C) << C --> X
(X >>?,exact C1) << C2 --> X << (C2-C1)
(X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)
The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.
llvm-svn: 155362
2012-04-24 01:39:52 +08:00
|
|
|
// (X >>?exact C1) << C2 --> X >>?exact (C1-C2)
|
|
|
|
// The inexact version is deferred to DAGCombine so we don't hide shl
|
|
|
|
// behind a bit mask.
|
2010-08-28 05:04:34 +08:00
|
|
|
if (I.getOpcode() == Instruction::Shl &&
|
Reapply r155136 after fixing PR12599.
Original commit message:
Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.
Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.
These transformations are deferred:
(X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses)
(X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1)
(X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2)
The corresponding exact transformations are preserved, just like
div-exact + mul:
(X >>?,exact C) << C --> X
(X >>?,exact C1) << C2 --> X << (C2-C1)
(X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)
The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.
llvm-svn: 155362
2012-04-24 01:39:52 +08:00
|
|
|
ShiftOp->getOpcode() != Instruction::Shl &&
|
|
|
|
ShiftOp->isExact()) {
|
2012-01-01 05:30:22 +08:00
|
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
Reapply r155136 after fixing PR12599.
Original commit message:
Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.
Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.
These transformations are deferred:
(X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses)
(X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1)
(X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2)
The corresponding exact transformations are preserved, just like
div-exact + mul:
(X >>?,exact C) << C --> X
(X >>?,exact C1) << C2 --> X << (C2-C1)
(X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)
The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.
llvm-svn: 155362
2012-04-24 01:39:52 +08:00
|
|
|
BinaryOperator *NewShr = BinaryOperator::Create(ShiftOp->getOpcode(),
|
|
|
|
X, ShiftDiffCst);
|
|
|
|
NewShr->setIsExact(true);
|
|
|
|
return NewShr;
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
Reapply r155136 after fixing PR12599.
Original commit message:
Defer some shl transforms to DAGCombine.
The shl instruction is used to represent multiplication by a constant
power of two as well as bitwise left shifts. Some InstCombine
transformations would turn an shl instruction into a bit mask operation,
making it difficult for later analysis passes to recognize the
constsnt multiplication.
Disable those shl transformations, deferring them to DAGCombine time.
An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'.
These transformations are deferred:
(X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses)
(X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1)
(X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2)
The corresponding exact transformations are preserved, just like
div-exact + mul:
(X >>?,exact C) << C --> X
(X >>?,exact C1) << C2 --> X << (C2-C1)
(X >>?,exact C1) << C2 --> X >>?,exact (C1-C2)
The disabled transformations could also prevent the instruction selector
from recognizing rotate patterns in hash functions and cryptographic
primitives. I have a test case for that, but it is too fragile.
llvm-svn: 155362
2012-04-24 01:39:52 +08:00
|
|
|
|
2010-01-05 15:44:46 +08:00
|
|
|
// (X << C1) >>u C2 --> X << (C1-C2) & (-1 >> C2)
|
2010-08-28 05:04:34 +08:00
|
|
|
if (I.getOpcode() == Instruction::LShr &&
|
|
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
2012-01-04 17:28:29 +08:00
|
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
|
|
if (ShiftOp->hasNoUnsignedWrap()) {
|
|
|
|
// (X <<nuw C1) >>u C2 --> X <<nuw (C1-C2)
|
|
|
|
BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
|
|
|
|
X, ShiftDiffCst);
|
|
|
|
NewShl->setHasNoUnsignedWrap(true);
|
|
|
|
return NewShl;
|
|
|
|
}
|
|
|
|
Value *Shift = Builder->CreateShl(X, ShiftDiffCst);
|
2010-01-05 15:44:46 +08:00
|
|
|
|
|
|
|
APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
|
|
|
|
return BinaryOperator::CreateAnd(Shift,
|
|
|
|
ConstantInt::get(I.getContext(),Mask));
|
|
|
|
}
|
|
|
|
|
2012-01-04 17:28:29 +08:00
|
|
|
// We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
|
|
|
|
// we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
|
|
|
|
if (I.getOpcode() == Instruction::AShr &&
|
|
|
|
ShiftOp->getOpcode() == Instruction::Shl) {
|
|
|
|
if (ShiftOp->hasNoSignedWrap()) {
|
|
|
|
// (X <<nsw C1) >>s C2 --> X <<nsw (C1-C2)
|
|
|
|
ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
|
|
|
|
BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
|
|
|
|
X, ShiftDiffCst);
|
|
|
|
NewShl->setHasNoSignedWrap(true);
|
|
|
|
return NewShl;
|
|
|
|
}
|
|
|
|
}
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
Instruction *InstCombiner::visitShl(BinaryOperator &I) {
|
2011-02-10 01:15:04 +08:00
|
|
|
if (Value *V = SimplifyShlInst(I.getOperand(0), I.getOperand(1),
|
|
|
|
I.hasNoSignedWrap(), I.hasNoUnsignedWrap(),
|
|
|
|
TD))
|
2011-01-14 08:37:45 +08:00
|
|
|
return ReplaceInstUsesWith(I, V);
|
2011-02-10 13:36:31 +08:00
|
|
|
|
|
|
|
if (Instruction *V = commonShiftTransforms(I))
|
|
|
|
return V;
|
|
|
|
|
|
|
|
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(I.getOperand(1))) {
|
|
|
|
unsigned ShAmt = Op1C->getZExtValue();
|
|
|
|
|
|
|
|
// If the shifted-out value is known-zero, then this is a NUW shift.
|
|
|
|
if (!I.hasNoUnsignedWrap() &&
|
|
|
|
MaskedValueIsZero(I.getOperand(0),
|
|
|
|
APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt))) {
|
|
|
|
I.setHasNoUnsignedWrap();
|
|
|
|
return &I;
|
|
|
|
}
|
|
|
|
|
|
|
|
// If the shifted out value is all signbits, this is a NSW shift.
|
|
|
|
if (!I.hasNoSignedWrap() &&
|
|
|
|
ComputeNumSignBits(I.getOperand(0)) > ShAmt) {
|
|
|
|
I.setHasNoSignedWrap();
|
|
|
|
return &I;
|
|
|
|
}
|
|
|
|
}
|
2011-04-29 16:15:41 +08:00
|
|
|
|
2011-04-29 16:41:23 +08:00
|
|
|
// (C1 << A) << C2 -> (C1 << C2) << A
|
2011-04-29 16:15:41 +08:00
|
|
|
Constant *C1, *C2;
|
|
|
|
Value *A;
|
|
|
|
if (match(I.getOperand(0), m_OneUse(m_Shl(m_Constant(C1), m_Value(A)))) &&
|
|
|
|
match(I.getOperand(1), m_Constant(C2)))
|
|
|
|
return BinaryOperator::CreateShl(ConstantExpr::getShl(C1, C2), A);
|
|
|
|
|
2011-02-10 13:36:31 +08:00
|
|
|
return 0;
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
Instruction *InstCombiner::visitLShr(BinaryOperator &I) {
|
2011-02-10 01:15:04 +08:00
|
|
|
if (Value *V = SimplifyLShrInst(I.getOperand(0), I.getOperand(1),
|
|
|
|
I.isExact(), TD))
|
2011-01-14 08:37:45 +08:00
|
|
|
return ReplaceInstUsesWith(I, V);
|
|
|
|
|
2010-01-24 02:49:30 +08:00
|
|
|
if (Instruction *R = commonShiftTransforms(I))
|
|
|
|
return R;
|
|
|
|
|
|
|
|
Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
|
|
|
|
|
2011-02-10 13:36:31 +08:00
|
|
|
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
|
|
|
|
unsigned ShAmt = Op1C->getZExtValue();
|
|
|
|
|
2010-01-24 02:49:30 +08:00
|
|
|
if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Op0)) {
|
2010-01-24 07:31:46 +08:00
|
|
|
unsigned BitWidth = Op0->getType()->getScalarSizeInBits();
|
2010-01-24 02:49:30 +08:00
|
|
|
// ctlz.i32(x)>>5 --> zext(x == 0)
|
|
|
|
// cttz.i32(x)>>5 --> zext(x == 0)
|
|
|
|
// ctpop.i32(x)>>5 --> zext(x == -1)
|
|
|
|
if ((II->getIntrinsicID() == Intrinsic::ctlz ||
|
|
|
|
II->getIntrinsicID() == Intrinsic::cttz ||
|
|
|
|
II->getIntrinsicID() == Intrinsic::ctpop) &&
|
2011-02-10 13:36:31 +08:00
|
|
|
isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) {
|
2010-01-24 02:49:30 +08:00
|
|
|
bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop;
|
2010-01-24 07:31:46 +08:00
|
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|
Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1:0);
|
2010-06-24 08:44:01 +08:00
|
|
|
Value *Cmp = Builder->CreateICmpEQ(II->getArgOperand(0), RHS);
|
2010-01-24 02:49:30 +08:00
|
|
|
return new ZExtInst(Cmp, II->getType());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-02-10 13:36:31 +08:00
|
|
|
// If the shifted-out value is known-zero, then this is an exact shift.
|
|
|
|
if (!I.isExact() &&
|
|
|
|
MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){
|
|
|
|
I.setIsExact();
|
|
|
|
return &I;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-01-24 02:49:30 +08:00
|
|
|
return 0;
|
2010-01-05 15:44:46 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
|
2011-02-10 01:15:04 +08:00
|
|
|
if (Value *V = SimplifyAShrInst(I.getOperand(0), I.getOperand(1),
|
|
|
|
I.isExact(), TD))
|
2011-01-14 08:37:45 +08:00
|
|
|
return ReplaceInstUsesWith(I, V);
|
|
|
|
|
2010-01-05 15:44:46 +08:00
|
|
|
if (Instruction *R = commonShiftTransforms(I))
|
|
|
|
return R;
|
|
|
|
|
2010-01-09 03:04:21 +08:00
|
|
|
Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
|
2011-01-14 08:37:45 +08:00
|
|
|
|
2010-01-09 03:04:21 +08:00
|
|
|
if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
|
2011-02-10 13:36:31 +08:00
|
|
|
unsigned ShAmt = Op1C->getZExtValue();
|
|
|
|
|
2010-01-09 03:04:21 +08:00
|
|
|
// If the input is a SHL by the same constant (ashr (shl X, C), C), then we
|
2010-01-19 06:19:16 +08:00
|
|
|
// have a sign-extend idiom.
|
2010-01-09 03:04:21 +08:00
|
|
|
Value *X;
|
2010-01-19 06:19:16 +08:00
|
|
|
if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1)))) {
|
2011-02-10 13:36:31 +08:00
|
|
|
// If the left shift is just shifting out partial signbits, delete the
|
|
|
|
// extension.
|
|
|
|
if (cast<OverflowingBinaryOperator>(Op0)->hasNoSignedWrap())
|
2010-01-19 06:19:16 +08:00
|
|
|
return ReplaceInstUsesWith(I, X);
|
|
|
|
|
|
|
|
// If the input is an extension from the shifted amount value, e.g.
|
|
|
|
// %x = zext i8 %A to i32
|
|
|
|
// %y = shl i32 %x, 24
|
|
|
|
// %z = ashr %y, 24
|
|
|
|
// then turn this into "z = sext i8 A to i32".
|
|
|
|
if (ZExtInst *ZI = dyn_cast<ZExtInst>(X)) {
|
|
|
|
uint32_t SrcBits = ZI->getOperand(0)->getType()->getScalarSizeInBits();
|
|
|
|
uint32_t DestBits = ZI->getType()->getScalarSizeInBits();
|
|
|
|
if (Op1C->getZExtValue() == DestBits-SrcBits)
|
|
|
|
return new SExtInst(ZI->getOperand(0), ZI->getType());
|
|
|
|
}
|
|
|
|
}
|
2011-02-10 13:36:31 +08:00
|
|
|
|
|
|
|
// If the shifted-out value is known-zero, then this is an exact shift.
|
|
|
|
if (!I.isExact() &&
|
|
|
|
MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){
|
|
|
|
I.setIsExact();
|
|
|
|
return &I;
|
|
|
|
}
|
2010-01-09 03:04:21 +08:00
|
|
|
}
|
2010-01-05 15:44:46 +08:00
|
|
|
|
|
|
|
// See if we can turn a signed shr into an unsigned shr.
|
|
|
|
if (MaskedValueIsZero(Op0,
|
|
|
|
APInt::getSignBit(I.getType()->getScalarSizeInBits())))
|
2010-01-09 03:04:21 +08:00
|
|
|
return BinaryOperator::CreateLShr(Op0, Op1);
|
2010-01-05 15:44:46 +08:00
|
|
|
|
|
|
|
// Arithmetic shifting an all-sign-bit value is a no-op.
|
|
|
|
unsigned NumSignBits = ComputeNumSignBits(Op0);
|
|
|
|
if (NumSignBits == Op0->getType()->getScalarSizeInBits())
|
|
|
|
return ReplaceInstUsesWith(I, Op0);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|