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//===-- ARM.h - Top-level interface for ARM representation ------*- C++ -*-===//
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2006-05-15 06:18:28 +08:00
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//
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2019-01-19 16:50:56 +08:00
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// ARM back-end.
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//
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//===----------------------------------------------------------------------===//
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2014-08-14 00:26:38 +08:00
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#ifndef LLVM_LIB_TARGET_ARM_ARM_H
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#define LLVM_LIB_TARGET_ARM_ARM_H
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#include "llvm/IR/LegacyPassManager.h"
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2014-03-23 07:51:00 +08:00
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#include "llvm/Support/CodeGen.h"
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#include <functional>
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#include <vector>
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namespace llvm {
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2011-07-11 11:57:24 +08:00
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class ARMAsmPrinter;
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class ARMBaseTargetMachine;
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class ARMRegisterBankInfo;
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class ARMSubtarget;
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struct BasicBlockInfo;
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class Function;
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class FunctionPass;
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class InstructionSelector;
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class MachineBasicBlock;
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class MachineFunction;
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class MachineInstr;
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class MCInst;
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class PassRegistry;
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Pass *createARMParallelDSPPass();
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2009-09-28 22:30:20 +08:00
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FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
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CodeGenOpt::Level OptLevel);
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2013-03-16 02:28:25 +08:00
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FunctionPass *createA15SDOptimizerPass();
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2009-06-13 17:12:55 +08:00
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FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
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2009-11-07 07:52:48 +08:00
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FunctionPass *createARMExpandPseudoPass();
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2018-07-23 20:27:47 +08:00
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FunctionPass *createARMCodeGenPreparePass();
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FunctionPass *createARMConstantIslandPass();
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2010-12-06 06:04:16 +08:00
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FunctionPass *createMLxExpansionPass();
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2010-07-03 05:07:09 +08:00
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FunctionPass *createThumb2ITBlockPass();
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2014-04-02 17:03:43 +08:00
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FunctionPass *createARMOptimizeBarriersPass();
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2015-06-09 02:50:43 +08:00
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FunctionPass *createThumb2SizeReductionPass(
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std::function<bool(const Function &)> Ftor = nullptr);
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InstructionSelector *
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createARMInstructionSelector(const ARMBaseTargetMachine &TM, const ARMSubtarget &STI,
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const ARMRegisterBankInfo &RBI);
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2009-07-10 09:54:42 +08:00
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2010-11-15 05:00:02 +08:00
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void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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2010-12-01 11:45:07 +08:00
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ARMAsmPrinter &AP);
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2016-07-22 16:39:12 +08:00
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void computeBlockSize(MachineFunction *MF, MachineBasicBlock *MBB,
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BasicBlockInfo &BBI);
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std::vector<BasicBlockInfo> computeAllBlockSizes(MachineFunction *MF);
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void initializeARMParallelDSPPass(PassRegistry &);
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void initializeARMLoadStoreOptPass(PassRegistry &);
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void initializeARMPreAllocLoadStoreOptPass(PassRegistry &);
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2018-07-23 20:27:47 +08:00
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void initializeARMCodeGenPreparePass(PassRegistry &);
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2017-02-13 22:07:25 +08:00
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void initializeARMConstantIslandsPass(PassRegistry &);
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2017-09-06 06:45:23 +08:00
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void initializeARMExpandPseudoPass(PassRegistry &);
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2017-12-19 20:19:08 +08:00
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void initializeThumb2SizeReducePass(PassRegistry &);
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2016-07-16 10:24:10 +08:00
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2017-01-27 07:40:06 +08:00
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} // end namespace llvm
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2017-01-27 07:40:06 +08:00
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#endif // LLVM_LIB_TARGET_ARM_ARM_H
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