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llvm-project/llvm/test/CodeGen/AArch64/fastcc.ll

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Add explicit triples to AArch64 tests Only Linux is supported at the moment, and other platforms quickly fault. As a result these tests would fail on non-Linux hosts. It may be worth making the tests more generic again as more platforms are supported. llvm-svn: 174170
2013-02-01 19:40:47 +08:00
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -tailcallopt | FileCheck %s -check-prefix CHECK-TAIL
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
Add AArch64 as an experimental target. This patch adds support for AArch64 (ARM's 64-bit architecture) to LLVM in the "experimental" category. Currently, it won't be built unless requested explicitly. This initial commit should have support for: + Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions (except the late addition CRC instructions). + CodeGen features required for C++03 and C99. + Compilation for the "small" memory model: code+static data < 4GB. + Absolute and position-independent code. + GNU-style (i.e. "__thread") TLS. + Debugging information. The principal omission, currently, is performance tuning. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174054
2013-01-31 20:12:40 +08:00
; Without tailcallopt fastcc still means the caller cleans up the
; stack, so try to make sure this is respected.
define fastcc void @func_stack0() {
; CHECK: func_stack0:
; CHECK: sub sp, sp, #48
; CHECK-TAIL: func_stack0:
; CHECK-TAIL: sub sp, sp, #48
call fastcc void @func_stack8([8 x i32] undef, i32 42)
; CHECK: bl func_stack8
; CHECK-NOT: sub sp, sp,
; CHECK-TAIL: bl func_stack8
; CHECK-TAIL: sub sp, sp, #16
call fastcc void @func_stack32([8 x i32] undef, i128 0, i128 9)
; CHECK: bl func_stack32
; CHECK-NOT: sub sp, sp,
; CHECK-TAIL: bl func_stack32
; CHECK-TAIL: sub sp, sp, #32
call fastcc void @func_stack0()
; CHECK: bl func_stack0
; CHECK-NOT: sub sp, sp
; CHECK-TAIL: bl func_stack0
; CHECK-TAIL-NOT: sub sp, sp
ret void
; CHECK: add sp, sp, #48
; CHECK-NEXT: ret
; CHECK-TAIL: add sp, sp, #48
; CHECK-TAIL-NEXT: ret
}
define fastcc void @func_stack8([8 x i32], i32 %stacked) {
; CHECK: func_stack8:
; CHECK: sub sp, sp, #48
; CHECK-TAIL: func_stack8:
; CHECK-TAIL: sub sp, sp, #48
call fastcc void @func_stack8([8 x i32] undef, i32 42)
; CHECK: bl func_stack8
; CHECK-NOT: sub sp, sp,
; CHECK-TAIL: bl func_stack8
; CHECK-TAIL: sub sp, sp, #16
call fastcc void @func_stack32([8 x i32] undef, i128 0, i128 9)
; CHECK: bl func_stack32
; CHECK-NOT: sub sp, sp,
; CHECK-TAIL: bl func_stack32
; CHECK-TAIL: sub sp, sp, #32
call fastcc void @func_stack0()
; CHECK: bl func_stack0
; CHECK-NOT: sub sp, sp
; CHECK-TAIL: bl func_stack0
; CHECK-TAIL-NOT: sub sp, sp
ret void
; CHECK: add sp, sp, #48
; CHECK-NEXT: ret
; CHECK-TAIL: add sp, sp, #64
; CHECK-TAIL-NEXT: ret
}
define fastcc void @func_stack32([8 x i32], i128 %stacked0, i128 %stacked1) {
; CHECK: func_stack32:
; CHECK: sub sp, sp, #48
; CHECK-TAIL: func_stack32:
; CHECK-TAIL: sub sp, sp, #48
call fastcc void @func_stack8([8 x i32] undef, i32 42)
; CHECK: bl func_stack8
; CHECK-NOT: sub sp, sp,
; CHECK-TAIL: bl func_stack8
; CHECK-TAIL: sub sp, sp, #16
call fastcc void @func_stack32([8 x i32] undef, i128 0, i128 9)
; CHECK: bl func_stack32
; CHECK-NOT: sub sp, sp,
; CHECK-TAIL: bl func_stack32
; CHECK-TAIL: sub sp, sp, #32
call fastcc void @func_stack0()
; CHECK: bl func_stack0
; CHECK-NOT: sub sp, sp
; CHECK-TAIL: bl func_stack0
; CHECK-TAIL-NOT: sub sp, sp
ret void
; CHECK: add sp, sp, #48
; CHECK-NEXT: ret
; CHECK-TAIL: add sp, sp, #80
; CHECK-TAIL-NEXT: ret
}