2017-05-10 20:58:31 +08:00
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
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2017-05-17 20:48:08 +08:00
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; RUN: llc -mtriple=i386-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
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2017-05-10 20:58:31 +08:00
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define i64 @test_add_i64(i64 %arg1, i64 %arg2) {
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2017-05-17 20:48:08 +08:00
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; X64-LABEL: test_add_i64:
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; X64: # BB#0:
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; X64-NEXT: leaq (%rsi,%rdi), %rax
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; X64-NEXT: retq
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;
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; X32-LABEL: test_add_i64:
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; X32: # BB#0:
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; X32-NEXT: pushl %ebp
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; X32-NEXT: .Lcfi0:
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; X32-NEXT: .cfi_def_cfa_offset 8
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; X32-NEXT: .Lcfi1:
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; X32-NEXT: .cfi_offset %ebp, -8
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; X32-NEXT: movl %esp, %ebp
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; X32-NEXT: .Lcfi2:
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; X32-NEXT: .cfi_def_cfa_register %ebp
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; X32-NEXT: pushl %esi
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; X32-NEXT: .Lcfi3:
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; X32-NEXT: .cfi_offset %esi, -12
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; X32-NEXT: leal 8(%ebp), %ecx
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; X32-NEXT: leal 12(%ebp), %esi
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; X32-NEXT: leal 16(%ebp), %eax
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: leal 20(%ebp), %edx
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; X32-NEXT: movl (%edx), %edx
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; X32-NEXT: addl (%ecx), %eax
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; X32-NEXT: adcl (%esi), %edx
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; X32-NEXT: popl %esi
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; X32-NEXT: popl %ebp
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; X32-NEXT: retl
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2017-05-10 20:58:31 +08:00
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%ret = add i64 %arg1, %arg2
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ret i64 %ret
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}
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define i32 @test_add_i32(i32 %arg1, i32 %arg2) {
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2017-05-17 20:48:08 +08:00
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; X64-LABEL: test_add_i32:
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; X64: # BB#0:
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; X64-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
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; X64-NEXT: # kill: %ESI<def> %ESI<kill> %RSI<def>
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; X64-NEXT: leal (%rsi,%rdi), %eax
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; X64-NEXT: retq
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;
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; X32-LABEL: test_add_i32:
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; X32: # BB#0:
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; X32-NEXT: leal 4(%esp), %ecx
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; X32-NEXT: leal 8(%esp), %eax
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; X32-NEXT: movl (%eax), %eax
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; X32-NEXT: addl (%ecx), %eax
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; X32-NEXT: retl
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2017-05-10 20:58:31 +08:00
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%ret = add i32 %arg1, %arg2
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ret i32 %ret
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}
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define i16 @test_add_i16(i16 %arg1, i16 %arg2) {
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2017-05-17 20:48:08 +08:00
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; X64-LABEL: test_add_i16:
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; X64: # BB#0:
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; X64-NEXT: # kill: %DI<def> %DI<kill> %RDI<def>
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; X64-NEXT: # kill: %SI<def> %SI<kill> %RSI<def>
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; X64-NEXT: leal (%rsi,%rdi), %eax
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; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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; X64-NEXT: retq
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;
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; X32-LABEL: test_add_i16:
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; X32: # BB#0:
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; X32-NEXT: leal 4(%esp), %ecx
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; X32-NEXT: leal 8(%esp), %eax
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; X32-NEXT: movzwl (%eax), %eax
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; X32-NEXT: addw (%ecx), %ax
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; X32-NEXT: retl
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2017-05-10 20:58:31 +08:00
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%ret = add i16 %arg1, %arg2
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ret i16 %ret
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}
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define i8 @test_add_i8(i8 %arg1, i8 %arg2) {
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2017-05-17 20:48:08 +08:00
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; X64-LABEL: test_add_i8:
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; X64: # BB#0:
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; X64-NEXT: addb %dil, %sil
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; X64-NEXT: movl %esi, %eax
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; X64-NEXT: retq
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;
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; X32-LABEL: test_add_i8:
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; X32: # BB#0:
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; X32-NEXT: leal 4(%esp), %ecx
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; X32-NEXT: leal 8(%esp), %eax
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; X32-NEXT: movb (%eax), %al
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; X32-NEXT: addb (%ecx), %al
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; X32-NEXT: retl
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2017-05-10 20:58:31 +08:00
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%ret = add i8 %arg1, %arg2
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ret i8 %ret
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}
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