2016-08-30 03:07:08 +08:00
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//===-- lib/CodeGen/GlobalISel/CallLowering.cpp - Call lowering -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file implements some simple delegations needed for call lowering.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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2016-12-05 18:40:33 +08:00
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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2016-08-30 03:07:08 +08:00
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#include "llvm/CodeGen/MachineOperand.h"
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2016-09-21 20:57:45 +08:00
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#include "llvm/IR/DataLayout.h"
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2016-12-05 18:40:33 +08:00
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Target/TargetLowering.h"
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2016-08-30 03:07:08 +08:00
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using namespace llvm;
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bool CallLowering::lowerCall(
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MachineIRBuilder &MIRBuilder, const CallInst &CI, unsigned ResReg,
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ArrayRef<unsigned> ArgRegs, std::function<unsigned()> GetCalleeReg) const {
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auto &DL = CI.getParent()->getParent()->getParent()->getDataLayout();
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2016-08-30 03:07:08 +08:00
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// First step is to marshall all the function's parameters into the correct
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// physregs and memory locations. Gather the sequence of argument types that
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// we'll pass to the assigner function.
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2016-09-21 20:57:45 +08:00
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SmallVector<ArgInfo, 8> OrigArgs;
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unsigned i = 0;
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for (auto &Arg : CI.arg_operands()) {
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ArgInfo OrigArg{ArgRegs[i], Arg->getType(), ISD::ArgFlagsTy{}};
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setArgFlags(OrigArg, i + 1, DL, CI);
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OrigArgs.push_back(OrigArg);
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++i;
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}
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MachineOperand Callee = MachineOperand::CreateImm(0);
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if (Function *F = CI.getCalledFunction())
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Callee = MachineOperand::CreateGA(F, 0);
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else
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Callee = MachineOperand::CreateReg(GetCalleeReg(), false);
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2016-09-21 20:57:45 +08:00
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ArgInfo OrigRet{ResReg, CI.getType(), ISD::ArgFlagsTy{}};
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if (!OrigRet.Ty->isVoidTy())
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setArgFlags(OrigRet, AttributeSet::ReturnIndex, DL, CI);
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return lowerCall(MIRBuilder, Callee, OrigRet, OrigArgs);
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}
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template <typename FuncInfoTy>
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void CallLowering::setArgFlags(CallLowering::ArgInfo &Arg, unsigned OpIdx,
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const DataLayout &DL,
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const FuncInfoTy &FuncInfo) const {
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const AttributeSet &Attrs = FuncInfo.getAttributes();
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if (Attrs.hasAttribute(OpIdx, Attribute::ZExt))
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Arg.Flags.setZExt();
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if (Attrs.hasAttribute(OpIdx, Attribute::SExt))
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Arg.Flags.setSExt();
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if (Attrs.hasAttribute(OpIdx, Attribute::InReg))
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Arg.Flags.setInReg();
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if (Attrs.hasAttribute(OpIdx, Attribute::StructRet))
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Arg.Flags.setSRet();
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if (Attrs.hasAttribute(OpIdx, Attribute::SwiftSelf))
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Arg.Flags.setSwiftSelf();
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if (Attrs.hasAttribute(OpIdx, Attribute::SwiftError))
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Arg.Flags.setSwiftError();
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if (Attrs.hasAttribute(OpIdx, Attribute::ByVal))
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Arg.Flags.setByVal();
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if (Attrs.hasAttribute(OpIdx, Attribute::InAlloca))
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Arg.Flags.setInAlloca();
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if (Arg.Flags.isByVal() || Arg.Flags.isInAlloca()) {
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Type *ElementTy = cast<PointerType>(Arg.Ty)->getElementType();
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Arg.Flags.setByValSize(DL.getTypeAllocSize(ElementTy));
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// For ByVal, alignment should be passed from FE. BE will guess if
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// this info is not there but there are cases it cannot get right.
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unsigned FrameAlign;
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if (FuncInfo.getParamAlignment(OpIdx))
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FrameAlign = FuncInfo.getParamAlignment(OpIdx);
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else
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FrameAlign = getTLI()->getByValTypeAlignment(ElementTy, DL);
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Arg.Flags.setByValAlign(FrameAlign);
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}
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if (Attrs.hasAttribute(OpIdx, Attribute::Nest))
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Arg.Flags.setNest();
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Arg.Flags.setOrigAlign(DL.getABITypeAlignment(Arg.Ty));
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}
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template void
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CallLowering::setArgFlags<Function>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
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const DataLayout &DL,
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const Function &FuncInfo) const;
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template void
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CallLowering::setArgFlags<CallInst>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
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const DataLayout &DL,
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const CallInst &FuncInfo) const;
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bool CallLowering::handleAssignments(MachineIRBuilder &MIRBuilder,
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CCAssignFn *AssignFn,
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ArrayRef<ArgInfo> Args,
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ValueHandler &Handler) const {
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MachineFunction &MF = MIRBuilder.getMF();
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const Function &F = *MF.getFunction();
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const DataLayout &DL = F.getParent()->getDataLayout();
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
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unsigned NumArgs = Args.size();
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for (unsigned i = 0; i != NumArgs; ++i) {
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MVT CurVT = MVT::getVT(Args[i].Ty);
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if (AssignFn(i, CurVT, CurVT, CCValAssign::Full, Args[i].Flags, CCInfo))
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return false;
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}
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for (unsigned i = 0, e = Args.size(); i != e; ++i) {
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CCValAssign &VA = ArgLocs[i];
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if (VA.isRegLoc())
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Handler.assignValueToReg(Args[i].Reg, VA.getLocReg(), VA);
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else if (VA.isMemLoc()) {
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unsigned Size = VA.getValVT() == MVT::iPTR
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? DL.getPointerSize()
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: VA.getValVT().getSizeInBits() / 8;
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unsigned Offset = VA.getLocMemOffset();
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MachinePointerInfo MPO;
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unsigned StackAddr = Handler.getStackAddress(Size, Offset, MPO);
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Handler.assignValueToAddress(Args[i].Reg, StackAddr, Size, MPO, VA);
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} else {
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// FIXME: Support byvals and other weirdness
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return false;
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}
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}
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return true;
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}
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