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llvm-project/polly/test/ScopInfo/unnamed_nonaffine.ll

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[ScopInfo] Do not use LLVM names to identify statements, arrays, and parameters LLVM-IR names are commonly available in debug builds, but often not in release builds. Hence, using LLVM-IR names to identify statements or memory reference results makes the behavior of Polly depend on the compile mode. This is undesirable. Hence, we now just number the statements instead of using LLVM-IR names to identify them (this issue has previously been brought up by Zino Benaissa). However, as LLVM-IR names help in making test cases more readable, we add an option '-polly-use-llvm-names' to still use LLVM-IR names. This flag is by default set in the polly tests to make test cases more readable. This change reduces the time in ScopInfo from 32 seconds to 2 seconds for the following test case provided by Eli Friedman <efriedma@codeaurora.org> (already used in one of the previous commits): struct X { int x; }; void a(); #define SIG (int x, X **y, X **z) typedef void (*fn)SIG; #define FN { for (int i = 0; i < x; ++i) { (*y)[i].x += (*z)[i].x; } a(); } #define FN5 FN FN FN FN FN #define FN25 FN5 FN5 FN5 FN5 #define FN125 FN25 FN25 FN25 FN25 FN25 #define FN250 FN125 FN125 #define FN1250 FN250 FN250 FN250 FN250 FN250 void x SIG { FN1250 } For a larger benchmark I have on-hand (10000 loops), this reduces the time for running -polly-scops from 5 minutes to 4 minutes, a reduction by 20%. The reason for this large speedup is that our previous use of printAsOperand had a quadratic cost, as for each printed and unnamed operand the full function was scanned to find the instruction number that identifies the operand. We do not need to adjust the way memory reference ids are constructured, as they do not use LLVM values. Reviewed by: efriedma Tags: #polly Differential Revision: https://reviews.llvm.org/D32789 llvm-svn: 302072
2017-05-04 04:08:52 +08:00
; RUN: opt %loadPolly -polly-allow-nonaffine -polly-scops -analyze < %s \
; RUN: -polly-use-llvm-names=true | FileCheck %s
;
; RUN: opt %loadPolly -polly-allow-nonaffine -polly-scops -analyze < %s \
; RUN: -polly-use-llvm-names=false | FileCheck %s -check-prefix=UNNAMED
;
; void f(int *A, int b) {
; int x;
; for (int i = 0; i < 1024; i++) {
; if (b > i)
; x = 0;
; else if (b < 2 * i)
; x = 3;
; else
; x = b;
;
; if (A[x])
; A[x] = 0;
; }
; }
;
; CHECK: Statements {
; CHECK-NEXT: Stmt_bb3
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [b] -> { Stmt_bb3[i0] : 0 <= i0 <= 1023 and i0 < b };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb3[i0] -> [i0, 2] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb3[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: Stmt_bb7
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [b] -> { Stmt_bb7[i0] : i0 >= b and 0 <= i0 <= 1023 and 2i0 > b };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb7[i0] -> [i0, 1] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb7[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: Stmt_bb8
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [b] -> { Stmt_bb8[0] : b = 0 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb8[i0] -> [0, 0] };
; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb8[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: Stmt_bb10__TO__bb18
; CHECK-NEXT: Domain :=
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] : 0 <= i0 <= 1023 };
; CHECK-NEXT: Schedule :=
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> [i0, 3] }
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_x_1__phi[] };
; CHECK-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] };
; CHECK-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; CHECK-NEXT: [b] -> { Stmt_bb10__TO__bb18[i0] -> MemRef_A[o0] };
; CHECK-NEXT: }
; UNNAMED: Arrays {
; UNNAMED-NEXT: i32 MemRef0__phi; // Element size 4
; UNNAMED-NEXT: i32 MemRef1[*]; // Element size 4
; UNNAMED-NEXT: }
; UNNAMED: Statements {
; UNNAMED-NEXT: Stmt2
; UNNAMED-NEXT: Domain :=
; UNNAMED-NEXT: [p_0] -> { Stmt2[i0] : 0 <= i0 <= 1023 and i0 < p_0 };
; UNNAMED-NEXT: Schedule :=
; UNNAMED-NEXT: [p_0] -> { Stmt2[i0] -> [i0, 2] };
; UNNAMED-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; UNNAMED-NEXT: [p_0] -> { Stmt2[i0] -> MemRef0__phi[] };
; UNNAMED-NEXT: Stmt4
; UNNAMED-NEXT: Domain :=
; UNNAMED-NEXT: [p_0] -> { Stmt4[i0] : i0 >= p_0 and 0 <= i0 <= 1023 and 2i0 > p_0 };
; UNNAMED-NEXT: Schedule :=
; UNNAMED-NEXT: [p_0] -> { Stmt4[i0] -> [i0, 1] };
; UNNAMED-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; UNNAMED-NEXT: [p_0] -> { Stmt4[i0] -> MemRef0__phi[] };
; UNNAMED-NEXT: Stmt5
; UNNAMED-NEXT: Domain :=
; UNNAMED-NEXT: [p_0] -> { Stmt5[0] : p_0 = 0 };
; UNNAMED-NEXT: Schedule :=
; UNNAMED-NEXT: [p_0] -> { Stmt5[i0] -> [0, 0] };
; UNNAMED-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1]
; UNNAMED-NEXT: [p_0] -> { Stmt5[i0] -> MemRef0__phi[] };
; UNNAMED-NEXT: Stmt6
; UNNAMED-NEXT: Domain :=
; UNNAMED-NEXT: [p_0] -> { Stmt6[i0] : 0 <= i0 <= 1023 };
; UNNAMED-NEXT: Schedule :=
; UNNAMED-NEXT: [p_0] -> { Stmt6[i0] -> [i0, 3] };
; UNNAMED-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 1]
; UNNAMED-NEXT: [p_0] -> { Stmt6[i0] -> MemRef0__phi[] };
; UNNAMED-NEXT: ReadAccess := [Reduction Type: NONE] [Scalar: 0]
; UNNAMED-NEXT: [p_0] -> { Stmt6[i0] -> MemRef1[o0] };
; UNNAMED-NEXT: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0]
; UNNAMED-NEXT: [p_0] -> { Stmt6[i0] -> MemRef1[o0] };
; UNNAMED-NEXT: }
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @f(i32* %A, i32 %b) {
bb:
br label %bb1
bb1: ; preds = %bb19, %bb
%i.0 = phi i32 [ 0, %bb ], [ %tmp20, %bb19 ]
%exitcond = icmp ne i32 %i.0, 1024
br i1 %exitcond, label %bb2, label %bb21
bb2: ; preds = %bb1
%tmp = icmp slt i32 %i.0, %b
br i1 %tmp, label %bb3, label %bb4
bb3: ; preds = %bb2
br label %bb10
bb4: ; preds = %bb2
%tmp5 = mul nsw i32 %i.0, 2
%tmp6 = icmp sgt i32 %tmp5, %b
br i1 %tmp6, label %bb7, label %bb8
bb7: ; preds = %bb4
br label %bb10
bb8: ; preds = %bb4
br label %bb10
bb10: ; preds = %bb9, %bb3
%x.1 = phi i32 [ 0, %bb3 ], [ 3, %bb7 ], [ %b, %bb8 ]
%tmp11 = sext i32 %x.1 to i64
%tmp12 = getelementptr inbounds i32, i32* %A, i64 %tmp11
%tmp13 = load i32, i32* %tmp12, align 4
%tmp14 = icmp eq i32 %tmp13, 0
br i1 %tmp14, label %bb18, label %bb15
bb15: ; preds = %bb10
%tmp16 = sext i32 %x.1 to i64
%tmp17 = getelementptr inbounds i32, i32* %A, i64 %tmp16
store i32 0, i32* %tmp17, align 4
br label %bb18
bb18: ; preds = %bb10, %bb15
br label %bb19
bb19: ; preds = %bb18
%tmp20 = add nuw nsw i32 %i.0, 1
br label %bb1
bb21: ; preds = %bb1
ret void
}